esp32c2/
apb_ctrl.rs

1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5    sysclk_conf: SYSCLK_CONF,
6    tick_conf: TICK_CONF,
7    clk_out_en: CLK_OUT_EN,
8    wifi_bb_cfg: WIFI_BB_CFG,
9    wifi_bb_cfg_2: WIFI_BB_CFG_2,
10    wifi_clk_en: WIFI_CLK_EN,
11    wifi_rst_en: WIFI_RST_EN,
12    host_inf_sel: HOST_INF_SEL,
13    ext_mem_pms_lock: EXT_MEM_PMS_LOCK,
14    _reserved9: [u8; 0x04],
15    flash_ace0_attr: FLASH_ACE0_ATTR,
16    flash_ace1_attr: FLASH_ACE1_ATTR,
17    flash_ace2_attr: FLASH_ACE2_ATTR,
18    flash_ace3_attr: FLASH_ACE3_ATTR,
19    flash_ace0_addr: FLASH_ACE0_ADDR,
20    flash_ace1_addr: FLASH_ACE1_ADDR,
21    flash_ace2_addr: FLASH_ACE2_ADDR,
22    flash_ace3_addr: FLASH_ACE3_ADDR,
23    flash_ace0_size: FLASH_ACE0_SIZE,
24    flash_ace1_size: FLASH_ACE1_SIZE,
25    flash_ace2_size: FLASH_ACE2_SIZE,
26    flash_ace3_size: FLASH_ACE3_SIZE,
27    _reserved21: [u8; 0x30],
28    spi_mem_pms_ctrl: SPI_MEM_PMS_CTRL,
29    spi_mem_reject_addr: SPI_MEM_REJECT_ADDR,
30    sdio_ctrl: SDIO_CTRL,
31    redcy_sig0: REDCY_SIG0,
32    redcy_sig1: REDCY_SIG1,
33    front_end_mem_pd: FRONT_END_MEM_PD,
34    retention_ctrl: RETENTION_CTRL,
35    clkgate_force_on: CLKGATE_FORCE_ON,
36    mem_power_down: MEM_POWER_DOWN,
37    mem_power_up: MEM_POWER_UP,
38    rnd_data: RND_DATA,
39    peri_backup_config: PERI_BACKUP_CONFIG,
40    peri_backup_apb_addr: PERI_BACKUP_APB_ADDR,
41    peri_backup_mem_addr: PERI_BACKUP_MEM_ADDR,
42    peri_backup_int_raw: PERI_BACKUP_INT_RAW,
43    peri_backup_int_st: PERI_BACKUP_INT_ST,
44    peri_backup_int_ena: PERI_BACKUP_INT_ENA,
45    _reserved38: [u8; 0x04],
46    peri_backup_int_clr: PERI_BACKUP_INT_CLR,
47    _reserved39: [u8; 0x0328],
48    date: DATE,
49}
50impl RegisterBlock {
51    #[doc = "0x00 - APB_CTRL_SYSCLK_CONF_REG"]
52    #[inline(always)]
53    pub const fn sysclk_conf(&self) -> &SYSCLK_CONF {
54        &self.sysclk_conf
55    }
56    #[doc = "0x04 - APB_CTRL_TICK_CONF_REG"]
57    #[inline(always)]
58    pub const fn tick_conf(&self) -> &TICK_CONF {
59        &self.tick_conf
60    }
61    #[doc = "0x08 - APB_CTRL_CLK_OUT_EN_REG"]
62    #[inline(always)]
63    pub const fn clk_out_en(&self) -> &CLK_OUT_EN {
64        &self.clk_out_en
65    }
66    #[doc = "0x0c - APB_CTRL_WIFI_BB_CFG_REG"]
67    #[inline(always)]
68    pub const fn wifi_bb_cfg(&self) -> &WIFI_BB_CFG {
69        &self.wifi_bb_cfg
70    }
71    #[doc = "0x10 - APB_CTRL_WIFI_BB_CFG_2_REG"]
72    #[inline(always)]
73    pub const fn wifi_bb_cfg_2(&self) -> &WIFI_BB_CFG_2 {
74        &self.wifi_bb_cfg_2
75    }
76    #[doc = "0x14 - APB_CTRL_WIFI_CLK_EN_REG"]
77    #[inline(always)]
78    pub const fn wifi_clk_en(&self) -> &WIFI_CLK_EN {
79        &self.wifi_clk_en
80    }
81    #[doc = "0x18 - APB_CTRL_WIFI_RST_EN_REG"]
82    #[inline(always)]
83    pub const fn wifi_rst_en(&self) -> &WIFI_RST_EN {
84        &self.wifi_rst_en
85    }
86    #[doc = "0x1c - APB_CTRL_HOST_INF_SEL_REG"]
87    #[inline(always)]
88    pub const fn host_inf_sel(&self) -> &HOST_INF_SEL {
89        &self.host_inf_sel
90    }
91    #[doc = "0x20 - APB_CTRL_EXT_MEM_PMS_LOCK_REG"]
92    #[inline(always)]
93    pub const fn ext_mem_pms_lock(&self) -> &EXT_MEM_PMS_LOCK {
94        &self.ext_mem_pms_lock
95    }
96    #[doc = "0x28 - APB_CTRL_FLASH_ACE0_ATTR_REG"]
97    #[inline(always)]
98    pub const fn flash_ace0_attr(&self) -> &FLASH_ACE0_ATTR {
99        &self.flash_ace0_attr
100    }
101    #[doc = "0x2c - APB_CTRL_FLASH_ACE1_ATTR_REG"]
102    #[inline(always)]
103    pub const fn flash_ace1_attr(&self) -> &FLASH_ACE1_ATTR {
104        &self.flash_ace1_attr
105    }
106    #[doc = "0x30 - APB_CTRL_FLASH_ACE2_ATTR_REG"]
107    #[inline(always)]
108    pub const fn flash_ace2_attr(&self) -> &FLASH_ACE2_ATTR {
109        &self.flash_ace2_attr
110    }
111    #[doc = "0x34 - APB_CTRL_FLASH_ACE3_ATTR_REG"]
112    #[inline(always)]
113    pub const fn flash_ace3_attr(&self) -> &FLASH_ACE3_ATTR {
114        &self.flash_ace3_attr
115    }
116    #[doc = "0x38 - APB_CTRL_FLASH_ACE0_ADDR_REG"]
117    #[inline(always)]
118    pub const fn flash_ace0_addr(&self) -> &FLASH_ACE0_ADDR {
119        &self.flash_ace0_addr
120    }
121    #[doc = "0x3c - APB_CTRL_FLASH_ACE1_ADDR_REG"]
122    #[inline(always)]
123    pub const fn flash_ace1_addr(&self) -> &FLASH_ACE1_ADDR {
124        &self.flash_ace1_addr
125    }
126    #[doc = "0x40 - APB_CTRL_FLASH_ACE2_ADDR_REG"]
127    #[inline(always)]
128    pub const fn flash_ace2_addr(&self) -> &FLASH_ACE2_ADDR {
129        &self.flash_ace2_addr
130    }
131    #[doc = "0x44 - APB_CTRL_FLASH_ACE3_ADDR_REG"]
132    #[inline(always)]
133    pub const fn flash_ace3_addr(&self) -> &FLASH_ACE3_ADDR {
134        &self.flash_ace3_addr
135    }
136    #[doc = "0x48 - APB_CTRL_FLASH_ACE0_SIZE_REG"]
137    #[inline(always)]
138    pub const fn flash_ace0_size(&self) -> &FLASH_ACE0_SIZE {
139        &self.flash_ace0_size
140    }
141    #[doc = "0x4c - APB_CTRL_FLASH_ACE1_SIZE_REG"]
142    #[inline(always)]
143    pub const fn flash_ace1_size(&self) -> &FLASH_ACE1_SIZE {
144        &self.flash_ace1_size
145    }
146    #[doc = "0x50 - APB_CTRL_FLASH_ACE2_SIZE_REG"]
147    #[inline(always)]
148    pub const fn flash_ace2_size(&self) -> &FLASH_ACE2_SIZE {
149        &self.flash_ace2_size
150    }
151    #[doc = "0x54 - APB_CTRL_FLASH_ACE3_SIZE_REG"]
152    #[inline(always)]
153    pub const fn flash_ace3_size(&self) -> &FLASH_ACE3_SIZE {
154        &self.flash_ace3_size
155    }
156    #[doc = "0x88 - APB_CTRL_SPI_MEM_PMS_CTRL_REG"]
157    #[inline(always)]
158    pub const fn spi_mem_pms_ctrl(&self) -> &SPI_MEM_PMS_CTRL {
159        &self.spi_mem_pms_ctrl
160    }
161    #[doc = "0x8c - APB_CTRL_SPI_MEM_REJECT_ADDR_REG"]
162    #[inline(always)]
163    pub const fn spi_mem_reject_addr(&self) -> &SPI_MEM_REJECT_ADDR {
164        &self.spi_mem_reject_addr
165    }
166    #[doc = "0x90 - APB_CTRL_SDIO_CTRL_REG"]
167    #[inline(always)]
168    pub const fn sdio_ctrl(&self) -> &SDIO_CTRL {
169        &self.sdio_ctrl
170    }
171    #[doc = "0x94 - APB_CTRL_REDCY_SIG0_REG_REG"]
172    #[inline(always)]
173    pub const fn redcy_sig0(&self) -> &REDCY_SIG0 {
174        &self.redcy_sig0
175    }
176    #[doc = "0x98 - APB_CTRL_REDCY_SIG1_REG_REG"]
177    #[inline(always)]
178    pub const fn redcy_sig1(&self) -> &REDCY_SIG1 {
179        &self.redcy_sig1
180    }
181    #[doc = "0x9c - APB_CTRL_FRONT_END_MEM_PD_REG"]
182    #[inline(always)]
183    pub const fn front_end_mem_pd(&self) -> &FRONT_END_MEM_PD {
184        &self.front_end_mem_pd
185    }
186    #[doc = "0xa0 - APB_CTRL_RETENTION_CTRL_REG"]
187    #[inline(always)]
188    pub const fn retention_ctrl(&self) -> &RETENTION_CTRL {
189        &self.retention_ctrl
190    }
191    #[doc = "0xa4 - Memory power configuration registers"]
192    #[inline(always)]
193    pub const fn clkgate_force_on(&self) -> &CLKGATE_FORCE_ON {
194        &self.clkgate_force_on
195    }
196    #[doc = "0xa8 - Memory power configuration registers"]
197    #[inline(always)]
198    pub const fn mem_power_down(&self) -> &MEM_POWER_DOWN {
199        &self.mem_power_down
200    }
201    #[doc = "0xac - Memory power configuration registers"]
202    #[inline(always)]
203    pub const fn mem_power_up(&self) -> &MEM_POWER_UP {
204        &self.mem_power_up
205    }
206    #[doc = "0xb0 - APB_CTRL_RND_DATA_REG"]
207    #[inline(always)]
208    pub const fn rnd_data(&self) -> &RND_DATA {
209        &self.rnd_data
210    }
211    #[doc = "0xb4 - APB_CTRL_PERI_BACKUP_CONFIG_REG_REG"]
212    #[inline(always)]
213    pub const fn peri_backup_config(&self) -> &PERI_BACKUP_CONFIG {
214        &self.peri_backup_config
215    }
216    #[doc = "0xb8 - APB_CTRL_PERI_BACKUP_APB_ADDR_REG_REG"]
217    #[inline(always)]
218    pub const fn peri_backup_apb_addr(&self) -> &PERI_BACKUP_APB_ADDR {
219        &self.peri_backup_apb_addr
220    }
221    #[doc = "0xbc - APB_CTRL_PERI_BACKUP_MEM_ADDR_REG_REG"]
222    #[inline(always)]
223    pub const fn peri_backup_mem_addr(&self) -> &PERI_BACKUP_MEM_ADDR {
224        &self.peri_backup_mem_addr
225    }
226    #[doc = "0xc0 - APB_CTRL_PERI_BACKUP_INT_RAW_REG"]
227    #[inline(always)]
228    pub const fn peri_backup_int_raw(&self) -> &PERI_BACKUP_INT_RAW {
229        &self.peri_backup_int_raw
230    }
231    #[doc = "0xc4 - APB_CTRL_PERI_BACKUP_INT_ST_REG"]
232    #[inline(always)]
233    pub const fn peri_backup_int_st(&self) -> &PERI_BACKUP_INT_ST {
234        &self.peri_backup_int_st
235    }
236    #[doc = "0xc8 - APB_CTRL_PERI_BACKUP_INT_ENA_REG"]
237    #[inline(always)]
238    pub const fn peri_backup_int_ena(&self) -> &PERI_BACKUP_INT_ENA {
239        &self.peri_backup_int_ena
240    }
241    #[doc = "0xd0 - APB_CTRL_PERI_BACKUP_INT_CLR_REG"]
242    #[inline(always)]
243    pub const fn peri_backup_int_clr(&self) -> &PERI_BACKUP_INT_CLR {
244        &self.peri_backup_int_clr
245    }
246    #[doc = "0x3fc - APB_CTRL_DATE_REG"]
247    #[inline(always)]
248    pub const fn date(&self) -> &DATE {
249        &self.date
250    }
251}
252#[doc = "SYSCLK_CONF (rw) register accessor: APB_CTRL_SYSCLK_CONF_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`sysclk_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sysclk_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sysclk_conf`] module"]
253pub type SYSCLK_CONF = crate::Reg<sysclk_conf::SYSCLK_CONF_SPEC>;
254#[doc = "APB_CTRL_SYSCLK_CONF_REG"]
255pub mod sysclk_conf;
256#[doc = "TICK_CONF (rw) register accessor: APB_CTRL_TICK_CONF_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`tick_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tick_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tick_conf`] module"]
257pub type TICK_CONF = crate::Reg<tick_conf::TICK_CONF_SPEC>;
258#[doc = "APB_CTRL_TICK_CONF_REG"]
259pub mod tick_conf;
260#[doc = "CLK_OUT_EN (rw) register accessor: APB_CTRL_CLK_OUT_EN_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`clk_out_en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clk_out_en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clk_out_en`] module"]
261pub type CLK_OUT_EN = crate::Reg<clk_out_en::CLK_OUT_EN_SPEC>;
262#[doc = "APB_CTRL_CLK_OUT_EN_REG"]
263pub mod clk_out_en;
264#[doc = "WIFI_BB_CFG (rw) register accessor: APB_CTRL_WIFI_BB_CFG_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`wifi_bb_cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wifi_bb_cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wifi_bb_cfg`] module"]
265pub type WIFI_BB_CFG = crate::Reg<wifi_bb_cfg::WIFI_BB_CFG_SPEC>;
266#[doc = "APB_CTRL_WIFI_BB_CFG_REG"]
267pub mod wifi_bb_cfg;
268#[doc = "WIFI_BB_CFG_2 (rw) register accessor: APB_CTRL_WIFI_BB_CFG_2_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`wifi_bb_cfg_2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wifi_bb_cfg_2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wifi_bb_cfg_2`] module"]
269pub type WIFI_BB_CFG_2 = crate::Reg<wifi_bb_cfg_2::WIFI_BB_CFG_2_SPEC>;
270#[doc = "APB_CTRL_WIFI_BB_CFG_2_REG"]
271pub mod wifi_bb_cfg_2;
272#[doc = "WIFI_CLK_EN (rw) register accessor: APB_CTRL_WIFI_CLK_EN_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`wifi_clk_en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wifi_clk_en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wifi_clk_en`] module"]
273pub type WIFI_CLK_EN = crate::Reg<wifi_clk_en::WIFI_CLK_EN_SPEC>;
274#[doc = "APB_CTRL_WIFI_CLK_EN_REG"]
275pub mod wifi_clk_en;
276#[doc = "WIFI_RST_EN (rw) register accessor: APB_CTRL_WIFI_RST_EN_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`wifi_rst_en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wifi_rst_en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wifi_rst_en`] module"]
277pub type WIFI_RST_EN = crate::Reg<wifi_rst_en::WIFI_RST_EN_SPEC>;
278#[doc = "APB_CTRL_WIFI_RST_EN_REG"]
279pub mod wifi_rst_en;
280#[doc = "HOST_INF_SEL (rw) register accessor: APB_CTRL_HOST_INF_SEL_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`host_inf_sel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`host_inf_sel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@host_inf_sel`] module"]
281pub type HOST_INF_SEL = crate::Reg<host_inf_sel::HOST_INF_SEL_SPEC>;
282#[doc = "APB_CTRL_HOST_INF_SEL_REG"]
283pub mod host_inf_sel;
284#[doc = "EXT_MEM_PMS_LOCK (rw) register accessor: APB_CTRL_EXT_MEM_PMS_LOCK_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`ext_mem_pms_lock::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ext_mem_pms_lock::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ext_mem_pms_lock`] module"]
285pub type EXT_MEM_PMS_LOCK = crate::Reg<ext_mem_pms_lock::EXT_MEM_PMS_LOCK_SPEC>;
286#[doc = "APB_CTRL_EXT_MEM_PMS_LOCK_REG"]
287pub mod ext_mem_pms_lock;
288#[doc = "FLASH_ACE0_ATTR (rw) register accessor: APB_CTRL_FLASH_ACE0_ATTR_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`flash_ace0_attr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flash_ace0_attr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_ace0_attr`] module"]
289pub type FLASH_ACE0_ATTR = crate::Reg<flash_ace0_attr::FLASH_ACE0_ATTR_SPEC>;
290#[doc = "APB_CTRL_FLASH_ACE0_ATTR_REG"]
291pub mod flash_ace0_attr;
292#[doc = "FLASH_ACE1_ATTR (rw) register accessor: APB_CTRL_FLASH_ACE1_ATTR_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`flash_ace1_attr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flash_ace1_attr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_ace1_attr`] module"]
293pub type FLASH_ACE1_ATTR = crate::Reg<flash_ace1_attr::FLASH_ACE1_ATTR_SPEC>;
294#[doc = "APB_CTRL_FLASH_ACE1_ATTR_REG"]
295pub mod flash_ace1_attr;
296#[doc = "FLASH_ACE2_ATTR (rw) register accessor: APB_CTRL_FLASH_ACE2_ATTR_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`flash_ace2_attr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flash_ace2_attr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_ace2_attr`] module"]
297pub type FLASH_ACE2_ATTR = crate::Reg<flash_ace2_attr::FLASH_ACE2_ATTR_SPEC>;
298#[doc = "APB_CTRL_FLASH_ACE2_ATTR_REG"]
299pub mod flash_ace2_attr;
300#[doc = "FLASH_ACE3_ATTR (rw) register accessor: APB_CTRL_FLASH_ACE3_ATTR_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`flash_ace3_attr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flash_ace3_attr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_ace3_attr`] module"]
301pub type FLASH_ACE3_ATTR = crate::Reg<flash_ace3_attr::FLASH_ACE3_ATTR_SPEC>;
302#[doc = "APB_CTRL_FLASH_ACE3_ATTR_REG"]
303pub mod flash_ace3_attr;
304#[doc = "FLASH_ACE0_ADDR (rw) register accessor: APB_CTRL_FLASH_ACE0_ADDR_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`flash_ace0_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flash_ace0_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_ace0_addr`] module"]
305pub type FLASH_ACE0_ADDR = crate::Reg<flash_ace0_addr::FLASH_ACE0_ADDR_SPEC>;
306#[doc = "APB_CTRL_FLASH_ACE0_ADDR_REG"]
307pub mod flash_ace0_addr;
308#[doc = "FLASH_ACE1_ADDR (rw) register accessor: APB_CTRL_FLASH_ACE1_ADDR_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`flash_ace1_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flash_ace1_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_ace1_addr`] module"]
309pub type FLASH_ACE1_ADDR = crate::Reg<flash_ace1_addr::FLASH_ACE1_ADDR_SPEC>;
310#[doc = "APB_CTRL_FLASH_ACE1_ADDR_REG"]
311pub mod flash_ace1_addr;
312#[doc = "FLASH_ACE2_ADDR (rw) register accessor: APB_CTRL_FLASH_ACE2_ADDR_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`flash_ace2_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flash_ace2_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_ace2_addr`] module"]
313pub type FLASH_ACE2_ADDR = crate::Reg<flash_ace2_addr::FLASH_ACE2_ADDR_SPEC>;
314#[doc = "APB_CTRL_FLASH_ACE2_ADDR_REG"]
315pub mod flash_ace2_addr;
316#[doc = "FLASH_ACE3_ADDR (rw) register accessor: APB_CTRL_FLASH_ACE3_ADDR_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`flash_ace3_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flash_ace3_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_ace3_addr`] module"]
317pub type FLASH_ACE3_ADDR = crate::Reg<flash_ace3_addr::FLASH_ACE3_ADDR_SPEC>;
318#[doc = "APB_CTRL_FLASH_ACE3_ADDR_REG"]
319pub mod flash_ace3_addr;
320#[doc = "FLASH_ACE0_SIZE (rw) register accessor: APB_CTRL_FLASH_ACE0_SIZE_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`flash_ace0_size::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flash_ace0_size::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_ace0_size`] module"]
321pub type FLASH_ACE0_SIZE = crate::Reg<flash_ace0_size::FLASH_ACE0_SIZE_SPEC>;
322#[doc = "APB_CTRL_FLASH_ACE0_SIZE_REG"]
323pub mod flash_ace0_size;
324#[doc = "FLASH_ACE1_SIZE (rw) register accessor: APB_CTRL_FLASH_ACE1_SIZE_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`flash_ace1_size::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flash_ace1_size::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_ace1_size`] module"]
325pub type FLASH_ACE1_SIZE = crate::Reg<flash_ace1_size::FLASH_ACE1_SIZE_SPEC>;
326#[doc = "APB_CTRL_FLASH_ACE1_SIZE_REG"]
327pub mod flash_ace1_size;
328#[doc = "FLASH_ACE2_SIZE (rw) register accessor: APB_CTRL_FLASH_ACE2_SIZE_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`flash_ace2_size::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flash_ace2_size::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_ace2_size`] module"]
329pub type FLASH_ACE2_SIZE = crate::Reg<flash_ace2_size::FLASH_ACE2_SIZE_SPEC>;
330#[doc = "APB_CTRL_FLASH_ACE2_SIZE_REG"]
331pub mod flash_ace2_size;
332#[doc = "FLASH_ACE3_SIZE (rw) register accessor: APB_CTRL_FLASH_ACE3_SIZE_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`flash_ace3_size::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`flash_ace3_size::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_ace3_size`] module"]
333pub type FLASH_ACE3_SIZE = crate::Reg<flash_ace3_size::FLASH_ACE3_SIZE_SPEC>;
334#[doc = "APB_CTRL_FLASH_ACE3_SIZE_REG"]
335pub mod flash_ace3_size;
336#[doc = "SPI_MEM_PMS_CTRL (rw) register accessor: APB_CTRL_SPI_MEM_PMS_CTRL_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`spi_mem_pms_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spi_mem_pms_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_mem_pms_ctrl`] module"]
337pub type SPI_MEM_PMS_CTRL = crate::Reg<spi_mem_pms_ctrl::SPI_MEM_PMS_CTRL_SPEC>;
338#[doc = "APB_CTRL_SPI_MEM_PMS_CTRL_REG"]
339pub mod spi_mem_pms_ctrl;
340#[doc = "SPI_MEM_REJECT_ADDR (r) register accessor: APB_CTRL_SPI_MEM_REJECT_ADDR_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`spi_mem_reject_addr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_mem_reject_addr`] module"]
341pub type SPI_MEM_REJECT_ADDR = crate::Reg<spi_mem_reject_addr::SPI_MEM_REJECT_ADDR_SPEC>;
342#[doc = "APB_CTRL_SPI_MEM_REJECT_ADDR_REG"]
343pub mod spi_mem_reject_addr;
344#[doc = "SDIO_CTRL (rw) register accessor: APB_CTRL_SDIO_CTRL_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`sdio_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sdio_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdio_ctrl`] module"]
345pub type SDIO_CTRL = crate::Reg<sdio_ctrl::SDIO_CTRL_SPEC>;
346#[doc = "APB_CTRL_SDIO_CTRL_REG"]
347pub mod sdio_ctrl;
348#[doc = "REDCY_SIG0 (rw) register accessor: APB_CTRL_REDCY_SIG0_REG_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`redcy_sig0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`redcy_sig0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@redcy_sig0`] module"]
349pub type REDCY_SIG0 = crate::Reg<redcy_sig0::REDCY_SIG0_SPEC>;
350#[doc = "APB_CTRL_REDCY_SIG0_REG_REG"]
351pub mod redcy_sig0;
352#[doc = "REDCY_SIG1 (rw) register accessor: APB_CTRL_REDCY_SIG1_REG_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`redcy_sig1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`redcy_sig1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@redcy_sig1`] module"]
353pub type REDCY_SIG1 = crate::Reg<redcy_sig1::REDCY_SIG1_SPEC>;
354#[doc = "APB_CTRL_REDCY_SIG1_REG_REG"]
355pub mod redcy_sig1;
356#[doc = "FRONT_END_MEM_PD (rw) register accessor: APB_CTRL_FRONT_END_MEM_PD_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`front_end_mem_pd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`front_end_mem_pd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@front_end_mem_pd`] module"]
357pub type FRONT_END_MEM_PD = crate::Reg<front_end_mem_pd::FRONT_END_MEM_PD_SPEC>;
358#[doc = "APB_CTRL_FRONT_END_MEM_PD_REG"]
359pub mod front_end_mem_pd;
360#[doc = "RETENTION_CTRL (rw) register accessor: APB_CTRL_RETENTION_CTRL_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`retention_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`retention_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@retention_ctrl`] module"]
361pub type RETENTION_CTRL = crate::Reg<retention_ctrl::RETENTION_CTRL_SPEC>;
362#[doc = "APB_CTRL_RETENTION_CTRL_REG"]
363pub mod retention_ctrl;
364#[doc = "CLKGATE_FORCE_ON (rw) register accessor: Memory power configuration registers\n\nYou can [`read`](crate::Reg::read) this register and get [`clkgate_force_on::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkgate_force_on::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkgate_force_on`] module"]
365pub type CLKGATE_FORCE_ON = crate::Reg<clkgate_force_on::CLKGATE_FORCE_ON_SPEC>;
366#[doc = "Memory power configuration registers"]
367pub mod clkgate_force_on;
368#[doc = "MEM_POWER_DOWN (rw) register accessor: Memory power configuration registers\n\nYou can [`read`](crate::Reg::read) this register and get [`mem_power_down::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mem_power_down::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mem_power_down`] module"]
369pub type MEM_POWER_DOWN = crate::Reg<mem_power_down::MEM_POWER_DOWN_SPEC>;
370#[doc = "Memory power configuration registers"]
371pub mod mem_power_down;
372#[doc = "MEM_POWER_UP (rw) register accessor: Memory power configuration registers\n\nYou can [`read`](crate::Reg::read) this register and get [`mem_power_up::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mem_power_up::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mem_power_up`] module"]
373pub type MEM_POWER_UP = crate::Reg<mem_power_up::MEM_POWER_UP_SPEC>;
374#[doc = "Memory power configuration registers"]
375pub mod mem_power_up;
376#[doc = "RND_DATA (r) register accessor: APB_CTRL_RND_DATA_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`rnd_data::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rnd_data`] module"]
377pub type RND_DATA = crate::Reg<rnd_data::RND_DATA_SPEC>;
378#[doc = "APB_CTRL_RND_DATA_REG"]
379pub mod rnd_data;
380#[doc = "PERI_BACKUP_CONFIG (rw) register accessor: APB_CTRL_PERI_BACKUP_CONFIG_REG_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`peri_backup_config::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`peri_backup_config::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@peri_backup_config`] module"]
381pub type PERI_BACKUP_CONFIG = crate::Reg<peri_backup_config::PERI_BACKUP_CONFIG_SPEC>;
382#[doc = "APB_CTRL_PERI_BACKUP_CONFIG_REG_REG"]
383pub mod peri_backup_config;
384#[doc = "PERI_BACKUP_APB_ADDR (rw) register accessor: APB_CTRL_PERI_BACKUP_APB_ADDR_REG_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`peri_backup_apb_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`peri_backup_apb_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@peri_backup_apb_addr`] module"]
385pub type PERI_BACKUP_APB_ADDR = crate::Reg<peri_backup_apb_addr::PERI_BACKUP_APB_ADDR_SPEC>;
386#[doc = "APB_CTRL_PERI_BACKUP_APB_ADDR_REG_REG"]
387pub mod peri_backup_apb_addr;
388#[doc = "PERI_BACKUP_MEM_ADDR (rw) register accessor: APB_CTRL_PERI_BACKUP_MEM_ADDR_REG_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`peri_backup_mem_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`peri_backup_mem_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@peri_backup_mem_addr`] module"]
389pub type PERI_BACKUP_MEM_ADDR = crate::Reg<peri_backup_mem_addr::PERI_BACKUP_MEM_ADDR_SPEC>;
390#[doc = "APB_CTRL_PERI_BACKUP_MEM_ADDR_REG_REG"]
391pub mod peri_backup_mem_addr;
392#[doc = "PERI_BACKUP_INT_RAW (r) register accessor: APB_CTRL_PERI_BACKUP_INT_RAW_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`peri_backup_int_raw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@peri_backup_int_raw`] module"]
393pub type PERI_BACKUP_INT_RAW = crate::Reg<peri_backup_int_raw::PERI_BACKUP_INT_RAW_SPEC>;
394#[doc = "APB_CTRL_PERI_BACKUP_INT_RAW_REG"]
395pub mod peri_backup_int_raw;
396#[doc = "PERI_BACKUP_INT_ST (r) register accessor: APB_CTRL_PERI_BACKUP_INT_ST_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`peri_backup_int_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@peri_backup_int_st`] module"]
397pub type PERI_BACKUP_INT_ST = crate::Reg<peri_backup_int_st::PERI_BACKUP_INT_ST_SPEC>;
398#[doc = "APB_CTRL_PERI_BACKUP_INT_ST_REG"]
399pub mod peri_backup_int_st;
400#[doc = "PERI_BACKUP_INT_ENA (rw) register accessor: APB_CTRL_PERI_BACKUP_INT_ENA_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`peri_backup_int_ena::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`peri_backup_int_ena::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@peri_backup_int_ena`] module"]
401pub type PERI_BACKUP_INT_ENA = crate::Reg<peri_backup_int_ena::PERI_BACKUP_INT_ENA_SPEC>;
402#[doc = "APB_CTRL_PERI_BACKUP_INT_ENA_REG"]
403pub mod peri_backup_int_ena;
404#[doc = "PERI_BACKUP_INT_CLR (w) register accessor: APB_CTRL_PERI_BACKUP_INT_CLR_REG\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`peri_backup_int_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@peri_backup_int_clr`] module"]
405pub type PERI_BACKUP_INT_CLR = crate::Reg<peri_backup_int_clr::PERI_BACKUP_INT_CLR_SPEC>;
406#[doc = "APB_CTRL_PERI_BACKUP_INT_CLR_REG"]
407pub mod peri_backup_int_clr;
408#[doc = "DATE (rw) register accessor: APB_CTRL_DATE_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`date::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`date::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@date`] module"]
409pub type DATE = crate::Reg<date::DATE_SPEC>;
410#[doc = "APB_CTRL_DATE_REG"]
411pub mod date;
esp32c2/apb_ctrl.rs

esp32c2/
apb_ctrl.rs
