esp32/pcnt/
int_raw.rs

1#[doc = "Register `INT_RAW` reader"]
2pub type R = crate::R<INT_RAW_SPEC>;
3#[doc = "Field `CNT_THR_EVENT_U(0-7)` reader - This is the interrupt raw bit for channel%s event."]
4pub type CNT_THR_EVENT_U_R = crate::BitReader;
5impl R {
6    #[doc = "This is the interrupt raw bit for channel(0-7) event."]
7    #[doc = ""]
8    #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `CNT_THR_EVENT_U0` field.</div>"]
9    #[inline(always)]
10    pub fn cnt_thr_event_u(&self, n: u8) -> CNT_THR_EVENT_U_R {
11        #[allow(clippy::no_effect)]
12        [(); 8][n as usize];
13        CNT_THR_EVENT_U_R::new(((self.bits >> n) & 1) != 0)
14    }
15    #[doc = "Iterator for array of:"]
16    #[doc = "This is the interrupt raw bit for channel(0-7) event."]
17    #[inline(always)]
18    pub fn cnt_thr_event_u_iter(&self) -> impl Iterator<Item = CNT_THR_EVENT_U_R> + '_ {
19        (0..8).map(move |n| CNT_THR_EVENT_U_R::new(((self.bits >> n) & 1) != 0))
20    }
21    #[doc = "Bit 0 - This is the interrupt raw bit for channel0 event."]
22    #[inline(always)]
23    pub fn cnt_thr_event_u0(&self) -> CNT_THR_EVENT_U_R {
24        CNT_THR_EVENT_U_R::new((self.bits & 1) != 0)
25    }
26    #[doc = "Bit 1 - This is the interrupt raw bit for channel1 event."]
27    #[inline(always)]
28    pub fn cnt_thr_event_u1(&self) -> CNT_THR_EVENT_U_R {
29        CNT_THR_EVENT_U_R::new(((self.bits >> 1) & 1) != 0)
30    }
31    #[doc = "Bit 2 - This is the interrupt raw bit for channel2 event."]
32    #[inline(always)]
33    pub fn cnt_thr_event_u2(&self) -> CNT_THR_EVENT_U_R {
34        CNT_THR_EVENT_U_R::new(((self.bits >> 2) & 1) != 0)
35    }
36    #[doc = "Bit 3 - This is the interrupt raw bit for channel3 event."]
37    #[inline(always)]
38    pub fn cnt_thr_event_u3(&self) -> CNT_THR_EVENT_U_R {
39        CNT_THR_EVENT_U_R::new(((self.bits >> 3) & 1) != 0)
40    }
41    #[doc = "Bit 4 - This is the interrupt raw bit for channel4 event."]
42    #[inline(always)]
43    pub fn cnt_thr_event_u4(&self) -> CNT_THR_EVENT_U_R {
44        CNT_THR_EVENT_U_R::new(((self.bits >> 4) & 1) != 0)
45    }
46    #[doc = "Bit 5 - This is the interrupt raw bit for channel5 event."]
47    #[inline(always)]
48    pub fn cnt_thr_event_u5(&self) -> CNT_THR_EVENT_U_R {
49        CNT_THR_EVENT_U_R::new(((self.bits >> 5) & 1) != 0)
50    }
51    #[doc = "Bit 6 - This is the interrupt raw bit for channel6 event."]
52    #[inline(always)]
53    pub fn cnt_thr_event_u6(&self) -> CNT_THR_EVENT_U_R {
54        CNT_THR_EVENT_U_R::new(((self.bits >> 6) & 1) != 0)
55    }
56    #[doc = "Bit 7 - This is the interrupt raw bit for channel7 event."]
57    #[inline(always)]
58    pub fn cnt_thr_event_u7(&self) -> CNT_THR_EVENT_U_R {
59        CNT_THR_EVENT_U_R::new(((self.bits >> 7) & 1) != 0)
60    }
61}
62#[cfg(feature = "impl-register-debug")]
63impl core::fmt::Debug for R {
64    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
65        f.debug_struct("INT_RAW")
66            .field("cnt_thr_event_u0", &self.cnt_thr_event_u0())
67            .field("cnt_thr_event_u1", &self.cnt_thr_event_u1())
68            .field("cnt_thr_event_u2", &self.cnt_thr_event_u2())
69            .field("cnt_thr_event_u3", &self.cnt_thr_event_u3())
70            .field("cnt_thr_event_u4", &self.cnt_thr_event_u4())
71            .field("cnt_thr_event_u5", &self.cnt_thr_event_u5())
72            .field("cnt_thr_event_u6", &self.cnt_thr_event_u6())
73            .field("cnt_thr_event_u7", &self.cnt_thr_event_u7())
74            .finish()
75    }
76}
77#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`int_raw::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
78pub struct INT_RAW_SPEC;
79impl crate::RegisterSpec for INT_RAW_SPEC {
80    type Ux = u32;
81}
82#[doc = "`read()` method returns [`int_raw::R`](R) reader structure"]
83impl crate::Readable for INT_RAW_SPEC {}
84#[doc = "`reset()` method sets INT_RAW to value 0"]
85impl crate::Resettable for INT_RAW_SPEC {
86    const RESET_VALUE: u32 = 0;
87}
esp32/pcnt/int_raw.rs

esp32/pcnt/
int_raw.rs
