esp32/i2s0/
pdm_conf.rs

1#[doc = "Register `PDM_CONF` reader"]
2pub type R = crate::R<PDM_CONF_SPEC>;
3#[doc = "Register `PDM_CONF` writer"]
4pub type W = crate::W<PDM_CONF_SPEC>;
5#[doc = "Field `TX_PDM_EN` reader - "]
6pub type TX_PDM_EN_R = crate::BitReader;
7#[doc = "Field `TX_PDM_EN` writer - "]
8pub type TX_PDM_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `RX_PDM_EN` reader - "]
10pub type RX_PDM_EN_R = crate::BitReader;
11#[doc = "Field `RX_PDM_EN` writer - "]
12pub type RX_PDM_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `PCM2PDM_CONV_EN` reader - "]
14pub type PCM2PDM_CONV_EN_R = crate::BitReader;
15#[doc = "Field `PCM2PDM_CONV_EN` writer - "]
16pub type PCM2PDM_CONV_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `PDM2PCM_CONV_EN` reader - "]
18pub type PDM2PCM_CONV_EN_R = crate::BitReader;
19#[doc = "Field `PDM2PCM_CONV_EN` writer - "]
20pub type PDM2PCM_CONV_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `TX_PDM_SINC_OSR2` reader - "]
22pub type TX_PDM_SINC_OSR2_R = crate::FieldReader;
23#[doc = "Field `TX_PDM_SINC_OSR2` writer - "]
24pub type TX_PDM_SINC_OSR2_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
25#[doc = "Field `TX_PDM_PRESCALE` reader - "]
26pub type TX_PDM_PRESCALE_R = crate::FieldReader;
27#[doc = "Field `TX_PDM_PRESCALE` writer - "]
28pub type TX_PDM_PRESCALE_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
29#[doc = "Field `TX_PDM_HP_IN_SHIFT` reader - "]
30pub type TX_PDM_HP_IN_SHIFT_R = crate::FieldReader;
31#[doc = "Field `TX_PDM_HP_IN_SHIFT` writer - "]
32pub type TX_PDM_HP_IN_SHIFT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
33#[doc = "Field `TX_PDM_LP_IN_SHIFT` reader - "]
34pub type TX_PDM_LP_IN_SHIFT_R = crate::FieldReader;
35#[doc = "Field `TX_PDM_LP_IN_SHIFT` writer - "]
36pub type TX_PDM_LP_IN_SHIFT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
37#[doc = "Field `TX_PDM_SINC_IN_SHIFT` reader - "]
38pub type TX_PDM_SINC_IN_SHIFT_R = crate::FieldReader;
39#[doc = "Field `TX_PDM_SINC_IN_SHIFT` writer - "]
40pub type TX_PDM_SINC_IN_SHIFT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
41#[doc = "Field `TX_PDM_SIGMADELTA_IN_SHIFT` reader - "]
42pub type TX_PDM_SIGMADELTA_IN_SHIFT_R = crate::FieldReader;
43#[doc = "Field `TX_PDM_SIGMADELTA_IN_SHIFT` writer - "]
44pub type TX_PDM_SIGMADELTA_IN_SHIFT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
45#[doc = "Field `RX_PDM_SINC_DSR_16_EN` reader - "]
46pub type RX_PDM_SINC_DSR_16_EN_R = crate::BitReader;
47#[doc = "Field `RX_PDM_SINC_DSR_16_EN` writer - "]
48pub type RX_PDM_SINC_DSR_16_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `TX_PDM_HP_BYPASS` reader - "]
50pub type TX_PDM_HP_BYPASS_R = crate::BitReader;
51#[doc = "Field `TX_PDM_HP_BYPASS` writer - "]
52pub type TX_PDM_HP_BYPASS_W<'a, REG> = crate::BitWriter<'a, REG>;
53impl R {
54    #[doc = "Bit 0"]
55    #[inline(always)]
56    pub fn tx_pdm_en(&self) -> TX_PDM_EN_R {
57        TX_PDM_EN_R::new((self.bits & 1) != 0)
58    }
59    #[doc = "Bit 1"]
60    #[inline(always)]
61    pub fn rx_pdm_en(&self) -> RX_PDM_EN_R {
62        RX_PDM_EN_R::new(((self.bits >> 1) & 1) != 0)
63    }
64    #[doc = "Bit 2"]
65    #[inline(always)]
66    pub fn pcm2pdm_conv_en(&self) -> PCM2PDM_CONV_EN_R {
67        PCM2PDM_CONV_EN_R::new(((self.bits >> 2) & 1) != 0)
68    }
69    #[doc = "Bit 3"]
70    #[inline(always)]
71    pub fn pdm2pcm_conv_en(&self) -> PDM2PCM_CONV_EN_R {
72        PDM2PCM_CONV_EN_R::new(((self.bits >> 3) & 1) != 0)
73    }
74    #[doc = "Bits 4:7"]
75    #[inline(always)]
76    pub fn tx_pdm_sinc_osr2(&self) -> TX_PDM_SINC_OSR2_R {
77        TX_PDM_SINC_OSR2_R::new(((self.bits >> 4) & 0x0f) as u8)
78    }
79    #[doc = "Bits 8:15"]
80    #[inline(always)]
81    pub fn tx_pdm_prescale(&self) -> TX_PDM_PRESCALE_R {
82        TX_PDM_PRESCALE_R::new(((self.bits >> 8) & 0xff) as u8)
83    }
84    #[doc = "Bits 16:17"]
85    #[inline(always)]
86    pub fn tx_pdm_hp_in_shift(&self) -> TX_PDM_HP_IN_SHIFT_R {
87        TX_PDM_HP_IN_SHIFT_R::new(((self.bits >> 16) & 3) as u8)
88    }
89    #[doc = "Bits 18:19"]
90    #[inline(always)]
91    pub fn tx_pdm_lp_in_shift(&self) -> TX_PDM_LP_IN_SHIFT_R {
92        TX_PDM_LP_IN_SHIFT_R::new(((self.bits >> 18) & 3) as u8)
93    }
94    #[doc = "Bits 20:21"]
95    #[inline(always)]
96    pub fn tx_pdm_sinc_in_shift(&self) -> TX_PDM_SINC_IN_SHIFT_R {
97        TX_PDM_SINC_IN_SHIFT_R::new(((self.bits >> 20) & 3) as u8)
98    }
99    #[doc = "Bits 22:23"]
100    #[inline(always)]
101    pub fn tx_pdm_sigmadelta_in_shift(&self) -> TX_PDM_SIGMADELTA_IN_SHIFT_R {
102        TX_PDM_SIGMADELTA_IN_SHIFT_R::new(((self.bits >> 22) & 3) as u8)
103    }
104    #[doc = "Bit 24"]
105    #[inline(always)]
106    pub fn rx_pdm_sinc_dsr_16_en(&self) -> RX_PDM_SINC_DSR_16_EN_R {
107        RX_PDM_SINC_DSR_16_EN_R::new(((self.bits >> 24) & 1) != 0)
108    }
109    #[doc = "Bit 25"]
110    #[inline(always)]
111    pub fn tx_pdm_hp_bypass(&self) -> TX_PDM_HP_BYPASS_R {
112        TX_PDM_HP_BYPASS_R::new(((self.bits >> 25) & 1) != 0)
113    }
114}
115#[cfg(feature = "impl-register-debug")]
116impl core::fmt::Debug for R {
117    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
118        f.debug_struct("PDM_CONF")
119            .field("tx_pdm_en", &self.tx_pdm_en())
120            .field("rx_pdm_en", &self.rx_pdm_en())
121            .field("pcm2pdm_conv_en", &self.pcm2pdm_conv_en())
122            .field("pdm2pcm_conv_en", &self.pdm2pcm_conv_en())
123            .field("tx_pdm_sinc_osr2", &self.tx_pdm_sinc_osr2())
124            .field("tx_pdm_prescale", &self.tx_pdm_prescale())
125            .field("tx_pdm_hp_in_shift", &self.tx_pdm_hp_in_shift())
126            .field("tx_pdm_lp_in_shift", &self.tx_pdm_lp_in_shift())
127            .field("tx_pdm_sinc_in_shift", &self.tx_pdm_sinc_in_shift())
128            .field(
129                "tx_pdm_sigmadelta_in_shift",
130                &self.tx_pdm_sigmadelta_in_shift(),
131            )
132            .field("rx_pdm_sinc_dsr_16_en", &self.rx_pdm_sinc_dsr_16_en())
133            .field("tx_pdm_hp_bypass", &self.tx_pdm_hp_bypass())
134            .finish()
135    }
136}
137impl W {
138    #[doc = "Bit 0"]
139    #[inline(always)]
140    pub fn tx_pdm_en(&mut self) -> TX_PDM_EN_W<PDM_CONF_SPEC> {
141        TX_PDM_EN_W::new(self, 0)
142    }
143    #[doc = "Bit 1"]
144    #[inline(always)]
145    pub fn rx_pdm_en(&mut self) -> RX_PDM_EN_W<PDM_CONF_SPEC> {
146        RX_PDM_EN_W::new(self, 1)
147    }
148    #[doc = "Bit 2"]
149    #[inline(always)]
150    pub fn pcm2pdm_conv_en(&mut self) -> PCM2PDM_CONV_EN_W<PDM_CONF_SPEC> {
151        PCM2PDM_CONV_EN_W::new(self, 2)
152    }
153    #[doc = "Bit 3"]
154    #[inline(always)]
155    pub fn pdm2pcm_conv_en(&mut self) -> PDM2PCM_CONV_EN_W<PDM_CONF_SPEC> {
156        PDM2PCM_CONV_EN_W::new(self, 3)
157    }
158    #[doc = "Bits 4:7"]
159    #[inline(always)]
160    pub fn tx_pdm_sinc_osr2(&mut self) -> TX_PDM_SINC_OSR2_W<PDM_CONF_SPEC> {
161        TX_PDM_SINC_OSR2_W::new(self, 4)
162    }
163    #[doc = "Bits 8:15"]
164    #[inline(always)]
165    pub fn tx_pdm_prescale(&mut self) -> TX_PDM_PRESCALE_W<PDM_CONF_SPEC> {
166        TX_PDM_PRESCALE_W::new(self, 8)
167    }
168    #[doc = "Bits 16:17"]
169    #[inline(always)]
170    pub fn tx_pdm_hp_in_shift(&mut self) -> TX_PDM_HP_IN_SHIFT_W<PDM_CONF_SPEC> {
171        TX_PDM_HP_IN_SHIFT_W::new(self, 16)
172    }
173    #[doc = "Bits 18:19"]
174    #[inline(always)]
175    pub fn tx_pdm_lp_in_shift(&mut self) -> TX_PDM_LP_IN_SHIFT_W<PDM_CONF_SPEC> {
176        TX_PDM_LP_IN_SHIFT_W::new(self, 18)
177    }
178    #[doc = "Bits 20:21"]
179    #[inline(always)]
180    pub fn tx_pdm_sinc_in_shift(&mut self) -> TX_PDM_SINC_IN_SHIFT_W<PDM_CONF_SPEC> {
181        TX_PDM_SINC_IN_SHIFT_W::new(self, 20)
182    }
183    #[doc = "Bits 22:23"]
184    #[inline(always)]
185    pub fn tx_pdm_sigmadelta_in_shift(&mut self) -> TX_PDM_SIGMADELTA_IN_SHIFT_W<PDM_CONF_SPEC> {
186        TX_PDM_SIGMADELTA_IN_SHIFT_W::new(self, 22)
187    }
188    #[doc = "Bit 24"]
189    #[inline(always)]
190    pub fn rx_pdm_sinc_dsr_16_en(&mut self) -> RX_PDM_SINC_DSR_16_EN_W<PDM_CONF_SPEC> {
191        RX_PDM_SINC_DSR_16_EN_W::new(self, 24)
192    }
193    #[doc = "Bit 25"]
194    #[inline(always)]
195    pub fn tx_pdm_hp_bypass(&mut self) -> TX_PDM_HP_BYPASS_W<PDM_CONF_SPEC> {
196        TX_PDM_HP_BYPASS_W::new(self, 25)
197    }
198}
199#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`pdm_conf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdm_conf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
200pub struct PDM_CONF_SPEC;
201impl crate::RegisterSpec for PDM_CONF_SPEC {
202    type Ux = u32;
203}
204#[doc = "`read()` method returns [`pdm_conf::R`](R) reader structure"]
205impl crate::Readable for PDM_CONF_SPEC {}
206#[doc = "`write(|w| ..)` method takes [`pdm_conf::W`](W) writer structure"]
207impl crate::Writable for PDM_CONF_SPEC {
208    type Safety = crate::Unsafe;
209}
210#[doc = "`reset()` method sets PDM_CONF to value 0x0155_0020"]
211impl crate::Resettable for PDM_CONF_SPEC {
212    const RESET_VALUE: u32 = 0x0155_0020;
213}