esp32

Module emac_mac

Source
Expand description

Ethernet MAC configuration and control registers

Modules§

  • emacaddr0high
    Upper 16 bits of the first 6-byte MAC address
  • emacaddr0low
    This field contains the lower 32 bits of the first 6-byte MAC address. This is used by the MAC for filtering the received frames and inserting the MAC address in the Transmit Flow Control (Pause) Frames.
  • emacaddr1high
    Upper 16 bits of the second 6-byte MAC address
  • emacaddr1low
    This field contains the lower 32 bits of the second 6-byte MAC address.The content of this field is undefined so the register needs to be configured after the initialization Process.
  • emacaddr2high
    Upper 16 bits of the third 6-byte MAC address
  • emacaddr2low
    This field contains the lower 32 bits of the third 6-byte MAC address. The content of this field is undefined so the register needs to be configured after the initialization process.
  • emacaddr3high
    Upper 16 bits of the fourth 6-byte MAC address
  • emacaddr3low
    This field contains the lower 32 bits of the fourth 6-byte MAC address.The content of this field is undefined so the register needs to be configured after the initialization Process.
  • emacaddr4high
    Upper 16 bits of the fifth 6-byte MAC address
  • emacaddr4low
    This field contains the lower 32 bits of the fifth 6-byte MAC address. The content of this field is undefined so the register needs to be configured after the initialization process.
  • emacaddr5high
    Upper 16 bits of the sixth 6-byte MAC address
  • emacaddr5low
    This field contains the lower 32 bits of the sixth 6-byte MAC address. The content of this field is undefined so the register needs to be configured after the initialization process.
  • emacaddr6high
    Upper 16 bits of the seventh 6-byte MAC address
  • emacaddr6low
    This field contains the lower 32 bits of the seventh 6-byte MAC address.The content of this field is undefined so the register needs to be configured after the initialization Process.
  • emacaddr7high
    Upper 16 bits of the eighth 6-byte MAC address
  • emacaddr7low
    This field contains the lower 32 bits of the eighth 6-byte MAC address.The content of this field is undefined so the register needs to be configured after the initialization Process.
  • emacconfig
    MAC configuration
  • emaccstatus
    Link communication status
  • emacdebug
    Status debugging bits
  • emacfc
    Frame flow control
  • emacff
    Frame filter settings
  • emacgmiiaddr
    PHY configuration access
  • emacintmask
    Interrupt mask
  • emacints
    Interrupt status
  • emaclpi_crs
    LPI Control and Status
  • emaclpitimerscontrol
    LPI Timers Control
  • emacmiidata
    PHY data read write
  • emacwdogto
    Watchdog timeout control
  • pmt_csr
    PMT Control and Status
  • pmt_rwuffr
    The MSB (31st bit) must be zero.Bit j[30:0] is the byte mask. If Bit 1/2/3/4 (byte number) of the byte mask is set the CRC block processes the Filter 1/2/3/4 Offset + j of the incoming packet(PWKPTR is 0/1/2/3).RWKPTR is 0:Filter 0 Byte Mask .RWKPTR is 1:Filter 1 Byte Mask RWKPTR is 2:Filter 2 Byte Mask RWKPTR is 3:Filter 3 Byte Mask RWKPTR is 4:Bit 3/11/19/27 specifies the address type defining the destination address type of the pattern.When the bit is set the pattern applies to only multicast packets

Structs§

Type Aliases§

  • EMACADDR0HIGH
    EMACADDR0HIGH (rw) register accessor: Upper 16 bits of the first 6-byte MAC address
  • EMACADDR0LOW
    EMACADDR0LOW (rw) register accessor: This field contains the lower 32 bits of the first 6-byte MAC address. This is used by the MAC for filtering the received frames and inserting the MAC address in the Transmit Flow Control (Pause) Frames.
  • EMACADDR1HIGH
    EMACADDR1HIGH (rw) register accessor: Upper 16 bits of the second 6-byte MAC address
  • EMACADDR1LOW
    EMACADDR1LOW (rw) register accessor: This field contains the lower 32 bits of the second 6-byte MAC address.The content of this field is undefined so the register needs to be configured after the initialization Process.
  • EMACADDR2HIGH
    EMACADDR2HIGH (rw) register accessor: Upper 16 bits of the third 6-byte MAC address
  • EMACADDR2LOW
    EMACADDR2LOW (rw) register accessor: This field contains the lower 32 bits of the third 6-byte MAC address. The content of this field is undefined so the register needs to be configured after the initialization process.
  • EMACADDR3HIGH
    EMACADDR3HIGH (rw) register accessor: Upper 16 bits of the fourth 6-byte MAC address
  • EMACADDR3LOW
    EMACADDR3LOW (rw) register accessor: This field contains the lower 32 bits of the fourth 6-byte MAC address.The content of this field is undefined so the register needs to be configured after the initialization Process.
  • EMACADDR4HIGH
    EMACADDR4HIGH (rw) register accessor: Upper 16 bits of the fifth 6-byte MAC address
  • EMACADDR4LOW
    EMACADDR4LOW (rw) register accessor: This field contains the lower 32 bits of the fifth 6-byte MAC address. The content of this field is undefined so the register needs to be configured after the initialization process.
  • EMACADDR5HIGH
    EMACADDR5HIGH (rw) register accessor: Upper 16 bits of the sixth 6-byte MAC address
  • EMACADDR5LOW
    EMACADDR5LOW (rw) register accessor: This field contains the lower 32 bits of the sixth 6-byte MAC address. The content of this field is undefined so the register needs to be configured after the initialization process.
  • EMACADDR6HIGH
    EMACADDR6HIGH (rw) register accessor: Upper 16 bits of the seventh 6-byte MAC address
  • EMACADDR6LOW
    EMACADDR6LOW (rw) register accessor: This field contains the lower 32 bits of the seventh 6-byte MAC address.The content of this field is undefined so the register needs to be configured after the initialization Process.
  • EMACADDR7HIGH
    EMACADDR7HIGH (rw) register accessor: Upper 16 bits of the eighth 6-byte MAC address
  • EMACADDR7LOW
    EMACADDR7LOW (rw) register accessor: This field contains the lower 32 bits of the eighth 6-byte MAC address.The content of this field is undefined so the register needs to be configured after the initialization Process.
  • EMACCONFIG
    EMACCONFIG (rw) register accessor: MAC configuration
  • EMACCSTATUS
    EMACCSTATUS (r) register accessor: Link communication status
  • EMACDEBUG
    EMACDEBUG (r) register accessor: Status debugging bits
  • EMACFC
    EMACFC (rw) register accessor: Frame flow control
  • EMACFF
    EMACFF (rw) register accessor: Frame filter settings
  • EMACGMIIADDR
    EMACGMIIADDR (rw) register accessor: PHY configuration access
  • EMACINTMASK
    EMACINTMASK (rw) register accessor: Interrupt mask
  • EMACINTS
    EMACINTS (r) register accessor: Interrupt status
  • EMACLPITIMERSCONTROL
    EMACLPITIMERSCONTROL (r) register accessor: LPI Timers Control
  • EMACLPI_CRS
    EMACLPI_CRS (r) register accessor: LPI Control and Status
  • EMACMIIDATA
    EMACMIIDATA (rw) register accessor: PHY data read write
  • EMACWDOGTO
    EMACWDOGTO (rw) register accessor: Watchdog timeout control
  • PMT_CSR
    PMT_CSR (r) register accessor: PMT Control and Status
  • PMT_RWUFFR
    PMT_RWUFFR (r) register accessor: The MSB (31st bit) must be zero.Bit j[30:0] is the byte mask. If Bit 1/2/3/4 (byte number) of the byte mask is set the CRC block processes the Filter 1/2/3/4 Offset + j of the incoming packet(PWKPTR is 0/1/2/3).RWKPTR is 0:Filter 0 Byte Mask .RWKPTR is 1:Filter 1 Byte Mask RWKPTR is 2:Filter 2 Byte Mask RWKPTR is 3:Filter 3 Byte Mask RWKPTR is 4:Bit 3/11/19/27 specifies the address type defining the destination address type of the pattern.When the bit is set the pattern applies to only multicast packets