Expand description
SD/MMC Host Controller
Modules§
- Card data block size configuration register
- Burst mode transfer configuration register
- Host buffer address pointer register
- CPU write and read transmit data by FIFO
- Data transfer length configuration register
- Card Threshold Control register
- Card detect register
- SDIO control register.
- Clock divider configuration register
- Clock enable register
- Clock source selection register
- Command and boot configuration register
- Command argument data register
- Control register
- Card bus width configuration register
- Descriptor base address register
- Debounce filter time configuration register
- Host descriptor address pointer
- eMMC DDR register
- Enable Phase Shift register
- FIFO configuration register
- Hardware feature register
- IDMAC interrupt enable register
- IDMAC status register
- SDIO interrupt mask register
- Masked interrupt status register
- Poll demand configuration register
- Response data register
- Long response data register
- Long response data register
- Long response data register
- Raw interrupt status register
- Card reset register
- SD/MMC status register
- Transferred byte count register
- Transferred byte count register
- Data and response timeout configuration register
- UHS-1 register
- User ID (scratchpad) register
- Version ID (scratchpad) register
- Card write protection (WP) status register
Structs§
- Register block
Type Aliases§
- BLKSIZ (rw) register accessor: Card data block size configuration register
- BMOD (rw) register accessor: Burst mode transfer configuration register
- BUFADDR (r) register accessor: Host buffer address pointer register
- BUFFIFO (rw) register accessor: CPU write and read transmit data by FIFO
- BYTCNT (rw) register accessor: Data transfer length configuration register
- CARDTHRCTL (rw) register accessor: Card Threshold Control register
- CDETECT (r) register accessor: Card detect register
- CLKDIV (rw) register accessor: Clock divider configuration register
- CLKENA (rw) register accessor: Clock enable register
- CLKSRC (rw) register accessor: Clock source selection register
- CLK_EDGE_SEL (rw) register accessor: SDIO control register.
- CMD (rw) register accessor: Command and boot configuration register
- CMDARG (rw) register accessor: Command argument data register
- CTRL (rw) register accessor: Control register
- CTYPE (rw) register accessor: Card bus width configuration register
- DBADDR (rw) register accessor: Descriptor base address register
- DEBNCE (rw) register accessor: Debounce filter time configuration register
- DSCADDR (r) register accessor: Host descriptor address pointer
- EMMCDDR (rw) register accessor: eMMC DDR register
- ENSHIFT (rw) register accessor: Enable Phase Shift register
- FIFOTH (rw) register accessor: FIFO configuration register
- HCON (r) register accessor: Hardware feature register
- IDINTEN (rw) register accessor: IDMAC interrupt enable register
- IDSTS (rw) register accessor: IDMAC status register
- INTMASK (rw) register accessor: SDIO interrupt mask register
- MINTSTS (r) register accessor: Masked interrupt status register
- PLDMND (w) register accessor: Poll demand configuration register
- RESP0 (r) register accessor: Response data register
- RESP1 (r) register accessor: Long response data register
- RESP2 (r) register accessor: Long response data register
- RESP3 (r) register accessor: Long response data register
- RINTSTS (rw) register accessor: Raw interrupt status register
- RST_N (rw) register accessor: Card reset register
- STATUS (r) register accessor: SD/MMC status register
- TBBCNT (r) register accessor: Transferred byte count register
- TCBCNT (r) register accessor: Transferred byte count register
- TMOUT (rw) register accessor: Data and response timeout configuration register
- UHS (rw) register accessor: UHS-1 register
- USRID (rw) register accessor: User ID (scratchpad) register
- VERID (r) register accessor: Version ID (scratchpad) register
- WRTPRT (r) register accessor: Card write protection (WP) status register