#[repr(u16)]
pub enum Interrupt {
Show 67 variants
WIFI_MAC,
WIFI_NMI,
WIFI_BB,
BT_MAC,
BT_BB,
BT_BB_NMI,
RWBT,
RWBLE,
RWBT_NMI,
RWBLE_NMI,
UHCI0,
UHCI1,
TG0_T0_LEVEL,
TG0_T1_LEVEL,
TG0_WDT_LEVEL,
TG0_LACT_LEVEL,
TG1_T0_LEVEL,
TG1_T1_LEVEL,
TG1_WDT_LEVEL,
TG1_LACT_LEVEL,
GPIO,
GPIO_NMI,
FROM_CPU_INTR0,
FROM_CPU_INTR1,
FROM_CPU_INTR2,
FROM_CPU_INTR3,
SPI0,
SPI1,
SPI2,
SPI3,
I2S0,
I2S1,
UART0,
UART1,
UART2,
SDIO_HOST,
ETH_MAC,
MCPWM0,
MCPWM1,
MCPWM2,
MCPWM3,
LEDC,
EFUSE,
TWAI0,
RTC_CORE,
RMT,
PCNT,
I2C_EXT0,
I2C_EXT1,
RSA,
SPI1_DMA,
SPI2_DMA,
SPI3_DMA,
WDT,
TIMER1,
TIMER2,
TG0_T0_EDGE,
TG0_T1_EDGE,
TG0_WDT_EDGE,
TG0_LACT_EDGE,
TG1_T0_EDGE,
TG1_T1_EDGE,
TG1_WDT_EDGE,
TG1_LACT_EDGE,
MMU_IA,
MPU_IA,
CACHE_IA,
}
Expand description
Enumeration of all the interrupts.
Variants§
WIFI_MAC
0 - WIFI_MAC
WIFI_NMI
1 - WIFI_NMI
WIFI_BB
2 - WIFI_BB
BT_MAC
3 - BT_MAC
BT_BB
4 - BT_BB
BT_BB_NMI
5 - BT_BB_NMI
RWBT
6 - RWBT
RWBLE
7 - RWBLE
RWBT_NMI
8 - RWBT_NMI
RWBLE_NMI
9 - RWBLE_NMI
UHCI0
12 - UHCI0
UHCI1
13 - UHCI1
TG0_T0_LEVEL
14 - TG0_T0_LEVEL
TG0_T1_LEVEL
15 - TG0_T1_LEVEL
TG0_WDT_LEVEL
16 - TG0_WDT_LEVEL
TG0_LACT_LEVEL
17 - TG0_LACT_LEVEL
TG1_T0_LEVEL
18 - TG1_T0_LEVEL
TG1_T1_LEVEL
19 - TG1_T1_LEVEL
TG1_WDT_LEVEL
20 - TG1_WDT_LEVEL
TG1_LACT_LEVEL
21 - TG1_LACT_LEVEL
GPIO
22 - GPIO
GPIO_NMI
23 - GPIO_NMI
FROM_CPU_INTR0
24 - FROM_CPU_INTR0
FROM_CPU_INTR1
25 - FROM_CPU_INTR1
FROM_CPU_INTR2
26 - FROM_CPU_INTR2
FROM_CPU_INTR3
27 - FROM_CPU_INTR3
SPI0
28 - SPI0
SPI1
29 - SPI1
SPI2
30 - SPI2
SPI3
31 - SPI3
I2S0
32 - I2S0
I2S1
33 - I2S1
UART0
34 - UART0
UART1
35 - UART1
UART2
36 - UART2
SDIO_HOST
37 - SDIO_HOST
ETH_MAC
38 - ETH_MAC
MCPWM0
39 - MCPWM0
MCPWM1
40 - MCPWM1
MCPWM2
41 - MCPWM2
MCPWM3
42 - MCPWM3
LEDC
43 - LEDC
EFUSE
44 - EFUSE
TWAI0
45 - TWAI0
RTC_CORE
46 - RTC_CORE
RMT
47 - RMT
PCNT
48 - PCNT
I2C_EXT0
49 - I2C_EXT0
I2C_EXT1
50 - I2C_EXT1
RSA
51 - RSA
SPI1_DMA
52 - SPI1_DMA
SPI2_DMA
53 - SPI2_DMA
SPI3_DMA
54 - SPI3_DMA
WDT
55 - WDT
TIMER1
56 - TIMER1
TIMER2
57 - TIMER2
TG0_T0_EDGE
58 - TG0_T0_EDGE
TG0_T1_EDGE
59 - TG0_T1_EDGE
TG0_WDT_EDGE
60 - TG0_WDT_EDGE
TG0_LACT_EDGE
61 - TG0_LACT_EDGE
TG1_T0_EDGE
62 - TG1_T0_EDGE
TG1_T1_EDGE
63 - TG1_T1_EDGE
TG1_WDT_EDGE
64 - TG1_WDT_EDGE
TG1_LACT_EDGE
65 - TG1_LACT_EDGE
MMU_IA
66 - MMU_IA
MPU_IA
67 - MPU_IA
CACHE_IA
68 - CACHE_IA