esp32 0.2.1

Peripheral access crate for the ESP32
Documentation 
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#[doc = "Reader of register U0_STATUS"]
pub type R = crate::R<u32, super::U0_STATUS>;
#[doc = "Writer for register U0_STATUS"]
pub type W = crate::W<u32, super::U0_STATUS>;
#[doc = "Register U0_STATUS `reset()`'s with value 0"]
impl crate::ResetValue for super::U0_STATUS {
    type Type = u32;
    #[inline(always)]
    fn reset_value() -> Self::Type {
        0
    }
}
#[doc = "Reader of field `CORE_STATUS_U0`"]
pub type CORE_STATUS_U0_R = crate::R<u32, u32>;
#[doc = "Write proxy for field `CORE_STATUS_U0`"]
pub struct CORE_STATUS_U0_W<'a> {
    w: &'a mut W,
}
impl<'a> CORE_STATUS_U0_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u32) -> &'a mut W {
        self.w.bits = (self.w.bits & !0xffff_ffff) | ((value as u32) & 0xffff_ffff);
        self.w
    }
}
impl R {
    #[doc = "Bits 0:31"]
    #[inline(always)]
    pub fn core_status_u0(&self) -> CORE_STATUS_U0_R {
        CORE_STATUS_U0_R::new((self.bits & 0xffff_ffff) as u32)
    }
}
impl W {
    #[doc = "Bits 0:31"]
    #[inline(always)]
    pub fn core_status_u0(&mut self) -> CORE_STATUS_U0_W {
        CORE_STATUS_U0_W { w: self }
    }
}