Expand description
Structs
Register SRAM_CMD
reader
This register you can [read
]
(crate::generic::Reg::read), [write_with_zero
]
(crate::generic::Reg::write_with_zero), [reset
]
(crate::generic::Reg::reset), write
(crate::generic::Reg::write), [modify
]
(crate::generic::Reg::modify). See [API]
(https://docs.rs/svd2rust/#read–modify–write-api).
Field SRAM_DIO
reader - For SPI0 SRAM DIO mode enable . SRAM DIO enable command will be send when the bit is set. The bit will be cleared once the operation done.
Field SRAM_DIO
writer - For SPI0 SRAM DIO mode enable . SRAM DIO enable command will be send when the bit is set. The bit will be cleared once the operation done.
Field SRAM_QIO
reader - For SPI0 SRAM QIO mode enable . SRAM QIO enable command will be send when the bit is set. The bit will be cleared once the operation done.
Field SRAM_QIO
writer - For SPI0 SRAM QIO mode enable . SRAM QIO enable command will be send when the bit is set. The bit will be cleared once the operation done.
Field SRAM_RSTIO
reader - For SPI0 SRAM IO mode reset enable. SRAM IO mode reset operation will be triggered when the bit is set. The bit will be cleared once the operation done
Field SRAM_RSTIO
writer - For SPI0 SRAM IO mode reset enable. SRAM IO mode reset operation will be triggered when the bit is set. The bit will be cleared once the operation done
Register SRAM_CMD
writer