#[doc = "Register `RXFIFO_ST` reader"]
pub struct R(crate::R<RXFIFO_ST_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<RXFIFO_ST_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::convert::From<crate::R<RXFIFO_ST_SPEC>> for R {
fn from(reader: crate::R<RXFIFO_ST_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `RXFIFO_ST` writer"]
pub struct W(crate::W<RXFIFO_ST_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<RXFIFO_ST_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl core::convert::From<crate::W<RXFIFO_ST_SPEC>> for W {
fn from(writer: crate::W<RXFIFO_ST_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `TXFIFO_END_ADDR` reader - "]
pub struct TXFIFO_END_ADDR_R(crate::FieldReader<u8, u8>);
impl TXFIFO_END_ADDR_R {
pub(crate) fn new(bits: u8) -> Self {
TXFIFO_END_ADDR_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for TXFIFO_END_ADDR_R {
type Target = crate::FieldReader<u8, u8>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `TXFIFO_END_ADDR` writer - "]
pub struct TXFIFO_END_ADDR_W<'a> {
w: &'a mut W,
}
impl<'a> TXFIFO_END_ADDR_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x1f << 15)) | (((value as u32) & 0x1f) << 15);
self.w
}
}
#[doc = "Field `TXFIFO_START_ADDR` reader - "]
pub struct TXFIFO_START_ADDR_R(crate::FieldReader<u8, u8>);
impl TXFIFO_START_ADDR_R {
pub(crate) fn new(bits: u8) -> Self {
TXFIFO_START_ADDR_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for TXFIFO_START_ADDR_R {
type Target = crate::FieldReader<u8, u8>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `TXFIFO_START_ADDR` writer - "]
pub struct TXFIFO_START_ADDR_W<'a> {
w: &'a mut W,
}
impl<'a> TXFIFO_START_ADDR_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x1f << 10)) | (((value as u32) & 0x1f) << 10);
self.w
}
}
#[doc = "Field `RXFIFO_END_ADDR` reader - "]
pub struct RXFIFO_END_ADDR_R(crate::FieldReader<u8, u8>);
impl RXFIFO_END_ADDR_R {
pub(crate) fn new(bits: u8) -> Self {
RXFIFO_END_ADDR_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for RXFIFO_END_ADDR_R {
type Target = crate::FieldReader<u8, u8>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `RXFIFO_END_ADDR` writer - "]
pub struct RXFIFO_END_ADDR_W<'a> {
w: &'a mut W,
}
impl<'a> RXFIFO_END_ADDR_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x1f << 5)) | (((value as u32) & 0x1f) << 5);
self.w
}
}
#[doc = "Field `RXFIFO_START_ADDR` reader - "]
pub struct RXFIFO_START_ADDR_R(crate::FieldReader<u8, u8>);
impl RXFIFO_START_ADDR_R {
pub(crate) fn new(bits: u8) -> Self {
RXFIFO_START_ADDR_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for RXFIFO_START_ADDR_R {
type Target = crate::FieldReader<u8, u8>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `RXFIFO_START_ADDR` writer - "]
pub struct RXFIFO_START_ADDR_W<'a> {
w: &'a mut W,
}
impl<'a> RXFIFO_START_ADDR_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !0x1f) | ((value as u32) & 0x1f);
self.w
}
}
impl R {
#[doc = "Bits 15:19"]
#[inline(always)]
pub fn txfifo_end_addr(&self) -> TXFIFO_END_ADDR_R {
TXFIFO_END_ADDR_R::new(((self.bits >> 15) & 0x1f) as u8)
}
#[doc = "Bits 10:14"]
#[inline(always)]
pub fn txfifo_start_addr(&self) -> TXFIFO_START_ADDR_R {
TXFIFO_START_ADDR_R::new(((self.bits >> 10) & 0x1f) as u8)
}
#[doc = "Bits 5:9"]
#[inline(always)]
pub fn rxfifo_end_addr(&self) -> RXFIFO_END_ADDR_R {
RXFIFO_END_ADDR_R::new(((self.bits >> 5) & 0x1f) as u8)
}
#[doc = "Bits 0:4"]
#[inline(always)]
pub fn rxfifo_start_addr(&self) -> RXFIFO_START_ADDR_R {
RXFIFO_START_ADDR_R::new((self.bits & 0x1f) as u8)
}
}
impl W {
#[doc = "Bits 15:19"]
#[inline(always)]
pub fn txfifo_end_addr(&mut self) -> TXFIFO_END_ADDR_W {
TXFIFO_END_ADDR_W { w: self }
}
#[doc = "Bits 10:14"]
#[inline(always)]
pub fn txfifo_start_addr(&mut self) -> TXFIFO_START_ADDR_W {
TXFIFO_START_ADDR_W { w: self }
}
#[doc = "Bits 5:9"]
#[inline(always)]
pub fn rxfifo_end_addr(&mut self) -> RXFIFO_END_ADDR_W {
RXFIFO_END_ADDR_W { w: self }
}
#[doc = "Bits 0:4"]
#[inline(always)]
pub fn rxfifo_start_addr(&mut self) -> RXFIFO_START_ADDR_W {
RXFIFO_START_ADDR_W { w: self }
}
#[doc = "Writes raw bits to the register."]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "I2C_RXFIFO_ST\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxfifo_st](index.html) module"]
pub struct RXFIFO_ST_SPEC;
impl crate::RegisterSpec for RXFIFO_ST_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [rxfifo_st::R](R) reader structure"]
impl crate::Readable for RXFIFO_ST_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [rxfifo_st::W](W) writer structure"]
impl crate::Writable for RXFIFO_ST_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets RXFIFO_ST to value 0"]
impl crate::Resettable for RXFIFO_ST_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}