Struct esp32_hal::peripherals::SYSTEM

pub struct SYSTEM { /* private fields */ }

Implementations

impl SYSTEM

pub unsafe fn steal() -> SYSTEM

Unsafely create an instance of this peripheral out of thin air.

Safety

You must ensure that you’re only using one instance of this type at a time.

pub const PTR: *const <DPORT as Deref>::Target = {0x3ff00000 as *const <esp32::DPORT as core::ops::Deref>::Target}

Pointer to the register block

pub const fn ptr() -> *const <DPORT as Deref>::Target

Return the pointer to the register block

Methods from Deref<Target = RegisterBlock>

pub fn pro_boot_remap_ctrl(&self) -> &Reg<PRO_BOOT_REMAP_CTRL_SPEC>

0x00 -

pub fn app_boot_remap_ctrl(&self) -> &Reg<APP_BOOT_REMAP_CTRL_SPEC>

0x04 -

pub fn access_check(&self) -> &Reg<ACCESS_CHECK_SPEC>

0x08 -

pub fn pro_dport_apb_mask0(&self) -> &Reg<PRO_DPORT_APB_MASK0_SPEC>

0x0c -

pub fn pro_dport_apb_mask1(&self) -> &Reg<PRO_DPORT_APB_MASK1_SPEC>

0x10 -

pub fn app_dport_apb_mask0(&self) -> &Reg<APP_DPORT_APB_MASK0_SPEC>

0x14 -

pub fn app_dport_apb_mask1(&self) -> &Reg<APP_DPORT_APB_MASK1_SPEC>

0x18 -

pub fn peri_clk_en(&self) -> &Reg<PERI_CLK_EN_SPEC>

0x1c -

pub fn peri_rst_en(&self) -> &Reg<PERI_RST_EN_SPEC>

0x20 -

pub fn wifi_bb_cfg(&self) -> &Reg<WIFI_BB_CFG_SPEC>

0x24 -

pub fn wifi_bb_cfg_2(&self) -> &Reg<WIFI_BB_CFG_2_SPEC>

0x28 -

pub fn appcpu_ctrl_a(&self) -> &Reg<APPCPU_CTRL_A_SPEC>

0x2c -

pub fn appcpu_ctrl_b(&self) -> &Reg<APPCPU_CTRL_B_SPEC>

0x30 -

pub fn appcpu_ctrl_c(&self) -> &Reg<APPCPU_CTRL_C_SPEC>

0x34 -

pub fn appcpu_ctrl_d(&self) -> &Reg<APPCPU_CTRL_D_SPEC>

0x38 -

pub fn cpu_per_conf(&self) -> &Reg<CPU_PER_CONF_SPEC>

0x3c -

pub fn pro_cache_ctrl(&self) -> &Reg<PRO_CACHE_CTRL_SPEC>

0x40 -

pub fn pro_cache_ctrl1(&self) -> &Reg<PRO_CACHE_CTRL1_SPEC>

0x44 -

pub fn pro_cache_lock_0_addr(&self) -> &Reg<PRO_CACHE_LOCK_0_ADDR_SPEC>

0x48 -

pub fn pro_cache_lock_1_addr(&self) -> &Reg<PRO_CACHE_LOCK_1_ADDR_SPEC>

0x4c -

pub fn pro_cache_lock_2_addr(&self) -> &Reg<PRO_CACHE_LOCK_2_ADDR_SPEC>

0x50 -

pub fn pro_cache_lock_3_addr(&self) -> &Reg<PRO_CACHE_LOCK_3_ADDR_SPEC>

0x54 -

pub fn app_cache_ctrl(&self) -> &Reg<APP_CACHE_CTRL_SPEC>

0x58 -

pub fn app_cache_ctrl1(&self) -> &Reg<APP_CACHE_CTRL1_SPEC>

0x5c -

pub fn app_cache_lock_0_addr(&self) -> &Reg<APP_CACHE_LOCK_0_ADDR_SPEC>

0x60 -

pub fn app_cache_lock_1_addr(&self) -> &Reg<APP_CACHE_LOCK_1_ADDR_SPEC>

0x64 -

pub fn app_cache_lock_2_addr(&self) -> &Reg<APP_CACHE_LOCK_2_ADDR_SPEC>

0x68 -

pub fn app_cache_lock_3_addr(&self) -> &Reg<APP_CACHE_LOCK_3_ADDR_SPEC>

0x6c -

pub fn tracemem_mux_mode(&self) -> &Reg<TRACEMEM_MUX_MODE_SPEC>

0x70 -

pub fn pro_tracemem_ena(&self) -> &Reg<PRO_TRACEMEM_ENA_SPEC>

0x74 -

pub fn app_tracemem_ena(&self) -> &Reg<APP_TRACEMEM_ENA_SPEC>

0x78 -

pub fn cache_mux_mode(&self) -> &Reg<CACHE_MUX_MODE_SPEC>

0x7c -

pub fn immu_page_mode(&self) -> &Reg<IMMU_PAGE_MODE_SPEC>

0x80 -

pub fn dmmu_page_mode(&self) -> &Reg<DMMU_PAGE_MODE_SPEC>

0x84 -

pub fn rom_mpu_ena(&self) -> &Reg<ROM_MPU_ENA_SPEC>

0x88 -

pub fn mem_pd_mask(&self) -> &Reg<MEM_PD_MASK_SPEC>

0x8c -

pub fn rom_pd_ctrl(&self) -> &Reg<ROM_PD_CTRL_SPEC>

0x90 -

pub fn rom_fo_ctrl(&self) -> &Reg<ROM_FO_CTRL_SPEC>

0x94 -

pub fn sram_pd_ctrl_0(&self) -> &Reg<SRAM_PD_CTRL_0_SPEC>

0x98 -

pub fn sram_pd_ctrl_1(&self) -> &Reg<SRAM_PD_CTRL_1_SPEC>

0x9c -

pub fn sram_fo_ctrl_0(&self) -> &Reg<SRAM_FO_CTRL_0_SPEC>

0xa0 -

pub fn sram_fo_ctrl_1(&self) -> &Reg<SRAM_FO_CTRL_1_SPEC>

0xa4 -

pub fn iram_dram_ahb_sel(&self) -> &Reg<IRAM_DRAM_AHB_SEL_SPEC>

0xa8 -

pub fn tag_fo_ctrl(&self) -> &Reg<TAG_FO_CTRL_SPEC>

0xac -

pub fn ahb_lite_mask(&self) -> &Reg<AHB_LITE_MASK_SPEC>

0xb0 -

pub fn ahb_mpu_table_0(&self) -> &Reg<AHB_MPU_TABLE_0_SPEC>

0xb4 -

pub fn ahb_mpu_table_1(&self) -> &Reg<AHB_MPU_TABLE_1_SPEC>

0xb8 -

pub fn host_inf_sel(&self) -> &Reg<HOST_INF_SEL_SPEC>

0xbc -

pub fn perip_clk_en(&self) -> &Reg<PERIP_CLK_EN_SPEC>

0xc0 -

pub fn perip_rst_en(&self) -> &Reg<PERIP_RST_EN_SPEC>

0xc4 -

pub fn slave_spi_config(&self) -> &Reg<SLAVE_SPI_CONFIG_SPEC>

0xc8 -

pub fn wifi_clk_en(&self) -> &Reg<WIFI_CLK_EN_SPEC>

0xcc -

pub fn core_rst_en(&self) -> &Reg<CORE_RST_EN_SPEC>

0xd0 -

pub fn bt_lpck_div_int(&self) -> &Reg<BT_LPCK_DIV_INT_SPEC>

0xd4 -

pub fn bt_lpck_div_frac(&self) -> &Reg<BT_LPCK_DIV_FRAC_SPEC>

0xd8 -

pub fn cpu_intr_from_cpu_0(&self) -> &Reg<CPU_INTR_FROM_CPU_0_SPEC>

0xdc -

pub fn cpu_intr_from_cpu_1(&self) -> &Reg<CPU_INTR_FROM_CPU_1_SPEC>

0xe0 -

pub fn cpu_intr_from_cpu_2(&self) -> &Reg<CPU_INTR_FROM_CPU_2_SPEC>

0xe4 -

pub fn cpu_intr_from_cpu_3(&self) -> &Reg<CPU_INTR_FROM_CPU_3_SPEC>

0xe8 -

pub fn pro_intr_status_0(&self) -> &Reg<PRO_INTR_STATUS_0_SPEC>

0xec -

pub fn pro_intr_status_1(&self) -> &Reg<PRO_INTR_STATUS_1_SPEC>

0xf0 -

pub fn pro_intr_status_2(&self) -> &Reg<PRO_INTR_STATUS_2_SPEC>

0xf4 -

pub fn app_intr_status_0(&self) -> &Reg<APP_INTR_STATUS_0_SPEC>

0xf8 -

pub fn app_intr_status_1(&self) -> &Reg<APP_INTR_STATUS_1_SPEC>

0xfc -

pub fn app_intr_status_2(&self) -> &Reg<APP_INTR_STATUS_2_SPEC>

0x100 -

pub fn pro_mac_intr_map(&self) -> &Reg<PRO_MAC_INTR_MAP_SPEC>

0x104 -

pub fn pro_mac_nmi_map(&self) -> &Reg<PRO_MAC_NMI_MAP_SPEC>

0x108 -

pub fn pro_bb_int_map(&self) -> &Reg<PRO_BB_INT_MAP_SPEC>

0x10c -

pub fn pro_bt_mac_int_map(&self) -> &Reg<PRO_BT_MAC_INT_MAP_SPEC>

0x110 -

pub fn pro_bt_bb_int_map(&self) -> &Reg<PRO_BT_BB_INT_MAP_SPEC>

0x114 -

pub fn pro_bt_bb_nmi_map(&self) -> &Reg<PRO_BT_BB_NMI_MAP_SPEC>

0x118 -

pub fn pro_rwbt_irq_map(&self) -> &Reg<PRO_RWBT_IRQ_MAP_SPEC>

0x11c -

pub fn pro_rwble_irq_map(&self) -> &Reg<PRO_RWBLE_IRQ_MAP_SPEC>

0x120 -

pub fn pro_rwbt_nmi_map(&self) -> &Reg<PRO_RWBT_NMI_MAP_SPEC>

0x124 -

pub fn pro_rwble_nmi_map(&self) -> &Reg<PRO_RWBLE_NMI_MAP_SPEC>

0x128 -

pub fn pro_slc0_intr_map(&self) -> &Reg<PRO_SLC0_INTR_MAP_SPEC>

0x12c -

pub fn pro_slc1_intr_map(&self) -> &Reg<PRO_SLC1_INTR_MAP_SPEC>

0x130 -

pub fn pro_uhci0_intr_map(&self) -> &Reg<PRO_UHCI0_INTR_MAP_SPEC>

0x134 -

pub fn pro_uhci1_intr_map(&self) -> &Reg<PRO_UHCI1_INTR_MAP_SPEC>

0x138 -

pub fn pro_tg_t0_level_int_map(&self) -> &Reg<PRO_TG_T0_LEVEL_INT_MAP_SPEC>

0x13c -

pub fn pro_tg_t1_level_int_map(&self) -> &Reg<PRO_TG_T1_LEVEL_INT_MAP_SPEC>

0x140 -

pub fn pro_tg_wdt_level_int_map(&self) -> &Reg<PRO_TG_WDT_LEVEL_INT_MAP_SPEC>

0x144 -

pub fn pro_tg_lact_level_int_map(&self) -> &Reg<PRO_TG_LACT_LEVEL_INT_MAP_SPEC>

0x148 -

pub fn pro_tg1_t0_level_int_map(&self) -> &Reg<PRO_TG1_T0_LEVEL_INT_MAP_SPEC>

0x14c -

pub fn pro_tg1_t1_level_int_map(&self) -> &Reg<PRO_TG1_T1_LEVEL_INT_MAP_SPEC>

0x150 -

pub fn pro_tg1_wdt_level_int_map(&self) -> &Reg<PRO_TG1_WDT_LEVEL_INT_MAP_SPEC>

0x154 -

pub fn pro_tg1_lact_level_int_map( &self ) -> &Reg<PRO_TG1_LACT_LEVEL_INT_MAP_SPEC>

0x158 -

pub fn pro_gpio_interrupt_map(&self) -> &Reg<PRO_GPIO_INTERRUPT_MAP_SPEC>

0x15c -

pub fn pro_gpio_interrupt_nmi_map( &self ) -> &Reg<PRO_GPIO_INTERRUPT_NMI_MAP_SPEC>

0x160 -

pub fn pro_cpu_intr_from_cpu_0_map( &self ) -> &Reg<PRO_CPU_INTR_FROM_CPU_0_MAP_SPEC>

0x164 -

pub fn pro_cpu_intr_from_cpu_1_map( &self ) -> &Reg<PRO_CPU_INTR_FROM_CPU_1_MAP_SPEC>

0x168 -

pub fn pro_cpu_intr_from_cpu_2_map( &self ) -> &Reg<PRO_CPU_INTR_FROM_CPU_2_MAP_SPEC>

0x16c -

pub fn pro_cpu_intr_from_cpu_3_map( &self ) -> &Reg<PRO_CPU_INTR_FROM_CPU_3_MAP_SPEC>

0x170 -

pub fn pro_spi_intr_0_map(&self) -> &Reg<PRO_SPI_INTR_0_MAP_SPEC>

0x174 -

pub fn pro_spi_intr_1_map(&self) -> &Reg<PRO_SPI_INTR_1_MAP_SPEC>

0x178 -

pub fn pro_spi_intr_2_map(&self) -> &Reg<PRO_SPI_INTR_2_MAP_SPEC>

0x17c -

pub fn pro_spi_intr_3_map(&self) -> &Reg<PRO_SPI_INTR_3_MAP_SPEC>

0x180 -

pub fn pro_i2s0_int_map(&self) -> &Reg<PRO_I2S0_INT_MAP_SPEC>

0x184 -

pub fn pro_i2s1_int_map(&self) -> &Reg<PRO_I2S1_INT_MAP_SPEC>

0x188 -

pub fn pro_uart_intr_map(&self) -> &Reg<PRO_UART_INTR_MAP_SPEC>

0x18c -

pub fn pro_uart1_intr_map(&self) -> &Reg<PRO_UART1_INTR_MAP_SPEC>

0x190 -

pub fn pro_uart2_intr_map(&self) -> &Reg<PRO_UART2_INTR_MAP_SPEC>

0x194 -

pub fn pro_sdio_host_interrupt_map( &self ) -> &Reg<PRO_SDIO_HOST_INTERRUPT_MAP_SPEC>

0x198 -

pub fn pro_emac_int_map(&self) -> &Reg<PRO_EMAC_INT_MAP_SPEC>

0x19c -

pub fn pro_pwm0_intr_map(&self) -> &Reg<PRO_PWM0_INTR_MAP_SPEC>

0x1a0 -

pub fn pro_pwm1_intr_map(&self) -> &Reg<PRO_PWM1_INTR_MAP_SPEC>

0x1a4 -

pub fn pro_pwm2_intr_map(&self) -> &Reg<PRO_PWM2_INTR_MAP_SPEC>

0x1a8 -

pub fn pro_pwm3_intr_map(&self) -> &Reg<PRO_PWM3_INTR_MAP_SPEC>

0x1ac -

pub fn pro_ledc_int_map(&self) -> &Reg<PRO_LEDC_INT_MAP_SPEC>

0x1b0 -

pub fn pro_efuse_int_map(&self) -> &Reg<PRO_EFUSE_INT_MAP_SPEC>

0x1b4 -

pub fn pro_can_int_map(&self) -> &Reg<PRO_CAN_INT_MAP_SPEC>

0x1b8 -

pub fn pro_rtc_core_intr_map(&self) -> &Reg<PRO_RTC_CORE_INTR_MAP_SPEC>

0x1bc -

pub fn pro_rmt_intr_map(&self) -> &Reg<PRO_RMT_INTR_MAP_SPEC>

0x1c0 -

pub fn pro_pcnt_intr_map(&self) -> &Reg<PRO_PCNT_INTR_MAP_SPEC>

0x1c4 -

pub fn pro_i2c_ext0_intr_map(&self) -> &Reg<PRO_I2C_EXT0_INTR_MAP_SPEC>

0x1c8 -

pub fn pro_i2c_ext1_intr_map(&self) -> &Reg<PRO_I2C_EXT1_INTR_MAP_SPEC>

0x1cc -

pub fn pro_rsa_intr_map(&self) -> &Reg<PRO_RSA_INTR_MAP_SPEC>

0x1d0 -

pub fn pro_spi1_dma_int_map(&self) -> &Reg<PRO_SPI1_DMA_INT_MAP_SPEC>

0x1d4 -

pub fn pro_spi2_dma_int_map(&self) -> &Reg<PRO_SPI2_DMA_INT_MAP_SPEC>

0x1d8 -

pub fn pro_spi3_dma_int_map(&self) -> &Reg<PRO_SPI3_DMA_INT_MAP_SPEC>

0x1dc -

pub fn pro_wdg_int_map(&self) -> &Reg<PRO_WDG_INT_MAP_SPEC>

0x1e0 -

pub fn pro_timer_int1_map(&self) -> &Reg<PRO_TIMER_INT1_MAP_SPEC>

0x1e4 -

pub fn pro_timer_int2_map(&self) -> &Reg<PRO_TIMER_INT2_MAP_SPEC>

0x1e8 -

pub fn pro_tg_t0_edge_int_map(&self) -> &Reg<PRO_TG_T0_EDGE_INT_MAP_SPEC>

0x1ec -

pub fn pro_tg_t1_edge_int_map(&self) -> &Reg<PRO_TG_T1_EDGE_INT_MAP_SPEC>

0x1f0 -

pub fn pro_tg_wdt_edge_int_map(&self) -> &Reg<PRO_TG_WDT_EDGE_INT_MAP_SPEC>

0x1f4 -

pub fn pro_tg_lact_edge_int_map(&self) -> &Reg<PRO_TG_LACT_EDGE_INT_MAP_SPEC>

0x1f8 -

pub fn pro_tg1_t0_edge_int_map(&self) -> &Reg<PRO_TG1_T0_EDGE_INT_MAP_SPEC>

0x1fc -

pub fn pro_tg1_t1_edge_int_map(&self) -> &Reg<PRO_TG1_T1_EDGE_INT_MAP_SPEC>

0x200 -

pub fn pro_tg1_wdt_edge_int_map(&self) -> &Reg<PRO_TG1_WDT_EDGE_INT_MAP_SPEC>

0x204 -

pub fn pro_tg1_lact_edge_int_map(&self) -> &Reg<PRO_TG1_LACT_EDGE_INT_MAP_SPEC>

0x208 -

pub fn pro_mmu_ia_int_map(&self) -> &Reg<PRO_MMU_IA_INT_MAP_SPEC>

0x20c -

pub fn pro_mpu_ia_int_map(&self) -> &Reg<PRO_MPU_IA_INT_MAP_SPEC>

0x210 -

pub fn pro_cache_ia_int_map(&self) -> &Reg<PRO_CACHE_IA_INT_MAP_SPEC>

0x214 -

pub fn app_mac_intr_map(&self) -> &Reg<APP_MAC_INTR_MAP_SPEC>

0x218 -

pub fn app_mac_nmi_map(&self) -> &Reg<APP_MAC_NMI_MAP_SPEC>

0x21c -

pub fn app_bb_int_map(&self) -> &Reg<APP_BB_INT_MAP_SPEC>

0x220 -

pub fn app_bt_mac_int_map(&self) -> &Reg<APP_BT_MAC_INT_MAP_SPEC>

0x224 -

pub fn app_bt_bb_int_map(&self) -> &Reg<APP_BT_BB_INT_MAP_SPEC>

0x228 -

pub fn app_bt_bb_nmi_map(&self) -> &Reg<APP_BT_BB_NMI_MAP_SPEC>

0x22c -

pub fn app_rwbt_irq_map(&self) -> &Reg<APP_RWBT_IRQ_MAP_SPEC>

0x230 -

pub fn app_rwble_irq_map(&self) -> &Reg<APP_RWBLE_IRQ_MAP_SPEC>

0x234 -

pub fn app_rwbt_nmi_map(&self) -> &Reg<APP_RWBT_NMI_MAP_SPEC>

0x238 -

pub fn app_rwble_nmi_map(&self) -> &Reg<APP_RWBLE_NMI_MAP_SPEC>

0x23c -

pub fn app_slc0_intr_map(&self) -> &Reg<APP_SLC0_INTR_MAP_SPEC>

0x240 -

pub fn app_slc1_intr_map(&self) -> &Reg<APP_SLC1_INTR_MAP_SPEC>

0x244 -

pub fn app_uhci0_intr_map(&self) -> &Reg<APP_UHCI0_INTR_MAP_SPEC>

0x248 -

pub fn app_uhci1_intr_map(&self) -> &Reg<APP_UHCI1_INTR_MAP_SPEC>

0x24c -

pub fn app_tg_t0_level_int_map(&self) -> &Reg<APP_TG_T0_LEVEL_INT_MAP_SPEC>

0x250 -

pub fn app_tg_t1_level_int_map(&self) -> &Reg<APP_TG_T1_LEVEL_INT_MAP_SPEC>

0x254 -

pub fn app_tg_wdt_level_int_map(&self) -> &Reg<APP_TG_WDT_LEVEL_INT_MAP_SPEC>

0x258 -

pub fn app_tg_lact_level_int_map(&self) -> &Reg<APP_TG_LACT_LEVEL_INT_MAP_SPEC>

0x25c -

pub fn app_tg1_t0_level_int_map(&self) -> &Reg<APP_TG1_T0_LEVEL_INT_MAP_SPEC>

0x260 -

pub fn app_tg1_t1_level_int_map(&self) -> &Reg<APP_TG1_T1_LEVEL_INT_MAP_SPEC>

0x264 -

pub fn app_tg1_wdt_level_int_map(&self) -> &Reg<APP_TG1_WDT_LEVEL_INT_MAP_SPEC>

0x268 -

pub fn app_tg1_lact_level_int_map( &self ) -> &Reg<APP_TG1_LACT_LEVEL_INT_MAP_SPEC>

0x26c -

pub fn app_gpio_interrupt_map(&self) -> &Reg<APP_GPIO_INTERRUPT_MAP_SPEC>

0x270 -

pub fn app_gpio_interrupt_nmi_map( &self ) -> &Reg<APP_GPIO_INTERRUPT_NMI_MAP_SPEC>

0x274 -

pub fn app_cpu_intr_from_cpu_0_map( &self ) -> &Reg<APP_CPU_INTR_FROM_CPU_0_MAP_SPEC>

0x278 -

pub fn app_cpu_intr_from_cpu_1_map( &self ) -> &Reg<APP_CPU_INTR_FROM_CPU_1_MAP_SPEC>

0x27c -

pub fn app_cpu_intr_from_cpu_2_map( &self ) -> &Reg<APP_CPU_INTR_FROM_CPU_2_MAP_SPEC>

0x280 -

pub fn app_cpu_intr_from_cpu_3_map( &self ) -> &Reg<APP_CPU_INTR_FROM_CPU_3_MAP_SPEC>

0x284 -

pub fn app_spi_intr_0_map(&self) -> &Reg<APP_SPI_INTR_0_MAP_SPEC>

0x288 -

pub fn app_spi_intr_1_map(&self) -> &Reg<APP_SPI_INTR_1_MAP_SPEC>

0x28c -

pub fn app_spi_intr_2_map(&self) -> &Reg<APP_SPI_INTR_2_MAP_SPEC>

0x290 -

pub fn app_spi_intr_3_map(&self) -> &Reg<APP_SPI_INTR_3_MAP_SPEC>

0x294 -

pub fn app_i2s0_int_map(&self) -> &Reg<APP_I2S0_INT_MAP_SPEC>

0x298 -

pub fn app_i2s1_int_map(&self) -> &Reg<APP_I2S1_INT_MAP_SPEC>

0x29c -

pub fn app_uart_intr_map(&self) -> &Reg<APP_UART_INTR_MAP_SPEC>

0x2a0 -

pub fn app_uart1_intr_map(&self) -> &Reg<APP_UART1_INTR_MAP_SPEC>

0x2a4 -

pub fn app_uart2_intr_map(&self) -> &Reg<APP_UART2_INTR_MAP_SPEC>

0x2a8 -

pub fn app_sdio_host_interrupt_map( &self ) -> &Reg<APP_SDIO_HOST_INTERRUPT_MAP_SPEC>

0x2ac -

pub fn app_emac_int_map(&self) -> &Reg<APP_EMAC_INT_MAP_SPEC>

0x2b0 -

pub fn app_pwm0_intr_map(&self) -> &Reg<APP_PWM0_INTR_MAP_SPEC>

0x2b4 -

pub fn app_pwm1_intr_map(&self) -> &Reg<APP_PWM1_INTR_MAP_SPEC>

0x2b8 -

pub fn app_pwm2_intr_map(&self) -> &Reg<APP_PWM2_INTR_MAP_SPEC>

0x2bc -

pub fn app_pwm3_intr_map(&self) -> &Reg<APP_PWM3_INTR_MAP_SPEC>

0x2c0 -

pub fn app_ledc_int_map(&self) -> &Reg<APP_LEDC_INT_MAP_SPEC>

0x2c4 -

pub fn app_efuse_int_map(&self) -> &Reg<APP_EFUSE_INT_MAP_SPEC>

0x2c8 -

pub fn app_can_int_map(&self) -> &Reg<APP_CAN_INT_MAP_SPEC>

0x2cc -

pub fn app_rtc_core_intr_map(&self) -> &Reg<APP_RTC_CORE_INTR_MAP_SPEC>

0x2d0 -

pub fn app_rmt_intr_map(&self) -> &Reg<APP_RMT_INTR_MAP_SPEC>

0x2d4 -

pub fn app_pcnt_intr_map(&self) -> &Reg<APP_PCNT_INTR_MAP_SPEC>

0x2d8 -

pub fn app_i2c_ext0_intr_map(&self) -> &Reg<APP_I2C_EXT0_INTR_MAP_SPEC>

0x2dc -

pub fn app_i2c_ext1_intr_map(&self) -> &Reg<APP_I2C_EXT1_INTR_MAP_SPEC>

0x2e0 -

pub fn app_rsa_intr_map(&self) -> &Reg<APP_RSA_INTR_MAP_SPEC>

0x2e4 -

pub fn app_spi1_dma_int_map(&self) -> &Reg<APP_SPI1_DMA_INT_MAP_SPEC>

0x2e8 -

pub fn app_spi2_dma_int_map(&self) -> &Reg<APP_SPI2_DMA_INT_MAP_SPEC>

0x2ec -

pub fn app_spi3_dma_int_map(&self) -> &Reg<APP_SPI3_DMA_INT_MAP_SPEC>

0x2f0 -

pub fn app_wdg_int_map(&self) -> &Reg<APP_WDG_INT_MAP_SPEC>

0x2f4 -

pub fn app_timer_int1_map(&self) -> &Reg<APP_TIMER_INT1_MAP_SPEC>

0x2f8 -

pub fn app_timer_int2_map(&self) -> &Reg<APP_TIMER_INT2_MAP_SPEC>

0x2fc -

pub fn app_tg_t0_edge_int_map(&self) -> &Reg<APP_TG_T0_EDGE_INT_MAP_SPEC>

0x300 -

pub fn app_tg_t1_edge_int_map(&self) -> &Reg<APP_TG_T1_EDGE_INT_MAP_SPEC>

0x304 -

pub fn app_tg_wdt_edge_int_map(&self) -> &Reg<APP_TG_WDT_EDGE_INT_MAP_SPEC>

0x308 -

pub fn app_tg_lact_edge_int_map(&self) -> &Reg<APP_TG_LACT_EDGE_INT_MAP_SPEC>

0x30c -

pub fn app_tg1_t0_edge_int_map(&self) -> &Reg<APP_TG1_T0_EDGE_INT_MAP_SPEC>

0x310 -

pub fn app_tg1_t1_edge_int_map(&self) -> &Reg<APP_TG1_T1_EDGE_INT_MAP_SPEC>

0x314 -

pub fn app_tg1_wdt_edge_int_map(&self) -> &Reg<APP_TG1_WDT_EDGE_INT_MAP_SPEC>

0x318 -

pub fn app_tg1_lact_edge_int_map(&self) -> &Reg<APP_TG1_LACT_EDGE_INT_MAP_SPEC>

0x31c -

pub fn app_mmu_ia_int_map(&self) -> &Reg<APP_MMU_IA_INT_MAP_SPEC>

0x320 -

pub fn app_mpu_ia_int_map(&self) -> &Reg<APP_MPU_IA_INT_MAP_SPEC>

0x324 -

pub fn app_cache_ia_int_map(&self) -> &Reg<APP_CACHE_IA_INT_MAP_SPEC>

0x328 -

pub fn ahblite_mpu_table_uart(&self) -> &Reg<AHBLITE_MPU_TABLE_UART_SPEC>

0x32c -

pub fn ahblite_mpu_table_spi1(&self) -> &Reg<AHBLITE_MPU_TABLE_SPI1_SPEC>

0x330 -

pub fn ahblite_mpu_table_spi0(&self) -> &Reg<AHBLITE_MPU_TABLE_SPI0_SPEC>

0x334 -

pub fn ahblite_mpu_table_gpio(&self) -> &Reg<AHBLITE_MPU_TABLE_GPIO_SPEC>

0x338 -

pub fn ahblite_mpu_table_fe2(&self) -> &Reg<AHBLITE_MPU_TABLE_FE2_SPEC>

0x33c -

pub fn ahblite_mpu_table_fe(&self) -> &Reg<AHBLITE_MPU_TABLE_FE_SPEC>

0x340 -

pub fn ahblite_mpu_table_timer(&self) -> &Reg<AHBLITE_MPU_TABLE_TIMER_SPEC>

0x344 -

pub fn ahblite_mpu_table_rtc(&self) -> &Reg<AHBLITE_MPU_TABLE_RTC_SPEC>

0x348 -

pub fn ahblite_mpu_table_io_mux(&self) -> &Reg<AHBLITE_MPU_TABLE_IO_MUX_SPEC>

0x34c -

pub fn ahblite_mpu_table_wdg(&self) -> &Reg<AHBLITE_MPU_TABLE_WDG_SPEC>

0x350 -

pub fn ahblite_mpu_table_hinf(&self) -> &Reg<AHBLITE_MPU_TABLE_HINF_SPEC>

0x354 -

pub fn ahblite_mpu_table_uhci1(&self) -> &Reg<AHBLITE_MPU_TABLE_UHCI1_SPEC>

0x358 -

pub fn ahblite_mpu_table_misc(&self) -> &Reg<AHBLITE_MPU_TABLE_MISC_SPEC>

0x35c -

pub fn ahblite_mpu_table_i2c(&self) -> &Reg<AHBLITE_MPU_TABLE_I2C_SPEC>

0x360 -

pub fn ahblite_mpu_table_i2s0(&self) -> &Reg<AHBLITE_MPU_TABLE_I2S0_SPEC>

0x364 -

pub fn ahblite_mpu_table_uart1(&self) -> &Reg<AHBLITE_MPU_TABLE_UART1_SPEC>

0x368 -

pub fn ahblite_mpu_table_bt(&self) -> &Reg<AHBLITE_MPU_TABLE_BT_SPEC>

0x36c -

pub fn ahblite_mpu_table_bt_buffer( &self ) -> &Reg<AHBLITE_MPU_TABLE_BT_BUFFER_SPEC>

0x370 -

pub fn ahblite_mpu_table_i2c_ext0( &self ) -> &Reg<AHBLITE_MPU_TABLE_I2C_EXT0_SPEC>

0x374 -

pub fn ahblite_mpu_table_uhci0(&self) -> &Reg<AHBLITE_MPU_TABLE_UHCI0_SPEC>

0x378 -

pub fn ahblite_mpu_table_slchost(&self) -> &Reg<AHBLITE_MPU_TABLE_SLCHOST_SPEC>

0x37c -

pub fn ahblite_mpu_table_rmt(&self) -> &Reg<AHBLITE_MPU_TABLE_RMT_SPEC>

0x380 -

pub fn ahblite_mpu_table_pcnt(&self) -> &Reg<AHBLITE_MPU_TABLE_PCNT_SPEC>

0x384 -

pub fn ahblite_mpu_table_slc(&self) -> &Reg<AHBLITE_MPU_TABLE_SLC_SPEC>

0x388 -

pub fn ahblite_mpu_table_ledc(&self) -> &Reg<AHBLITE_MPU_TABLE_LEDC_SPEC>

0x38c -

pub fn ahblite_mpu_table_efuse(&self) -> &Reg<AHBLITE_MPU_TABLE_EFUSE_SPEC>

0x390 -

pub fn ahblite_mpu_table_spi_encrypt( &self ) -> &Reg<AHBLITE_MPU_TABLE_SPI_ENCRYPT_SPEC>

0x394 -

pub fn ahblite_mpu_table_bb(&self) -> &Reg<AHBLITE_MPU_TABLE_BB_SPEC>

0x398 -

pub fn ahblite_mpu_table_pwm0(&self) -> &Reg<AHBLITE_MPU_TABLE_PWM0_SPEC>

0x39c -

pub fn ahblite_mpu_table_timergroup( &self ) -> &Reg<AHBLITE_MPU_TABLE_TIMERGROUP_SPEC>

0x3a0 -

pub fn ahblite_mpu_table_timergroup1( &self ) -> &Reg<AHBLITE_MPU_TABLE_TIMERGROUP1_SPEC>

0x3a4 -

pub fn ahblite_mpu_table_spi2(&self) -> &Reg<AHBLITE_MPU_TABLE_SPI2_SPEC>

0x3a8 -

pub fn ahblite_mpu_table_spi3(&self) -> &Reg<AHBLITE_MPU_TABLE_SPI3_SPEC>

0x3ac -

pub fn ahblite_mpu_table_apb_ctrl( &self ) -> &Reg<AHBLITE_MPU_TABLE_APB_CTRL_SPEC>

0x3b0 -

pub fn ahblite_mpu_table_i2c_ext1( &self ) -> &Reg<AHBLITE_MPU_TABLE_I2C_EXT1_SPEC>

0x3b4 -

pub fn ahblite_mpu_table_sdio_host( &self ) -> &Reg<AHBLITE_MPU_TABLE_SDIO_HOST_SPEC>

0x3b8 -

pub fn ahblite_mpu_table_emac(&self) -> &Reg<AHBLITE_MPU_TABLE_EMAC_SPEC>

0x3bc -

pub fn ahblite_mpu_table_can(&self) -> &Reg<AHBLITE_MPU_TABLE_CAN_SPEC>

0x3c0 -

pub fn ahblite_mpu_table_pwm1(&self) -> &Reg<AHBLITE_MPU_TABLE_PWM1_SPEC>

0x3c4 -

pub fn ahblite_mpu_table_i2s1(&self) -> &Reg<AHBLITE_MPU_TABLE_I2S1_SPEC>

0x3c8 -

pub fn ahblite_mpu_table_uart2(&self) -> &Reg<AHBLITE_MPU_TABLE_UART2_SPEC>

0x3cc -

pub fn ahblite_mpu_table_pwm2(&self) -> &Reg<AHBLITE_MPU_TABLE_PWM2_SPEC>

0x3d0 -

pub fn ahblite_mpu_table_pwm3(&self) -> &Reg<AHBLITE_MPU_TABLE_PWM3_SPEC>

0x3d4 -

pub fn ahblite_mpu_table_rwbt(&self) -> &Reg<AHBLITE_MPU_TABLE_RWBT_SPEC>

0x3d8 -

pub fn ahblite_mpu_table_btmac(&self) -> &Reg<AHBLITE_MPU_TABLE_BTMAC_SPEC>

0x3dc -

pub fn ahblite_mpu_table_wifimac(&self) -> &Reg<AHBLITE_MPU_TABLE_WIFIMAC_SPEC>

0x3e0 -

pub fn ahblite_mpu_table_pwr(&self) -> &Reg<AHBLITE_MPU_TABLE_PWR_SPEC>

0x3e4 -

pub fn mem_access_dbug0(&self) -> &Reg<MEM_ACCESS_DBUG0_SPEC>

0x3e8 -

pub fn mem_access_dbug1(&self) -> &Reg<MEM_ACCESS_DBUG1_SPEC>

0x3ec -

pub fn pro_dcache_dbug0(&self) -> &Reg<PRO_DCACHE_DBUG0_SPEC>

0x3f0 -

pub fn pro_dcache_dbug1(&self) -> &Reg<PRO_DCACHE_DBUG1_SPEC>

0x3f4 -

pub fn pro_dcache_dbug2(&self) -> &Reg<PRO_DCACHE_DBUG2_SPEC>

0x3f8 -

pub fn pro_dcache_dbug3(&self) -> &Reg<PRO_DCACHE_DBUG3_SPEC>

0x3fc -

pub fn pro_dcache_dbug4(&self) -> &Reg<PRO_DCACHE_DBUG4_SPEC>

0x400 -

pub fn pro_dcache_dbug5(&self) -> &Reg<PRO_DCACHE_DBUG5_SPEC>

0x404 -

pub fn pro_dcache_dbug6(&self) -> &Reg<PRO_DCACHE_DBUG6_SPEC>

0x408 -

pub fn pro_dcache_dbug7(&self) -> &Reg<PRO_DCACHE_DBUG7_SPEC>

0x40c -

pub fn pro_dcache_dbug8(&self) -> &Reg<PRO_DCACHE_DBUG8_SPEC>

0x410 -

pub fn pro_dcache_dbug9(&self) -> &Reg<PRO_DCACHE_DBUG9_SPEC>

0x414 -

pub fn app_dcache_dbug0(&self) -> &Reg<APP_DCACHE_DBUG0_SPEC>

0x418 -

pub fn app_dcache_dbug1(&self) -> &Reg<APP_DCACHE_DBUG1_SPEC>

0x41c -

pub fn app_dcache_dbug2(&self) -> &Reg<APP_DCACHE_DBUG2_SPEC>

0x420 -

pub fn app_dcache_dbug3(&self) -> &Reg<APP_DCACHE_DBUG3_SPEC>

0x424 -

pub fn app_dcache_dbug4(&self) -> &Reg<APP_DCACHE_DBUG4_SPEC>

0x428 -

pub fn app_dcache_dbug5(&self) -> &Reg<APP_DCACHE_DBUG5_SPEC>

0x42c -

pub fn app_dcache_dbug6(&self) -> &Reg<APP_DCACHE_DBUG6_SPEC>

0x430 -

pub fn app_dcache_dbug7(&self) -> &Reg<APP_DCACHE_DBUG7_SPEC>

0x434 -

pub fn app_dcache_dbug8(&self) -> &Reg<APP_DCACHE_DBUG8_SPEC>

0x438 -

pub fn app_dcache_dbug9(&self) -> &Reg<APP_DCACHE_DBUG9_SPEC>

0x43c -

pub fn pro_cpu_record_ctrl(&self) -> &Reg<PRO_CPU_RECORD_CTRL_SPEC>

0x440 -

pub fn pro_cpu_record_status(&self) -> &Reg<PRO_CPU_RECORD_STATUS_SPEC>

0x444 -

pub fn pro_cpu_record_pid(&self) -> &Reg<PRO_CPU_RECORD_PID_SPEC>

0x448 -

pub fn pro_cpu_record_pdebuginst(&self) -> &Reg<PRO_CPU_RECORD_PDEBUGINST_SPEC>

0x44c -

pub fn pro_cpu_record_pdebugstatus( &self ) -> &Reg<PRO_CPU_RECORD_PDEBUGSTATUS_SPEC>

0x450 -

pub fn pro_cpu_record_pdebugdata(&self) -> &Reg<PRO_CPU_RECORD_PDEBUGDATA_SPEC>

0x454 -

pub fn pro_cpu_record_pdebugpc(&self) -> &Reg<PRO_CPU_RECORD_PDEBUGPC_SPEC>

0x458 -

pub fn pro_cpu_record_pdebugls0stat( &self ) -> &Reg<PRO_CPU_RECORD_PDEBUGLS0STAT_SPEC>

0x45c -

pub fn pro_cpu_record_pdebugls0addr( &self ) -> &Reg<PRO_CPU_RECORD_PDEBUGLS0ADDR_SPEC>

0x460 -

pub fn pro_cpu_record_pdebugls0data( &self ) -> &Reg<PRO_CPU_RECORD_PDEBUGLS0DATA_SPEC>

0x464 -

pub fn app_cpu_record_ctrl(&self) -> &Reg<APP_CPU_RECORD_CTRL_SPEC>

0x468 -

pub fn app_cpu_record_status(&self) -> &Reg<APP_CPU_RECORD_STATUS_SPEC>

0x46c -

pub fn app_cpu_record_pid(&self) -> &Reg<APP_CPU_RECORD_PID_SPEC>

0x470 -

pub fn app_cpu_record_pdebuginst(&self) -> &Reg<APP_CPU_RECORD_PDEBUGINST_SPEC>

0x474 -

pub fn app_cpu_record_pdebugstatus( &self ) -> &Reg<APP_CPU_RECORD_PDEBUGSTATUS_SPEC>

0x478 -

pub fn app_cpu_record_pdebugdata(&self) -> &Reg<APP_CPU_RECORD_PDEBUGDATA_SPEC>

0x47c -

pub fn app_cpu_record_pdebugpc(&self) -> &Reg<APP_CPU_RECORD_PDEBUGPC_SPEC>

0x480 -

pub fn app_cpu_record_pdebugls0stat( &self ) -> &Reg<APP_CPU_RECORD_PDEBUGLS0STAT_SPEC>

0x484 -

pub fn app_cpu_record_pdebugls0addr( &self ) -> &Reg<APP_CPU_RECORD_PDEBUGLS0ADDR_SPEC>

0x488 -

pub fn app_cpu_record_pdebugls0data( &self ) -> &Reg<APP_CPU_RECORD_PDEBUGLS0DATA_SPEC>

0x48c -

pub fn rsa_pd_ctrl(&self) -> &Reg<RSA_PD_CTRL_SPEC>

0x490 -

pub fn rom_mpu_table0(&self) -> &Reg<ROM_MPU_TABLE0_SPEC>

0x494 -

pub fn rom_mpu_table1(&self) -> &Reg<ROM_MPU_TABLE1_SPEC>

0x498 -

pub fn rom_mpu_table2(&self) -> &Reg<ROM_MPU_TABLE2_SPEC>

0x49c -

pub fn rom_mpu_table3(&self) -> &Reg<ROM_MPU_TABLE3_SPEC>

0x4a0 -

pub fn shrom_mpu_table0(&self) -> &Reg<SHROM_MPU_TABLE0_SPEC>

0x4a4 -

pub fn shrom_mpu_table1(&self) -> &Reg<SHROM_MPU_TABLE1_SPEC>

0x4a8 -

pub fn shrom_mpu_table2(&self) -> &Reg<SHROM_MPU_TABLE2_SPEC>

0x4ac -

pub fn shrom_mpu_table3(&self) -> &Reg<SHROM_MPU_TABLE3_SPEC>

0x4b0 -

pub fn shrom_mpu_table4(&self) -> &Reg<SHROM_MPU_TABLE4_SPEC>

0x4b4 -

pub fn shrom_mpu_table5(&self) -> &Reg<SHROM_MPU_TABLE5_SPEC>

0x4b8 -

pub fn shrom_mpu_table6(&self) -> &Reg<SHROM_MPU_TABLE6_SPEC>

0x4bc -

pub fn shrom_mpu_table7(&self) -> &Reg<SHROM_MPU_TABLE7_SPEC>

0x4c0 -

pub fn shrom_mpu_table8(&self) -> &Reg<SHROM_MPU_TABLE8_SPEC>

0x4c4 -

pub fn shrom_mpu_table9(&self) -> &Reg<SHROM_MPU_TABLE9_SPEC>

0x4c8 -

pub fn shrom_mpu_table10(&self) -> &Reg<SHROM_MPU_TABLE10_SPEC>

0x4cc -

pub fn shrom_mpu_table11(&self) -> &Reg<SHROM_MPU_TABLE11_SPEC>

0x4d0 -

pub fn shrom_mpu_table12(&self) -> &Reg<SHROM_MPU_TABLE12_SPEC>

0x4d4 -

pub fn shrom_mpu_table13(&self) -> &Reg<SHROM_MPU_TABLE13_SPEC>

0x4d8 -

pub fn shrom_mpu_table14(&self) -> &Reg<SHROM_MPU_TABLE14_SPEC>

0x4dc -

pub fn shrom_mpu_table15(&self) -> &Reg<SHROM_MPU_TABLE15_SPEC>

0x4e0 -

pub fn shrom_mpu_table16(&self) -> &Reg<SHROM_MPU_TABLE16_SPEC>

0x4e4 -

pub fn shrom_mpu_table17(&self) -> &Reg<SHROM_MPU_TABLE17_SPEC>

0x4e8 -

pub fn shrom_mpu_table18(&self) -> &Reg<SHROM_MPU_TABLE18_SPEC>

0x4ec -

pub fn shrom_mpu_table19(&self) -> &Reg<SHROM_MPU_TABLE19_SPEC>

0x4f0 -

pub fn shrom_mpu_table20(&self) -> &Reg<SHROM_MPU_TABLE20_SPEC>

0x4f4 -

pub fn shrom_mpu_table21(&self) -> &Reg<SHROM_MPU_TABLE21_SPEC>

0x4f8 -

pub fn shrom_mpu_table22(&self) -> &Reg<SHROM_MPU_TABLE22_SPEC>

0x4fc -

pub fn shrom_mpu_table23(&self) -> &Reg<SHROM_MPU_TABLE23_SPEC>

0x500 -

pub fn immu_table0(&self) -> &Reg<IMMU_TABLE0_SPEC>

0x504 -

pub fn immu_table1(&self) -> &Reg<IMMU_TABLE1_SPEC>

0x508 -

pub fn immu_table2(&self) -> &Reg<IMMU_TABLE2_SPEC>

0x50c -

pub fn immu_table3(&self) -> &Reg<IMMU_TABLE3_SPEC>

0x510 -

pub fn immu_table4(&self) -> &Reg<IMMU_TABLE4_SPEC>

0x514 -

pub fn immu_table5(&self) -> &Reg<IMMU_TABLE5_SPEC>

0x518 -

pub fn immu_table6(&self) -> &Reg<IMMU_TABLE6_SPEC>

0x51c -

pub fn immu_table7(&self) -> &Reg<IMMU_TABLE7_SPEC>

0x520 -

pub fn immu_table8(&self) -> &Reg<IMMU_TABLE8_SPEC>

0x524 -

pub fn immu_table9(&self) -> &Reg<IMMU_TABLE9_SPEC>

0x528 -

pub fn immu_table10(&self) -> &Reg<IMMU_TABLE10_SPEC>

0x52c -

pub fn immu_table11(&self) -> &Reg<IMMU_TABLE11_SPEC>

0x530 -

pub fn immu_table12(&self) -> &Reg<IMMU_TABLE12_SPEC>

0x534 -

pub fn immu_table13(&self) -> &Reg<IMMU_TABLE13_SPEC>

0x538 -

pub fn immu_table14(&self) -> &Reg<IMMU_TABLE14_SPEC>

0x53c -

pub fn immu_table15(&self) -> &Reg<IMMU_TABLE15_SPEC>

0x540 -

pub fn dmmu_table0(&self) -> &Reg<DMMU_TABLE0_SPEC>

0x544 -

pub fn dmmu_table1(&self) -> &Reg<DMMU_TABLE1_SPEC>

0x548 -

pub fn dmmu_table2(&self) -> &Reg<DMMU_TABLE2_SPEC>

0x54c -

pub fn dmmu_table3(&self) -> &Reg<DMMU_TABLE3_SPEC>

0x550 -

pub fn dmmu_table4(&self) -> &Reg<DMMU_TABLE4_SPEC>

0x554 -

pub fn dmmu_table5(&self) -> &Reg<DMMU_TABLE5_SPEC>

0x558 -

pub fn dmmu_table6(&self) -> &Reg<DMMU_TABLE6_SPEC>

0x55c -

pub fn dmmu_table7(&self) -> &Reg<DMMU_TABLE7_SPEC>

0x560 -

pub fn dmmu_table8(&self) -> &Reg<DMMU_TABLE8_SPEC>

0x564 -

pub fn dmmu_table9(&self) -> &Reg<DMMU_TABLE9_SPEC>

0x568 -

pub fn dmmu_table10(&self) -> &Reg<DMMU_TABLE10_SPEC>

0x56c -

pub fn dmmu_table11(&self) -> &Reg<DMMU_TABLE11_SPEC>

0x570 -

pub fn dmmu_table12(&self) -> &Reg<DMMU_TABLE12_SPEC>

0x574 -

pub fn dmmu_table13(&self) -> &Reg<DMMU_TABLE13_SPEC>

0x578 -

pub fn dmmu_table14(&self) -> &Reg<DMMU_TABLE14_SPEC>

0x57c -

pub fn dmmu_table15(&self) -> &Reg<DMMU_TABLE15_SPEC>

0x580 -

pub fn pro_intrusion_ctrl(&self) -> &Reg<PRO_INTRUSION_CTRL_SPEC>

0x584 -

pub fn pro_intrusion_status(&self) -> &Reg<PRO_INTRUSION_STATUS_SPEC>

0x588 -

pub fn app_intrusion_ctrl(&self) -> &Reg<APP_INTRUSION_CTRL_SPEC>

0x58c -

pub fn app_intrusion_status(&self) -> &Reg<APP_INTRUSION_STATUS_SPEC>

0x590 -

pub fn front_end_mem_pd(&self) -> &Reg<FRONT_END_MEM_PD_SPEC>

0x594 -

pub fn mmu_ia_int_en(&self) -> &Reg<MMU_IA_INT_EN_SPEC>

0x598 -

pub fn mpu_ia_int_en(&self) -> &Reg<MPU_IA_INT_EN_SPEC>

0x59c -

pub fn cache_ia_int_en(&self) -> &Reg<CACHE_IA_INT_EN_SPEC>

0x5a0 -

pub fn secure_boot_ctrl(&self) -> &Reg<SECURE_BOOT_CTRL_SPEC>

0x5a4 -

pub fn spi_dma_chan_sel(&self) -> &Reg<SPI_DMA_CHAN_SEL_SPEC>

0x5a8 -

pub fn pro_vecbase_ctrl(&self) -> &Reg<PRO_VECBASE_CTRL_SPEC>

0x5ac -

pub fn pro_vecbase_set(&self) -> &Reg<PRO_VECBASE_SET_SPEC>

0x5b0 -

pub fn app_vecbase_ctrl(&self) -> &Reg<APP_VECBASE_CTRL_SPEC>

0x5b4 -

pub fn app_vecbase_set(&self) -> &Reg<APP_VECBASE_SET_SPEC>

0x5b8 -

pub fn date(&self) -> &Reg<DATE_SPEC>

0xffc -

Trait Implementations

impl Debug for SYSTEM

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl Deref for SYSTEM

type Target = <DPORT as Deref>::Target

The resulting type after dereferencing.

fn deref(&self) -> &<SYSTEM as Deref>::Target

Dereferences the value.

impl DerefMut for SYSTEM

fn deref_mut(&mut self) -> &mut <SYSTEM as Deref>::Target

Mutably dereferences the value.

impl Peripheral for SYSTEM

type P = SYSTEM

Peripheral singleton type

unsafe fn clone_unchecked(&mut self) -> <SYSTEM as Peripheral>::P

Unsafely clone (duplicate) a peripheral singleton.

fn into_ref<'a>(self) -> PeripheralRef<'a, Self::P>

where Self: 'a,

Convert a value into a PeripheralRef.