esp-hal-ota 0.7.1

OTA library for esp-hal
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const SOC_MMU_VADDR_MASK: u32 = 0x3FFFFF;
const DR_REG_MMU_TABLE: u32 = 0x61801000;
const SOC_MMU_VALID_VAL_MASK: u32 = 0x3fff;
const SOC_MMU_INVALID: u32 = 1 << 14;
const SOC_IRAM0_CACHE: core::ops::Range<u32> = 0x40080000..0x40400000;
const SOC_IRAM1: core::ops::Range<u32> = 0x40400000..0x40800000;
const SOC_DROM0: core::ops::Range<u32> = 0x3f000000..0x3f400000;
const SOC_DRAM0_CACHE: core::ops::Range<u32> = 0x3fc00000..0x3ff80000;
const SOC_DRAM1: core::ops::Range<u32> = 0x3f800000..0x3fc00000;
const SOC_DPORT_CACHE: core::ops::Range<u32> = 0x3f500000..0x3f800000;
const PRO_CACHE_IBUS0_MMU_START: u32 = 0;
const PRO_CACHE_IBUS1_MMU_START: u32 = 0x100;
const PRO_CACHE_IBUS2_MMU_START: u32 = 0x200;
const PRO_CACHE_DBUS0_MMU_START: u32 = 0x300;
const PRO_CACHE_DBUS1_MMU_START: u32 = 0x400;
const PRO_CACHE_DBUS2_MMU_START: u32 = 0x500;

pub fn mmu_ll_get_page_size(_mmu_id: u32) -> u32 {
    crate::mmu_hal::MMU_PAGE_64KB
}

pub fn mmu_ll_get_entry_id(_mmu_id: u32, vaddr: u32) -> u32 {
    let offset = if SOC_DROM0.contains(&vaddr) {
        PRO_CACHE_IBUS2_MMU_START / 4
    } else if SOC_IRAM0_CACHE.contains(&vaddr) {
        PRO_CACHE_IBUS0_MMU_START / 4
    } else if SOC_IRAM1.contains(&vaddr) {
        PRO_CACHE_IBUS1_MMU_START / 4
    } else if SOC_DPORT_CACHE.contains(&vaddr) {
        PRO_CACHE_DBUS2_MMU_START / 4
    } else if SOC_DRAM1.contains(&vaddr) {
        PRO_CACHE_DBUS1_MMU_START / 4
    } else if SOC_DRAM0_CACHE.contains(&vaddr) {
        PRO_CACHE_DBUS0_MMU_START / 4
    } else {
        error!("mmu_ll_get_entry_id failed!");

        0
    };

    offset + ((vaddr & SOC_MMU_VADDR_MASK) >> 16)
}

pub fn mmu_ll_entry_id_to_paddr_base(_mmu_id: u32, entry_id: u32) -> u32 {
    (mmu_entry(entry_id) & SOC_MMU_VALID_VAL_MASK) << 16
}

pub fn mmu_ll_check_entry_valid(_mmu_id: u32, entry_id: u32) -> bool {
    (mmu_entry(entry_id) & SOC_MMU_INVALID) == 0
}

/// Reads MMU table entry `entry_id`.
fn mmu_entry(entry_id: u32) -> u32 {
    // SAFETY: `DR_REG_MMU_TABLE` is the always-mapped MMU table and `entry_id` comes from a
    // masked virtual address, so it stays inside the table. Volatile, as it is hardware state.
    unsafe { ((DR_REG_MMU_TABLE + entry_id * 4) as *const u32).read_volatile() }
}