1#[doc = "Register `SER` reader"]
2pub struct R(crate::R<SER_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<SER_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<SER_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<SER_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `SER` writer"]
17pub struct W(crate::W<SER_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<SER_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<SER_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<SER_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `SER_SS1` reader - Slave 1 Select Enable Flag. When set, the corresponding slave select line from the master is activated when a serial transfer begins. It should be noted that setting or clearing bits in this register have no effect on the corresponding slave select outputs until a transfer is started. Before beginning a transfer, you should enable the bit in this register. When not operating in broadcast mode, only one bit in the register should be set."]
38pub struct SER_SS1_R(crate::FieldReader<bool, bool>);
39impl SER_SS1_R {
40 #[inline(always)]
41 pub(crate) fn new(bits: bool) -> Self {
42 SER_SS1_R(crate::FieldReader::new(bits))
43 }
44}
45impl core::ops::Deref for SER_SS1_R {
46 type Target = crate::FieldReader<bool, bool>;
47 #[inline(always)]
48 fn deref(&self) -> &Self::Target {
49 &self.0
50 }
51}
52#[doc = "Field `SER_SS1` writer - Slave 1 Select Enable Flag. When set, the corresponding slave select line from the master is activated when a serial transfer begins. It should be noted that setting or clearing bits in this register have no effect on the corresponding slave select outputs until a transfer is started. Before beginning a transfer, you should enable the bit in this register. When not operating in broadcast mode, only one bit in the register should be set."]
53pub struct SER_SS1_W<'a> {
54 w: &'a mut W,
55}
56impl<'a> SER_SS1_W<'a> {
57 #[doc = r"Sets the field bit"]
58 #[inline(always)]
59 pub fn set_bit(self) -> &'a mut W {
60 self.bit(true)
61 }
62 #[doc = r"Clears the field bit"]
63 #[inline(always)]
64 pub fn clear_bit(self) -> &'a mut W {
65 self.bit(false)
66 }
67 #[doc = r"Writes raw bits to the field"]
68 #[inline(always)]
69 pub fn bit(self, value: bool) -> &'a mut W {
70 self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
71 self.w
72 }
73}
74#[doc = "Field `SER_SS2` reader - Slave 2 Select Enable Flag. When set, the corresponding slave select line from the master is activated when a serial transfer begins. It should be noted that setting or clearing bits in this register have no effect on the corresponding slave select outputs until a transfer is started. Before beginning a transfer, you should enable the bit in this register. When not operating in broadcast mode, only one bit in the register should be set."]
75pub struct SER_SS2_R(crate::FieldReader<bool, bool>);
76impl SER_SS2_R {
77 #[inline(always)]
78 pub(crate) fn new(bits: bool) -> Self {
79 SER_SS2_R(crate::FieldReader::new(bits))
80 }
81}
82impl core::ops::Deref for SER_SS2_R {
83 type Target = crate::FieldReader<bool, bool>;
84 #[inline(always)]
85 fn deref(&self) -> &Self::Target {
86 &self.0
87 }
88}
89#[doc = "Field `SER_SS2` writer - Slave 2 Select Enable Flag. When set, the corresponding slave select line from the master is activated when a serial transfer begins. It should be noted that setting or clearing bits in this register have no effect on the corresponding slave select outputs until a transfer is started. Before beginning a transfer, you should enable the bit in this register. When not operating in broadcast mode, only one bit in the register should be set."]
90pub struct SER_SS2_W<'a> {
91 w: &'a mut W,
92}
93impl<'a> SER_SS2_W<'a> {
94 #[doc = r"Sets the field bit"]
95 #[inline(always)]
96 pub fn set_bit(self) -> &'a mut W {
97 self.bit(true)
98 }
99 #[doc = r"Clears the field bit"]
100 #[inline(always)]
101 pub fn clear_bit(self) -> &'a mut W {
102 self.bit(false)
103 }
104 #[doc = r"Writes raw bits to the field"]
105 #[inline(always)]
106 pub fn bit(self, value: bool) -> &'a mut W {
107 self.w.bits =
108 (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1);
109 self.w
110 }
111}
112#[doc = "Field `SER_SS3` reader - Slave 3 Select Enable Flag. When set, the corresponding slave select line from the master is activated when a serial transfer begins. It should be noted that setting or clearing bits in this register have no effect on the corresponding slave select outputs until a transfer is started. Before beginning a transfer, you should enable the bit in this register. When not operating in broadcast mode, only one bit in the register should be set."]
113pub struct SER_SS3_R(crate::FieldReader<bool, bool>);
114impl SER_SS3_R {
115 #[inline(always)]
116 pub(crate) fn new(bits: bool) -> Self {
117 SER_SS3_R(crate::FieldReader::new(bits))
118 }
119}
120impl core::ops::Deref for SER_SS3_R {
121 type Target = crate::FieldReader<bool, bool>;
122 #[inline(always)]
123 fn deref(&self) -> &Self::Target {
124 &self.0
125 }
126}
127#[doc = "Field `SER_SS3` writer - Slave 3 Select Enable Flag. When set, the corresponding slave select line from the master is activated when a serial transfer begins. It should be noted that setting or clearing bits in this register have no effect on the corresponding slave select outputs until a transfer is started. Before beginning a transfer, you should enable the bit in this register. When not operating in broadcast mode, only one bit in the register should be set."]
128pub struct SER_SS3_W<'a> {
129 w: &'a mut W,
130}
131impl<'a> SER_SS3_W<'a> {
132 #[doc = r"Sets the field bit"]
133 #[inline(always)]
134 pub fn set_bit(self) -> &'a mut W {
135 self.bit(true)
136 }
137 #[doc = r"Clears the field bit"]
138 #[inline(always)]
139 pub fn clear_bit(self) -> &'a mut W {
140 self.bit(false)
141 }
142 #[doc = r"Writes raw bits to the field"]
143 #[inline(always)]
144 pub fn bit(self, value: bool) -> &'a mut W {
145 self.w.bits =
146 (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2);
147 self.w
148 }
149}
150impl R {
151 #[doc = "Bit 0 - Slave 1 Select Enable Flag. When set, the corresponding slave select line from the master is activated when a serial transfer begins. It should be noted that setting or clearing bits in this register have no effect on the corresponding slave select outputs until a transfer is started. Before beginning a transfer, you should enable the bit in this register. When not operating in broadcast mode, only one bit in the register should be set."]
152 #[inline(always)]
153 pub fn ser_ss1(&self) -> SER_SS1_R {
154 SER_SS1_R::new((self.bits & 0x01) != 0)
155 }
156 #[doc = "Bit 1 - Slave 2 Select Enable Flag. When set, the corresponding slave select line from the master is activated when a serial transfer begins. It should be noted that setting or clearing bits in this register have no effect on the corresponding slave select outputs until a transfer is started. Before beginning a transfer, you should enable the bit in this register. When not operating in broadcast mode, only one bit in the register should be set."]
157 #[inline(always)]
158 pub fn ser_ss2(&self) -> SER_SS2_R {
159 SER_SS2_R::new(((self.bits >> 1) & 0x01) != 0)
160 }
161 #[doc = "Bit 2 - Slave 3 Select Enable Flag. When set, the corresponding slave select line from the master is activated when a serial transfer begins. It should be noted that setting or clearing bits in this register have no effect on the corresponding slave select outputs until a transfer is started. Before beginning a transfer, you should enable the bit in this register. When not operating in broadcast mode, only one bit in the register should be set."]
162 #[inline(always)]
163 pub fn ser_ss3(&self) -> SER_SS3_R {
164 SER_SS3_R::new(((self.bits >> 2) & 0x01) != 0)
165 }
166}
167impl W {
168 #[doc = "Bit 0 - Slave 1 Select Enable Flag. When set, the corresponding slave select line from the master is activated when a serial transfer begins. It should be noted that setting or clearing bits in this register have no effect on the corresponding slave select outputs until a transfer is started. Before beginning a transfer, you should enable the bit in this register. When not operating in broadcast mode, only one bit in the register should be set."]
169 #[inline(always)]
170 pub fn ser_ss1(&mut self) -> SER_SS1_W {
171 SER_SS1_W { w: self }
172 }
173 #[doc = "Bit 1 - Slave 2 Select Enable Flag. When set, the corresponding slave select line from the master is activated when a serial transfer begins. It should be noted that setting or clearing bits in this register have no effect on the corresponding slave select outputs until a transfer is started. Before beginning a transfer, you should enable the bit in this register. When not operating in broadcast mode, only one bit in the register should be set."]
174 #[inline(always)]
175 pub fn ser_ss2(&mut self) -> SER_SS2_W {
176 SER_SS2_W { w: self }
177 }
178 #[doc = "Bit 2 - Slave 3 Select Enable Flag. When set, the corresponding slave select line from the master is activated when a serial transfer begins. It should be noted that setting or clearing bits in this register have no effect on the corresponding slave select outputs until a transfer is started. Before beginning a transfer, you should enable the bit in this register. When not operating in broadcast mode, only one bit in the register should be set."]
179 #[inline(always)]
180 pub fn ser_ss3(&mut self) -> SER_SS3_W {
181 SER_SS3_W { w: self }
182 }
183 #[doc = "Writes raw bits to the register."]
184 #[inline(always)]
185 pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
186 self.0.bits(bits);
187 self
188 }
189}
190#[doc = "Slave Enable Register: This register enables the individual slave select output lines from the SPI Master. You cannot write to this register when SPI Master is busy.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ser](index.html) module"]
191pub struct SER_SPEC;
192impl crate::RegisterSpec for SER_SPEC {
193 type Ux = u8;
194}
195#[doc = "`read()` method returns [ser::R](R) reader structure"]
196impl crate::Readable for SER_SPEC {
197 type Reader = R;
198}
199#[doc = "`write(|w| ..)` method takes [ser::W](W) writer structure"]
200impl crate::Writable for SER_SPEC {
201 type Writer = W;
202}
203#[doc = "`reset()` method sets SER to value 0"]
204impl crate::Resettable for SER_SPEC {
205 #[inline(always)]
206 fn reset_value() -> Self::Ux {
207 0
208 }
209}