1#![doc = "Peripheral access API for EOS-S3 microcontrollers (generated using svd2rust v0.20.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next]
2svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.20.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
3#![deny(const_err)]
4#![deny(dead_code)]
5#![deny(improper_ctypes)]
6#![deny(missing_docs)]
7#![deny(no_mangle_generic_items)]
8#![deny(non_shorthand_field_patterns)]
9#![deny(overflowing_literals)]
10#![deny(path_statements)]
11#![deny(patterns_in_fns_without_body)]
12#![deny(private_in_public)]
13#![deny(unconditional_recursion)]
14#![deny(unused_allocation)]
15#![deny(unused_comparisons)]
16#![deny(unused_parens)]
17#![deny(while_true)]
18#![allow(non_camel_case_types)]
19#![allow(non_snake_case)]
20#![no_std]
21use core::marker::PhantomData;
22use core::ops::Deref;
23#[doc = r"Number available in the NVIC for configuring priority"]
24pub const NVIC_PRIO_BITS: u8 = 3;
25#[cfg(feature = "rt")]
26pub use self::Interrupt as interrupt;
27pub use cortex_m::peripheral::Peripherals as CorePeripherals;
28pub use cortex_m::peripheral::{
29 CBP, CPUID, DCB, DWT, FPB, FPU, ITM, MPU, NVIC, SCB, SYST, TPIU,
30};
31#[cfg(feature = "rt")]
32pub use cortex_m_rt::interrupt;
33#[allow(unused_imports)]
34use generic::*;
35#[doc = r"Common register and bit access and modify traits"]
36pub mod generic;
37#[cfg(feature = "rt")]
38extern "C" {
39 fn SOFTWARE_INTERRUPT_2();
40 fn SOFTWARE_INTERRUPT_1();
41 fn FFE0_MESSAGE();
42 fn FABRIC_MESSAGE();
43 fn SENSOR_GPIO();
44 fn UART();
45 fn TIMER();
46 fn CPU_WDOG_INTR();
47 fn CPU_WDOG_RST();
48 fn BUS_TIMEOUT();
49 fn FPU();
50 fn PKFB();
51 fn I2S();
52 fn AUDIO();
53 fn SPI_MS();
54 fn CFG_DMA();
55 fn PMU_TIMER();
56 fn ADC_DONE();
57 fn RTC_ALARM();
58 fn RESET_INTERRUPT();
59 fn FFE0_COMBINED();
60 fn FFE_WDT();
61 fn AP_BOOT();
62 fn LDO30_PG_INTR();
63 fn LDO50_PG_INTR();
64 fn SRAM_128_TIMEOUT();
65 fn LPSD_VOICE_DET();
66 fn DMIC_VOICE_DET();
67 fn SDMA_DONE_1();
68 fn SDMA_DONE_2();
69 fn SDMA_DONE_3();
70 fn SDMA_DONE_4();
71 fn SDMA_DONE_5();
72 fn SDMA_DONE_6();
73 fn SDMA_DONE_7();
74 fn SDMA_DONE_8();
75 fn SDMA_DONE_9();
76 fn SDMA_DONE_10();
77 fn SDMA_DONE_11();
78 fn AP_PDM_CLK_ON();
79 fn AP_PDM_CLK_OFF();
80 fn DMAC0_BLK_DONE();
81 fn DMAC0_BUF_DONE();
82 fn DMAC1_BLK_DONE();
83 fn DMAC1_BUF_DONE();
84 fn SDMA_DONE_0();
85 fn SDMA_ERR();
86 fn I2SSLV_M4_TX_OR_INTR();
87 fn LPSD_VOICE_OFF();
88 fn DMIC_VOICE_OFF();
89}
90#[doc(hidden)]
91pub union Vector {
92 _handler: unsafe extern "C" fn(),
93 _reserved: u32,
94}
95#[cfg(feature = "rt")]
96#[doc(hidden)]
97#[link_section = ".vector_table.interrupts"]
98#[no_mangle]
99pub static __INTERRUPTS: [Vector; 53] = [
100 Vector {
101 _handler: SOFTWARE_INTERRUPT_2,
102 },
103 Vector {
104 _handler: SOFTWARE_INTERRUPT_1,
105 },
106 Vector { _reserved: 0 },
107 Vector {
108 _handler: FFE0_MESSAGE,
109 },
110 Vector {
111 _handler: FABRIC_MESSAGE,
112 },
113 Vector {
114 _handler: SENSOR_GPIO,
115 },
116 Vector { _reserved: 0 },
117 Vector { _handler: UART },
118 Vector { _handler: TIMER },
119 Vector {
120 _handler: CPU_WDOG_INTR,
121 },
122 Vector {
123 _handler: CPU_WDOG_RST,
124 },
125 Vector {
126 _handler: BUS_TIMEOUT,
127 },
128 Vector { _handler: FPU },
129 Vector { _handler: PKFB },
130 Vector { _handler: I2S },
131 Vector { _handler: AUDIO },
132 Vector { _handler: SPI_MS },
133 Vector { _handler: CFG_DMA },
134 Vector {
135 _handler: PMU_TIMER,
136 },
137 Vector { _handler: ADC_DONE },
138 Vector {
139 _handler: RTC_ALARM,
140 },
141 Vector {
142 _handler: RESET_INTERRUPT,
143 },
144 Vector {
145 _handler: FFE0_COMBINED,
146 },
147 Vector { _handler: FFE_WDT },
148 Vector { _handler: AP_BOOT },
149 Vector {
150 _handler: LDO30_PG_INTR,
151 },
152 Vector {
153 _handler: LDO50_PG_INTR,
154 },
155 Vector {
156 _handler: SRAM_128_TIMEOUT,
157 },
158 Vector {
159 _handler: LPSD_VOICE_DET,
160 },
161 Vector {
162 _handler: DMIC_VOICE_DET,
163 },
164 Vector { _reserved: 0 },
165 Vector {
166 _handler: SDMA_DONE_1,
167 },
168 Vector {
169 _handler: SDMA_DONE_2,
170 },
171 Vector {
172 _handler: SDMA_DONE_3,
173 },
174 Vector {
175 _handler: SDMA_DONE_4,
176 },
177 Vector {
178 _handler: SDMA_DONE_5,
179 },
180 Vector {
181 _handler: SDMA_DONE_6,
182 },
183 Vector {
184 _handler: SDMA_DONE_7,
185 },
186 Vector {
187 _handler: SDMA_DONE_8,
188 },
189 Vector {
190 _handler: SDMA_DONE_9,
191 },
192 Vector {
193 _handler: SDMA_DONE_10,
194 },
195 Vector {
196 _handler: SDMA_DONE_11,
197 },
198 Vector {
199 _handler: AP_PDM_CLK_ON,
200 },
201 Vector {
202 _handler: AP_PDM_CLK_OFF,
203 },
204 Vector {
205 _handler: DMAC0_BLK_DONE,
206 },
207 Vector {
208 _handler: DMAC0_BUF_DONE,
209 },
210 Vector {
211 _handler: DMAC1_BLK_DONE,
212 },
213 Vector {
214 _handler: DMAC1_BUF_DONE,
215 },
216 Vector {
217 _handler: SDMA_DONE_0,
218 },
219 Vector { _handler: SDMA_ERR },
220 Vector {
221 _handler: I2SSLV_M4_TX_OR_INTR,
222 },
223 Vector {
224 _handler: LPSD_VOICE_OFF,
225 },
226 Vector {
227 _handler: DMIC_VOICE_OFF,
228 },
229];
230#[doc = r"Enumeration of all the interrupts."]
231#[derive(Copy, Clone, Debug, PartialEq, Eq)]
232#[repr(u16)]
233pub enum Interrupt {
234 #[doc = "0 - Software_Interrupt_2"]
235 SOFTWARE_INTERRUPT_2 = 0,
236 #[doc = "1 - Software_Interrupt_1"]
237 SOFTWARE_INTERRUPT_1 = 1,
238 #[doc = "3 - FFE0_Message"]
239 FFE0_MESSAGE = 3,
240 #[doc = "4 - Fabric_Message"]
241 FABRIC_MESSAGE = 4,
242 #[doc = "5 - Global GPIO interrupt"]
243 SENSOR_GPIO = 5,
244 #[doc = "7 - Global UART interrupt"]
245 UART = 7,
246 #[doc = "8 - Interrupt triggered when a timer counts down to 0. The status can be read and cleared (0x4000_4830\\[2\\]), and can be masked (0x4000_4834\\[2\\]
247for Host), and (0x4000_4838\\[2\\]
248for M4)."]
249 TIMER = 8,
250 #[doc = "9 - CPU_WDOG_INTR"]
251 CPU_WDOG_INTR = 9,
252 #[doc = "10 - CPU_WDOG_RST"]
253 CPU_WDOG_RST = 10,
254 #[doc = "11 - BUS_Timeout"]
255 BUS_TIMEOUT = 11,
256 #[doc = "12 - FPU"]
257 FPU = 12,
258 #[doc = "13 - PKFB"]
259 PKFB = 13,
260 #[doc = "14 - I2S"]
261 I2S = 14,
262 #[doc = "15 - Audio"]
263 AUDIO = 15,
264 #[doc = "16 - SPI_MS"]
265 SPI_MS = 16,
266 #[doc = "17 - CFG_DMA"]
267 CFG_DMA = 17,
268 #[doc = "18 - PMU_TIMER"]
269 PMU_TIMER = 18,
270 #[doc = "19 - ADC Done interrupt"]
271 ADC_DONE = 19,
272 #[doc = "20 - RTC_Alarm"]
273 RTC_ALARM = 20,
274 #[doc = "21 - Reset_Interrupt"]
275 RESET_INTERRUPT = 21,
276 #[doc = "22 - FFE0_Combined"]
277 FFE0_COMBINED = 22,
278 #[doc = "23 - FFE_WDT"]
279 FFE_WDT = 23,
280 #[doc = "24 - AP_Boot"]
281 AP_BOOT = 24,
282 #[doc = "25 - LDO30_PG_INTR"]
283 LDO30_PG_INTR = 25,
284 #[doc = "26 - LDO50_PG_INTR"]
285 LDO50_PG_INTR = 26,
286 #[doc = "27 - SRAM_128_TIMEOUT"]
287 SRAM_128_TIMEOUT = 27,
288 #[doc = "28 - LPSD_Voice_Det"]
289 LPSD_VOICE_DET = 28,
290 #[doc = "29 - DMIC_Voice_Det"]
291 DMIC_VOICE_DET = 29,
292 #[doc = "31 - SDMA_DONE_1"]
293 SDMA_DONE_1 = 31,
294 #[doc = "32 - SDMA_DONE_2"]
295 SDMA_DONE_2 = 32,
296 #[doc = "33 - SDMA_DONE_3"]
297 SDMA_DONE_3 = 33,
298 #[doc = "34 - SDMA_DONE_4"]
299 SDMA_DONE_4 = 34,
300 #[doc = "35 - SDMA_DONE_5"]
301 SDMA_DONE_5 = 35,
302 #[doc = "36 - SDMA_DONE_6"]
303 SDMA_DONE_6 = 36,
304 #[doc = "37 - SDMA_DONE_7"]
305 SDMA_DONE_7 = 37,
306 #[doc = "38 - SDMA_DONE_8"]
307 SDMA_DONE_8 = 38,
308 #[doc = "39 - SDMA_DONE_9"]
309 SDMA_DONE_9 = 39,
310 #[doc = "40 - SDMA_DONE_10"]
311 SDMA_DONE_10 = 40,
312 #[doc = "41 - SDMA_DONE_11"]
313 SDMA_DONE_11 = 41,
314 #[doc = "42 - AP_PDM_CLK_ON"]
315 AP_PDM_CLK_ON = 42,
316 #[doc = "43 - AP_PDM_CLK_OFF"]
317 AP_PDM_CLK_OFF = 43,
318 #[doc = "44 - DMAC0_BLK_DONE"]
319 DMAC0_BLK_DONE = 44,
320 #[doc = "45 - DMAC0_BUF_DONE"]
321 DMAC0_BUF_DONE = 45,
322 #[doc = "46 - DMAC1_BLK_DONE"]
323 DMAC1_BLK_DONE = 46,
324 #[doc = "47 - DMAC1_BUF_DONE"]
325 DMAC1_BUF_DONE = 47,
326 #[doc = "48 - SDMA_DONE_0"]
327 SDMA_DONE_0 = 48,
328 #[doc = "49 - SDMA_ERR"]
329 SDMA_ERR = 49,
330 #[doc = "50 - I2SSLV_M4_tx_or_intr"]
331 I2SSLV_M4_TX_OR_INTR = 50,
332 #[doc = "51 - LPSD_VOICE_OFF"]
333 LPSD_VOICE_OFF = 51,
334 #[doc = "52 - DMIC_VOICE_OFF"]
335 DMIC_VOICE_OFF = 52,
336}
337unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
338 #[inline(always)]
339 fn number(self) -> u16 {
340 self as u16
341 }
342}
343#[doc = "Selects source APB Master to SPI Master between M4/AP and Fabric"]
344pub struct A1_REGS {
345 _marker: PhantomData<*const ()>,
346}
347unsafe impl Send for A1_REGS {}
348impl A1_REGS {
349 #[doc = r"Pointer to the register block"]
350 pub const PTR: *const a1_regs::RegisterBlock = 0x4000_6000 as *const _;
351 #[doc = r"Return the pointer to the register block"]
352 #[inline(always)]
353 pub const fn ptr() -> *const a1_regs::RegisterBlock {
354 Self::PTR
355 }
356}
357impl Deref for A1_REGS {
358 type Target = a1_regs::RegisterBlock;
359 #[inline(always)]
360 fn deref(&self) -> &Self::Target {
361 unsafe { &*Self::PTR }
362 }
363}
364impl core::fmt::Debug for A1_REGS {
365 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
366 f.debug_struct("A1_REGS").finish()
367 }
368}
369#[doc = "Selects source APB Master to SPI Master between M4/AP and Fabric"]
370pub mod a1_regs;
371#[doc = "IO Multiplexing Control"]
372pub struct IOMUX {
373 _marker: PhantomData<*const ()>,
374}
375unsafe impl Send for IOMUX {}
376impl IOMUX {
377 #[doc = r"Pointer to the register block"]
378 pub const PTR: *const iomux::RegisterBlock = 0x4000_4c00 as *const _;
379 #[doc = r"Return the pointer to the register block"]
380 #[inline(always)]
381 pub const fn ptr() -> *const iomux::RegisterBlock {
382 Self::PTR
383 }
384}
385impl Deref for IOMUX {
386 type Target = iomux::RegisterBlock;
387 #[inline(always)]
388 fn deref(&self) -> &Self::Target {
389 unsafe { &*Self::PTR }
390 }
391}
392impl core::fmt::Debug for IOMUX {
393 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
394 f.debug_struct("IOMUX").finish()
395 }
396}
397#[doc = "IO Multiplexing Control"]
398pub mod iomux;
399#[doc = "Analog-to-Digital Converter"]
400pub struct ADC {
401 _marker: PhantomData<*const ()>,
402}
403unsafe impl Send for ADC {}
404impl ADC {
405 #[doc = r"Pointer to the register block"]
406 pub const PTR: *const adc::RegisterBlock = 0x4000_5a00 as *const _;
407 #[doc = r"Return the pointer to the register block"]
408 #[inline(always)]
409 pub const fn ptr() -> *const adc::RegisterBlock {
410 Self::PTR
411 }
412}
413impl Deref for ADC {
414 type Target = adc::RegisterBlock;
415 #[inline(always)]
416 fn deref(&self) -> &Self::Target {
417 unsafe { &*Self::PTR }
418 }
419}
420impl core::fmt::Debug for ADC {
421 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
422 f.debug_struct("ADC").finish()
423 }
424}
425#[doc = "Analog-to-Digital Converter"]
426pub mod adc;
427#[doc = "Analog IP block"]
428pub struct AIP {
429 _marker: PhantomData<*const ()>,
430}
431unsafe impl Send for AIP {}
432impl AIP {
433 #[doc = r"Pointer to the register block"]
434 pub const PTR: *const aip::RegisterBlock = 0x4000_5400 as *const _;
435 #[doc = r"Return the pointer to the register block"]
436 #[inline(always)]
437 pub const fn ptr() -> *const aip::RegisterBlock {
438 Self::PTR
439 }
440}
441impl Deref for AIP {
442 type Target = aip::RegisterBlock;
443 #[inline(always)]
444 fn deref(&self) -> &Self::Target {
445 unsafe { &*Self::PTR }
446 }
447}
448impl core::fmt::Debug for AIP {
449 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
450 f.debug_struct("AIP").finish()
451 }
452}
453#[doc = "Analog IP block"]
454pub mod aip;
455#[doc = "Audio Subsystem"]
456pub struct AUD {
457 _marker: PhantomData<*const ()>,
458}
459unsafe impl Send for AUD {}
460impl AUD {
461 #[doc = r"Pointer to the register block"]
462 pub const PTR: *const aud::RegisterBlock = 0x4001_5000 as *const _;
463 #[doc = r"Return the pointer to the register block"]
464 #[inline(always)]
465 pub const fn ptr() -> *const aud::RegisterBlock {
466 Self::PTR
467 }
468}
469impl Deref for AUD {
470 type Target = aud::RegisterBlock;
471 #[inline(always)]
472 fn deref(&self) -> &Self::Target {
473 unsafe { &*Self::PTR }
474 }
475}
476impl core::fmt::Debug for AUD {
477 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
478 f.debug_struct("AUD").finish()
479 }
480}
481#[doc = "Audio Subsystem"]
482pub mod aud;
483#[doc = "PIF Register (FPGA Programming interface)"]
484pub struct CFG_CTL {
485 _marker: PhantomData<*const ()>,
486}
487unsafe impl Send for CFG_CTL {}
488impl CFG_CTL {
489 #[doc = r"Pointer to the register block"]
490 pub const PTR: *const cfg_ctl::RegisterBlock = 0x4001_4000 as *const _;
491 #[doc = r"Return the pointer to the register block"]
492 #[inline(always)]
493 pub const fn ptr() -> *const cfg_ctl::RegisterBlock {
494 Self::PTR
495 }
496}
497impl Deref for CFG_CTL {
498 type Target = cfg_ctl::RegisterBlock;
499 #[inline(always)]
500 fn deref(&self) -> &Self::Target {
501 unsafe { &*Self::PTR }
502 }
503}
504impl core::fmt::Debug for CFG_CTL {
505 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
506 f.debug_struct("CFG_CTL").finish()
507 }
508}
509#[doc = "PIF Register (FPGA Programming interface)"]
510pub mod cfg_ctl;
511#[doc = "Clock Reset Unit"]
512pub struct CRU {
513 _marker: PhantomData<*const ()>,
514}
515unsafe impl Send for CRU {}
516impl CRU {
517 #[doc = r"Pointer to the register block"]
518 pub const PTR: *const cru::RegisterBlock = 0x4000_4000 as *const _;
519 #[doc = r"Return the pointer to the register block"]
520 #[inline(always)]
521 pub const fn ptr() -> *const cru::RegisterBlock {
522 Self::PTR
523 }
524}
525impl Deref for CRU {
526 type Target = cru::RegisterBlock;
527 #[inline(always)]
528 fn deref(&self) -> &Self::Target {
529 unsafe { &*Self::PTR }
530 }
531}
532impl core::fmt::Debug for CRU {
533 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
534 f.debug_struct("CRU").finish()
535 }
536}
537#[doc = "Clock Reset Unit"]
538pub mod cru;
539#[doc = "Direct Memory Access peripheral"]
540pub struct DMA {
541 _marker: PhantomData<*const ()>,
542}
543unsafe impl Send for DMA {}
544impl DMA {
545 #[doc = r"Pointer to the register block"]
546 pub const PTR: *const dma::RegisterBlock = 0x4000_7400 as *const _;
547 #[doc = r"Return the pointer to the register block"]
548 #[inline(always)]
549 pub const fn ptr() -> *const dma::RegisterBlock {
550 Self::PTR
551 }
552}
553impl Deref for DMA {
554 type Target = dma::RegisterBlock;
555 #[inline(always)]
556 fn deref(&self) -> &Self::Target {
557 unsafe { &*Self::PTR }
558 }
559}
560impl core::fmt::Debug for DMA {
561 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
562 f.debug_struct("DMA").finish()
563 }
564}
565#[doc = "Direct Memory Access peripheral"]
566pub mod dma;
567#[doc = "Flexible Fusion Engine registers"]
568pub struct EXTREGSFFE {
569 _marker: PhantomData<*const ()>,
570}
571unsafe impl Send for EXTREGSFFE {}
572impl EXTREGSFFE {
573 #[doc = r"Pointer to the register block"]
574 pub const PTR: *const ext_regs_ffe::RegisterBlock = 0x4004_a000 as *const _;
575 #[doc = r"Return the pointer to the register block"]
576 #[inline(always)]
577 pub const fn ptr() -> *const ext_regs_ffe::RegisterBlock {
578 Self::PTR
579 }
580}
581impl Deref for EXTREGSFFE {
582 type Target = ext_regs_ffe::RegisterBlock;
583 #[inline(always)]
584 fn deref(&self) -> &Self::Target {
585 unsafe { &*Self::PTR }
586 }
587}
588impl core::fmt::Debug for EXTREGSFFE {
589 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
590 f.debug_struct("EXTREGSFFE").finish()
591 }
592}
593#[doc = "Flexible Fusion Engine registers"]
594pub mod ext_regs_ffe;
595#[doc = "I2S Slave"]
596pub struct I2S_SLAVE {
597 _marker: PhantomData<*const ()>,
598}
599unsafe impl Send for I2S_SLAVE {}
600impl I2S_SLAVE {
601 #[doc = r"Pointer to the register block"]
602 pub const PTR: *const i2s_slave::RegisterBlock = 0x4000_b000 as *const _;
603 #[doc = r"Return the pointer to the register block"]
604 #[inline(always)]
605 pub const fn ptr() -> *const i2s_slave::RegisterBlock {
606 Self::PTR
607 }
608}
609impl Deref for I2S_SLAVE {
610 type Target = i2s_slave::RegisterBlock;
611 #[inline(always)]
612 fn deref(&self) -> &Self::Target {
613 unsafe { &*Self::PTR }
614 }
615}
616impl core::fmt::Debug for I2S_SLAVE {
617 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
618 f.debug_struct("I2S_SLAVE").finish()
619 }
620}
621#[doc = "I2S Slave"]
622pub mod i2s_slave;
623#[doc = "Interrupt Controller"]
624pub struct INTR_CTRL {
625 _marker: PhantomData<*const ()>,
626}
627unsafe impl Send for INTR_CTRL {}
628impl INTR_CTRL {
629 #[doc = r"Pointer to the register block"]
630 pub const PTR: *const intr_ctrl::RegisterBlock = 0x4000_4800 as *const _;
631 #[doc = r"Return the pointer to the register block"]
632 #[inline(always)]
633 pub const fn ptr() -> *const intr_ctrl::RegisterBlock {
634 Self::PTR
635 }
636}
637impl Deref for INTR_CTRL {
638 type Target = intr_ctrl::RegisterBlock;
639 #[inline(always)]
640 fn deref(&self) -> &Self::Target {
641 unsafe { &*Self::PTR }
642 }
643}
644impl core::fmt::Debug for INTR_CTRL {
645 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
646 f.debug_struct("INTR_CTRL").finish()
647 }
648}
649#[doc = "Interrupt Controller"]
650pub mod intr_ctrl;
651#[doc = "MISC registers"]
652pub struct MISC {
653 _marker: PhantomData<*const ()>,
654}
655unsafe impl Send for MISC {}
656impl MISC {
657 #[doc = r"Pointer to the register block"]
658 pub const PTR: *const misc::RegisterBlock = 0x4000_5000 as *const _;
659 #[doc = r"Return the pointer to the register block"]
660 #[inline(always)]
661 pub const fn ptr() -> *const misc::RegisterBlock {
662 Self::PTR
663 }
664}
665impl Deref for MISC {
666 type Target = misc::RegisterBlock;
667 #[inline(always)]
668 fn deref(&self) -> &Self::Target {
669 unsafe { &*Self::PTR }
670 }
671}
672impl core::fmt::Debug for MISC {
673 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
674 f.debug_struct("MISC").finish()
675 }
676}
677#[doc = "MISC registers"]
678pub mod misc;
679#[doc = "Packet FFO Bank control"]
680pub struct PKFB {
681 _marker: PhantomData<*const ()>,
682}
683unsafe impl Send for PKFB {}
684impl PKFB {
685 #[doc = r"Pointer to the register block"]
686 pub const PTR: *const pkfb::RegisterBlock = 0x4000_2000 as *const _;
687 #[doc = r"Return the pointer to the register block"]
688 #[inline(always)]
689 pub const fn ptr() -> *const pkfb::RegisterBlock {
690 Self::PTR
691 }
692}
693impl Deref for PKFB {
694 type Target = pkfb::RegisterBlock;
695 #[inline(always)]
696 fn deref(&self) -> &Self::Target {
697 unsafe { &*Self::PTR }
698 }
699}
700impl core::fmt::Debug for PKFB {
701 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
702 f.debug_struct("PKFB").finish()
703 }
704}
705#[doc = "Packet FFO Bank control"]
706pub mod pkfb;
707#[doc = "Power Management Unit"]
708pub struct PMU {
709 _marker: PhantomData<*const ()>,
710}
711unsafe impl Send for PMU {}
712impl PMU {
713 #[doc = r"Pointer to the register block"]
714 pub const PTR: *const pmu::RegisterBlock = 0x4000_2000 as *const _;
715 #[doc = r"Return the pointer to the register block"]
716 #[inline(always)]
717 pub const fn ptr() -> *const pmu::RegisterBlock {
718 Self::PTR
719 }
720}
721impl Deref for PMU {
722 type Target = pmu::RegisterBlock;
723 #[inline(always)]
724 fn deref(&self) -> &Self::Target {
725 unsafe { &*Self::PTR }
726 }
727}
728impl core::fmt::Debug for PMU {
729 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
730 f.debug_struct("PMU").finish()
731 }
732}
733#[doc = "Power Management Unit"]
734pub mod pmu;
735#[doc = "System Direct Memory Access Bridge"]
736pub struct SDMA_BRIDGE {
737 _marker: PhantomData<*const ()>,
738}
739unsafe impl Send for SDMA_BRIDGE {}
740impl SDMA_BRIDGE {
741 #[doc = r"Pointer to the register block"]
742 pub const PTR: *const sdma_bridge::RegisterBlock = 0x4000_d000 as *const _;
743 #[doc = r"Return the pointer to the register block"]
744 #[inline(always)]
745 pub const fn ptr() -> *const sdma_bridge::RegisterBlock {
746 Self::PTR
747 }
748}
749impl Deref for SDMA_BRIDGE {
750 type Target = sdma_bridge::RegisterBlock;
751 #[inline(always)]
752 fn deref(&self) -> &Self::Target {
753 unsafe { &*Self::PTR }
754 }
755}
756impl core::fmt::Debug for SDMA_BRIDGE {
757 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
758 f.debug_struct("SDMA_BRIDGE").finish()
759 }
760}
761#[doc = "System Direct Memory Access Bridge"]
762pub mod sdma_bridge;
763#[doc = "System DMA SRAM"]
764pub struct SDMA_SRAM {
765 _marker: PhantomData<*const ()>,
766}
767unsafe impl Send for SDMA_SRAM {}
768impl SDMA_SRAM {
769 #[doc = r"Pointer to the register block"]
770 pub const PTR: *const sdma_sram::RegisterBlock = 0x4000_f000 as *const _;
771 #[doc = r"Return the pointer to the register block"]
772 #[inline(always)]
773 pub const fn ptr() -> *const sdma_sram::RegisterBlock {
774 Self::PTR
775 }
776}
777impl Deref for SDMA_SRAM {
778 type Target = sdma_sram::RegisterBlock;
779 #[inline(always)]
780 fn deref(&self) -> &Self::Target {
781 unsafe { &*Self::PTR }
782 }
783}
784impl core::fmt::Debug for SDMA_SRAM {
785 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
786 f.debug_struct("SDMA_SRAM").finish()
787 }
788}
789#[doc = "System DMA SRAM"]
790pub mod sdma_sram;
791#[doc = "System Direct Access Memory"]
792pub struct SDMA {
793 _marker: PhantomData<*const ()>,
794}
795unsafe impl Send for SDMA {}
796impl SDMA {
797 #[doc = r"Pointer to the register block"]
798 pub const PTR: *const sdma::RegisterBlock = 0x4000_c000 as *const _;
799 #[doc = r"Return the pointer to the register block"]
800 #[inline(always)]
801 pub const fn ptr() -> *const sdma::RegisterBlock {
802 Self::PTR
803 }
804}
805impl Deref for SDMA {
806 type Target = sdma::RegisterBlock;
807 #[inline(always)]
808 fn deref(&self) -> &Self::Target {
809 unsafe { &*Self::PTR }
810 }
811}
812impl core::fmt::Debug for SDMA {
813 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
814 f.debug_struct("SDMA").finish()
815 }
816}
817#[doc = "System Direct Access Memory"]
818pub mod sdma;
819#[doc = "SPI peripheral control"]
820pub struct SPI {
821 _marker: PhantomData<*const ()>,
822}
823unsafe impl Send for SPI {}
824impl SPI {
825 #[doc = r"Pointer to the register block"]
826 pub const PTR: *const spi::RegisterBlock = 0x4000_7000 as *const _;
827 #[doc = r"Return the pointer to the register block"]
828 #[inline(always)]
829 pub const fn ptr() -> *const spi::RegisterBlock {
830 Self::PTR
831 }
832}
833impl Deref for SPI {
834 type Target = spi::RegisterBlock;
835 #[inline(always)]
836 fn deref(&self) -> &Self::Target {
837 unsafe { &*Self::PTR }
838 }
839}
840impl core::fmt::Debug for SPI {
841 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
842 f.debug_struct("SPI").finish()
843 }
844}
845#[doc = "SPI peripheral control"]
846pub mod spi;
847#[doc = "Simple Periodic Timer"]
848pub struct SPT {
849 _marker: PhantomData<*const ()>,
850}
851unsafe impl Send for SPT {}
852impl SPT {
853 #[doc = r"Pointer to the register block"]
854 pub const PTR: *const spt::RegisterBlock = 0x4000_5c00 as *const _;
855 #[doc = r"Return the pointer to the register block"]
856 #[inline(always)]
857 pub const fn ptr() -> *const spt::RegisterBlock {
858 Self::PTR
859 }
860}
861impl Deref for SPT {
862 type Target = spt::RegisterBlock;
863 #[inline(always)]
864 fn deref(&self) -> &Self::Target {
865 unsafe { &*Self::PTR }
866 }
867}
868impl core::fmt::Debug for SPT {
869 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
870 f.debug_struct("SPT").finish()
871 }
872}
873#[doc = "Simple Periodic Timer"]
874pub mod spt;
875#[doc = "Communication Manager - Top Level controller"]
876pub struct SPI_TLC {
877 _marker: PhantomData<*const ()>,
878}
879unsafe impl Send for SPI_TLC {}
880impl SPI_TLC {
881 #[doc = r"Pointer to the register block"]
882 pub const PTR: *const spi_tlc::RegisterBlock = 0x4005_0000 as *const _;
883 #[doc = r"Return the pointer to the register block"]
884 #[inline(always)]
885 pub const fn ptr() -> *const spi_tlc::RegisterBlock {
886 Self::PTR
887 }
888}
889impl Deref for SPI_TLC {
890 type Target = spi_tlc::RegisterBlock;
891 #[inline(always)]
892 fn deref(&self) -> &Self::Target {
893 unsafe { &*Self::PTR }
894 }
895}
896impl core::fmt::Debug for SPI_TLC {
897 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
898 f.debug_struct("SPI_TLC").finish()
899 }
900}
901#[doc = "Communication Manager - Top Level controller"]
902pub mod spi_tlc;
903#[doc = "Timer peripheral"]
904pub struct TIMER {
905 _marker: PhantomData<*const ()>,
906}
907unsafe impl Send for TIMER {}
908impl TIMER {
909 #[doc = r"Pointer to the register block"]
910 pub const PTR: *const timer::RegisterBlock = 0x4001_3000 as *const _;
911 #[doc = r"Return the pointer to the register block"]
912 #[inline(always)]
913 pub const fn ptr() -> *const timer::RegisterBlock {
914 Self::PTR
915 }
916}
917impl Deref for TIMER {
918 type Target = timer::RegisterBlock;
919 #[inline(always)]
920 fn deref(&self) -> &Self::Target {
921 unsafe { &*Self::PTR }
922 }
923}
924impl core::fmt::Debug for TIMER {
925 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
926 f.debug_struct("TIMER").finish()
927 }
928}
929#[doc = "Timer peripheral"]
930pub mod timer;
931#[doc = "Universal Asynchronous Receiver Transmitter"]
932pub struct UART {
933 _marker: PhantomData<*const ()>,
934}
935unsafe impl Send for UART {}
936impl UART {
937 #[doc = r"Pointer to the register block"]
938 pub const PTR: *const uart::RegisterBlock = 0x4001_0000 as *const _;
939 #[doc = r"Return the pointer to the register block"]
940 #[inline(always)]
941 pub const fn ptr() -> *const uart::RegisterBlock {
942 Self::PTR
943 }
944}
945impl Deref for UART {
946 type Target = uart::RegisterBlock;
947 #[inline(always)]
948 fn deref(&self) -> &Self::Target {
949 unsafe { &*Self::PTR }
950 }
951}
952impl core::fmt::Debug for UART {
953 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
954 f.debug_struct("UART").finish()
955 }
956}
957#[doc = "Universal Asynchronous Receiver Transmitter"]
958pub mod uart;
959#[doc = "WatchDog Timer"]
960pub struct WDT {
961 _marker: PhantomData<*const ()>,
962}
963unsafe impl Send for WDT {}
964impl WDT {
965 #[doc = r"Pointer to the register block"]
966 pub const PTR: *const wdt::RegisterBlock = 0x4001_2000 as *const _;
967 #[doc = r"Return the pointer to the register block"]
968 #[inline(always)]
969 pub const fn ptr() -> *const wdt::RegisterBlock {
970 Self::PTR
971 }
972}
973impl Deref for WDT {
974 type Target = wdt::RegisterBlock;
975 #[inline(always)]
976 fn deref(&self) -> &Self::Target {
977 unsafe { &*Self::PTR }
978 }
979}
980impl core::fmt::Debug for WDT {
981 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
982 f.debug_struct("WDT").finish()
983 }
984}
985#[doc = "WatchDog Timer"]
986pub mod wdt;
987#[doc = "External registers to control M4 Subsystem (not a core peripheral)"]
988pub struct EXTM4REGS {
989 _marker: PhantomData<*const ()>,
990}
991unsafe impl Send for EXTM4REGS {}
992impl EXTM4REGS {
993 #[doc = r"Pointer to the register block"]
994 pub const PTR: *const extm4regs::RegisterBlock = 0x4000_0000 as *const _;
995 #[doc = r"Return the pointer to the register block"]
996 #[inline(always)]
997 pub const fn ptr() -> *const extm4regs::RegisterBlock {
998 Self::PTR
999 }
1000}
1001impl Deref for EXTM4REGS {
1002 type Target = extm4regs::RegisterBlock;
1003 #[inline(always)]
1004 fn deref(&self) -> &Self::Target {
1005 unsafe { &*Self::PTR }
1006 }
1007}
1008impl core::fmt::Debug for EXTM4REGS {
1009 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1010 f.debug_struct("EXTM4REGS").finish()
1011 }
1012}
1013#[doc = "External registers to control M4 Subsystem (not a core peripheral)"]
1014pub mod extm4regs;
1015#[no_mangle]
1016static mut DEVICE_PERIPHERALS: bool = false;
1017#[doc = r"All the peripherals"]
1018#[allow(non_snake_case)]
1019pub struct Peripherals {
1020 #[doc = "A1_REGS"]
1021 pub A1_REGS: A1_REGS,
1022 #[doc = "IOMUX"]
1023 pub IOMUX: IOMUX,
1024 #[doc = "ADC"]
1025 pub ADC: ADC,
1026 #[doc = "AIP"]
1027 pub AIP: AIP,
1028 #[doc = "AUD"]
1029 pub AUD: AUD,
1030 #[doc = "CFG_CTL"]
1031 pub CFG_CTL: CFG_CTL,
1032 #[doc = "CRU"]
1033 pub CRU: CRU,
1034 #[doc = "DMA"]
1035 pub DMA: DMA,
1036 #[doc = "EXTREGSFFE"]
1037 pub EXTREGSFFE: EXTREGSFFE,
1038 #[doc = "I2S_SLAVE"]
1039 pub I2S_SLAVE: I2S_SLAVE,
1040 #[doc = "INTR_CTRL"]
1041 pub INTR_CTRL: INTR_CTRL,
1042 #[doc = "MISC"]
1043 pub MISC: MISC,
1044 #[doc = "PKFB"]
1045 pub PKFB: PKFB,
1046 #[doc = "PMU"]
1047 pub PMU: PMU,
1048 #[doc = "SDMA_BRIDGE"]
1049 pub SDMA_BRIDGE: SDMA_BRIDGE,
1050 #[doc = "SDMA_SRAM"]
1051 pub SDMA_SRAM: SDMA_SRAM,
1052 #[doc = "SDMA"]
1053 pub SDMA: SDMA,
1054 #[doc = "SPI"]
1055 pub SPI: SPI,
1056 #[doc = "SPT"]
1057 pub SPT: SPT,
1058 #[doc = "SPI_TLC"]
1059 pub SPI_TLC: SPI_TLC,
1060 #[doc = "TIMER"]
1061 pub TIMER: TIMER,
1062 #[doc = "UART"]
1063 pub UART: UART,
1064 #[doc = "WDT"]
1065 pub WDT: WDT,
1066 #[doc = "EXTM4REGS"]
1067 pub EXTM4REGS: EXTM4REGS,
1068}
1069impl Peripherals {
1070 #[doc = r"Returns all the peripherals *once*"]
1071 #[inline]
1072 pub fn take() -> Option<Self> {
1073 cortex_m::interrupt::free(|_| {
1074 if unsafe { DEVICE_PERIPHERALS } {
1075 None
1076 } else {
1077 Some(unsafe { Peripherals::steal() })
1078 }
1079 })
1080 }
1081 #[doc = r"Unchecked version of `Peripherals::take`"]
1082 #[inline]
1083 pub unsafe fn steal() -> Self {
1084 DEVICE_PERIPHERALS = true;
1085 Peripherals {
1086 A1_REGS: A1_REGS {
1087 _marker: PhantomData,
1088 },
1089 IOMUX: IOMUX {
1090 _marker: PhantomData,
1091 },
1092 ADC: ADC {
1093 _marker: PhantomData,
1094 },
1095 AIP: AIP {
1096 _marker: PhantomData,
1097 },
1098 AUD: AUD {
1099 _marker: PhantomData,
1100 },
1101 CFG_CTL: CFG_CTL {
1102 _marker: PhantomData,
1103 },
1104 CRU: CRU {
1105 _marker: PhantomData,
1106 },
1107 DMA: DMA {
1108 _marker: PhantomData,
1109 },
1110 EXTREGSFFE: EXTREGSFFE {
1111 _marker: PhantomData,
1112 },
1113 I2S_SLAVE: I2S_SLAVE {
1114 _marker: PhantomData,
1115 },
1116 INTR_CTRL: INTR_CTRL {
1117 _marker: PhantomData,
1118 },
1119 MISC: MISC {
1120 _marker: PhantomData,
1121 },
1122 PKFB: PKFB {
1123 _marker: PhantomData,
1124 },
1125 PMU: PMU {
1126 _marker: PhantomData,
1127 },
1128 SDMA_BRIDGE: SDMA_BRIDGE {
1129 _marker: PhantomData,
1130 },
1131 SDMA_SRAM: SDMA_SRAM {
1132 _marker: PhantomData,
1133 },
1134 SDMA: SDMA {
1135 _marker: PhantomData,
1136 },
1137 SPI: SPI {
1138 _marker: PhantomData,
1139 },
1140 SPT: SPT {
1141 _marker: PhantomData,
1142 },
1143 SPI_TLC: SPI_TLC {
1144 _marker: PhantomData,
1145 },
1146 TIMER: TIMER {
1147 _marker: PhantomData,
1148 },
1149 UART: UART {
1150 _marker: PhantomData,
1151 },
1152 WDT: WDT {
1153 _marker: PhantomData,
1154 },
1155 EXTM4REGS: EXTM4REGS {
1156 _marker: PhantomData,
1157 },
1158 }
1159 }
1160}