1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::CTRL {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = "Possible values of the field `MODE`"]
46#[derive(Clone, Copy, Debug, PartialEq)]
47pub enum MODER {
48 #[doc = "The module is disabled."]
49 DISABLE,
50 #[doc = "Single input LFACLK oversampling mode (available in EM0-EM3)."]
51 OVSSINGLE,
52 #[doc = "Externally clocked single input counter mode (available in EM0-EM3)."]
53 EXTCLKSINGLE,
54 #[doc = "Externally clocked quadrature decoder mode (available in EM0-EM3)."]
55 EXTCLKQUAD,
56 #[doc = "LFACLK oversampling quadrature decoder 1X mode (available in EM0-EM3)."]
57 OVSQUAD1X,
58 #[doc = "LFACLK oversampling quadrature decoder 2X mode (available in EM0-EM3)."]
59 OVSQUAD2X,
60 #[doc = "LFACLK oversampling quadrature decoder 4X mode (available in EM0-EM3)."]
61 OVSQUAD4X,
62 #[doc = r" Reserved"]
63 _Reserved(u8),
64}
65impl MODER {
66 #[doc = r" Value of the field as raw bits"]
67 #[inline]
68 pub fn bits(&self) -> u8 {
69 match *self {
70 MODER::DISABLE => 0,
71 MODER::OVSSINGLE => 1,
72 MODER::EXTCLKSINGLE => 2,
73 MODER::EXTCLKQUAD => 3,
74 MODER::OVSQUAD1X => 4,
75 MODER::OVSQUAD2X => 5,
76 MODER::OVSQUAD4X => 6,
77 MODER::_Reserved(bits) => bits,
78 }
79 }
80 #[allow(missing_docs)]
81 #[doc(hidden)]
82 #[inline]
83 pub fn _from(value: u8) -> MODER {
84 match value {
85 0 => MODER::DISABLE,
86 1 => MODER::OVSSINGLE,
87 2 => MODER::EXTCLKSINGLE,
88 3 => MODER::EXTCLKQUAD,
89 4 => MODER::OVSQUAD1X,
90 5 => MODER::OVSQUAD2X,
91 6 => MODER::OVSQUAD4X,
92 i => MODER::_Reserved(i),
93 }
94 }
95 #[doc = "Checks if the value of the field is `DISABLE`"]
96 #[inline]
97 pub fn is_disable(&self) -> bool {
98 *self == MODER::DISABLE
99 }
100 #[doc = "Checks if the value of the field is `OVSSINGLE`"]
101 #[inline]
102 pub fn is_ovssingle(&self) -> bool {
103 *self == MODER::OVSSINGLE
104 }
105 #[doc = "Checks if the value of the field is `EXTCLKSINGLE`"]
106 #[inline]
107 pub fn is_extclksingle(&self) -> bool {
108 *self == MODER::EXTCLKSINGLE
109 }
110 #[doc = "Checks if the value of the field is `EXTCLKQUAD`"]
111 #[inline]
112 pub fn is_extclkquad(&self) -> bool {
113 *self == MODER::EXTCLKQUAD
114 }
115 #[doc = "Checks if the value of the field is `OVSQUAD1X`"]
116 #[inline]
117 pub fn is_ovsquad1x(&self) -> bool {
118 *self == MODER::OVSQUAD1X
119 }
120 #[doc = "Checks if the value of the field is `OVSQUAD2X`"]
121 #[inline]
122 pub fn is_ovsquad2x(&self) -> bool {
123 *self == MODER::OVSQUAD2X
124 }
125 #[doc = "Checks if the value of the field is `OVSQUAD4X`"]
126 #[inline]
127 pub fn is_ovsquad4x(&self) -> bool {
128 *self == MODER::OVSQUAD4X
129 }
130}
131#[doc = r" Value of the field"]
132pub struct FILTR {
133 bits: bool,
134}
135impl FILTR {
136 #[doc = r" Value of the field as raw bits"]
137 #[inline]
138 pub fn bit(&self) -> bool {
139 self.bits
140 }
141 #[doc = r" Returns `true` if the bit is clear (0)"]
142 #[inline]
143 pub fn bit_is_clear(&self) -> bool {
144 !self.bit()
145 }
146 #[doc = r" Returns `true` if the bit is set (1)"]
147 #[inline]
148 pub fn bit_is_set(&self) -> bool {
149 self.bit()
150 }
151}
152#[doc = r" Value of the field"]
153pub struct RSTENR {
154 bits: bool,
155}
156impl RSTENR {
157 #[doc = r" Value of the field as raw bits"]
158 #[inline]
159 pub fn bit(&self) -> bool {
160 self.bits
161 }
162 #[doc = r" Returns `true` if the bit is clear (0)"]
163 #[inline]
164 pub fn bit_is_clear(&self) -> bool {
165 !self.bit()
166 }
167 #[doc = r" Returns `true` if the bit is set (1)"]
168 #[inline]
169 pub fn bit_is_set(&self) -> bool {
170 self.bit()
171 }
172}
173#[doc = r" Value of the field"]
174pub struct CNTRSTENR {
175 bits: bool,
176}
177impl CNTRSTENR {
178 #[doc = r" Value of the field as raw bits"]
179 #[inline]
180 pub fn bit(&self) -> bool {
181 self.bits
182 }
183 #[doc = r" Returns `true` if the bit is clear (0)"]
184 #[inline]
185 pub fn bit_is_clear(&self) -> bool {
186 !self.bit()
187 }
188 #[doc = r" Returns `true` if the bit is set (1)"]
189 #[inline]
190 pub fn bit_is_set(&self) -> bool {
191 self.bit()
192 }
193}
194#[doc = r" Value of the field"]
195pub struct AUXCNTRSTENR {
196 bits: bool,
197}
198impl AUXCNTRSTENR {
199 #[doc = r" Value of the field as raw bits"]
200 #[inline]
201 pub fn bit(&self) -> bool {
202 self.bits
203 }
204 #[doc = r" Returns `true` if the bit is clear (0)"]
205 #[inline]
206 pub fn bit_is_clear(&self) -> bool {
207 !self.bit()
208 }
209 #[doc = r" Returns `true` if the bit is set (1)"]
210 #[inline]
211 pub fn bit_is_set(&self) -> bool {
212 self.bit()
213 }
214}
215#[doc = r" Value of the field"]
216pub struct DEBUGHALTR {
217 bits: bool,
218}
219impl DEBUGHALTR {
220 #[doc = r" Value of the field as raw bits"]
221 #[inline]
222 pub fn bit(&self) -> bool {
223 self.bits
224 }
225 #[doc = r" Returns `true` if the bit is clear (0)"]
226 #[inline]
227 pub fn bit_is_clear(&self) -> bool {
228 !self.bit()
229 }
230 #[doc = r" Returns `true` if the bit is set (1)"]
231 #[inline]
232 pub fn bit_is_set(&self) -> bool {
233 self.bit()
234 }
235}
236#[doc = r" Value of the field"]
237pub struct HYSTR {
238 bits: bool,
239}
240impl HYSTR {
241 #[doc = r" Value of the field as raw bits"]
242 #[inline]
243 pub fn bit(&self) -> bool {
244 self.bits
245 }
246 #[doc = r" Returns `true` if the bit is clear (0)"]
247 #[inline]
248 pub fn bit_is_clear(&self) -> bool {
249 !self.bit()
250 }
251 #[doc = r" Returns `true` if the bit is set (1)"]
252 #[inline]
253 pub fn bit_is_set(&self) -> bool {
254 self.bit()
255 }
256}
257#[doc = r" Value of the field"]
258pub struct S1CDIRR {
259 bits: bool,
260}
261impl S1CDIRR {
262 #[doc = r" Value of the field as raw bits"]
263 #[inline]
264 pub fn bit(&self) -> bool {
265 self.bits
266 }
267 #[doc = r" Returns `true` if the bit is clear (0)"]
268 #[inline]
269 pub fn bit_is_clear(&self) -> bool {
270 !self.bit()
271 }
272 #[doc = r" Returns `true` if the bit is set (1)"]
273 #[inline]
274 pub fn bit_is_set(&self) -> bool {
275 self.bit()
276 }
277}
278#[doc = "Possible values of the field `CNTEV`"]
279#[derive(Clone, Copy, Debug, PartialEq)]
280pub enum CNTEVR {
281 #[doc = "Counts up on up-count and down on down-count events."]
282 BOTH,
283 #[doc = "Only counts up on up-count events."]
284 UP,
285 #[doc = "Only counts down on down-count events."]
286 DOWN,
287 #[doc = "Never counts."]
288 NONE,
289}
290impl CNTEVR {
291 #[doc = r" Value of the field as raw bits"]
292 #[inline]
293 pub fn bits(&self) -> u8 {
294 match *self {
295 CNTEVR::BOTH => 0,
296 CNTEVR::UP => 1,
297 CNTEVR::DOWN => 2,
298 CNTEVR::NONE => 3,
299 }
300 }
301 #[allow(missing_docs)]
302 #[doc(hidden)]
303 #[inline]
304 pub fn _from(value: u8) -> CNTEVR {
305 match value {
306 0 => CNTEVR::BOTH,
307 1 => CNTEVR::UP,
308 2 => CNTEVR::DOWN,
309 3 => CNTEVR::NONE,
310 _ => unreachable!(),
311 }
312 }
313 #[doc = "Checks if the value of the field is `BOTH`"]
314 #[inline]
315 pub fn is_both(&self) -> bool {
316 *self == CNTEVR::BOTH
317 }
318 #[doc = "Checks if the value of the field is `UP`"]
319 #[inline]
320 pub fn is_up(&self) -> bool {
321 *self == CNTEVR::UP
322 }
323 #[doc = "Checks if the value of the field is `DOWN`"]
324 #[inline]
325 pub fn is_down(&self) -> bool {
326 *self == CNTEVR::DOWN
327 }
328 #[doc = "Checks if the value of the field is `NONE`"]
329 #[inline]
330 pub fn is_none(&self) -> bool {
331 *self == CNTEVR::NONE
332 }
333}
334#[doc = "Possible values of the field `AUXCNTEV`"]
335#[derive(Clone, Copy, Debug, PartialEq)]
336pub enum AUXCNTEVR {
337 #[doc = "Never counts."]
338 NONE,
339 #[doc = "Counts up on up-count events."]
340 UP,
341 #[doc = "Counts up on down-count events."]
342 DOWN,
343 #[doc = "Counts up on both up-count and down-count events."]
344 BOTH,
345}
346impl AUXCNTEVR {
347 #[doc = r" Value of the field as raw bits"]
348 #[inline]
349 pub fn bits(&self) -> u8 {
350 match *self {
351 AUXCNTEVR::NONE => 0,
352 AUXCNTEVR::UP => 1,
353 AUXCNTEVR::DOWN => 2,
354 AUXCNTEVR::BOTH => 3,
355 }
356 }
357 #[allow(missing_docs)]
358 #[doc(hidden)]
359 #[inline]
360 pub fn _from(value: u8) -> AUXCNTEVR {
361 match value {
362 0 => AUXCNTEVR::NONE,
363 1 => AUXCNTEVR::UP,
364 2 => AUXCNTEVR::DOWN,
365 3 => AUXCNTEVR::BOTH,
366 _ => unreachable!(),
367 }
368 }
369 #[doc = "Checks if the value of the field is `NONE`"]
370 #[inline]
371 pub fn is_none(&self) -> bool {
372 *self == AUXCNTEVR::NONE
373 }
374 #[doc = "Checks if the value of the field is `UP`"]
375 #[inline]
376 pub fn is_up(&self) -> bool {
377 *self == AUXCNTEVR::UP
378 }
379 #[doc = "Checks if the value of the field is `DOWN`"]
380 #[inline]
381 pub fn is_down(&self) -> bool {
382 *self == AUXCNTEVR::DOWN
383 }
384 #[doc = "Checks if the value of the field is `BOTH`"]
385 #[inline]
386 pub fn is_both(&self) -> bool {
387 *self == AUXCNTEVR::BOTH
388 }
389}
390#[doc = r" Value of the field"]
391pub struct CNTDIRR {
392 bits: bool,
393}
394impl CNTDIRR {
395 #[doc = r" Value of the field as raw bits"]
396 #[inline]
397 pub fn bit(&self) -> bool {
398 self.bits
399 }
400 #[doc = r" Returns `true` if the bit is clear (0)"]
401 #[inline]
402 pub fn bit_is_clear(&self) -> bool {
403 !self.bit()
404 }
405 #[doc = r" Returns `true` if the bit is set (1)"]
406 #[inline]
407 pub fn bit_is_set(&self) -> bool {
408 self.bit()
409 }
410}
411#[doc = r" Value of the field"]
412pub struct EDGER {
413 bits: bool,
414}
415impl EDGER {
416 #[doc = r" Value of the field as raw bits"]
417 #[inline]
418 pub fn bit(&self) -> bool {
419 self.bits
420 }
421 #[doc = r" Returns `true` if the bit is clear (0)"]
422 #[inline]
423 pub fn bit_is_clear(&self) -> bool {
424 !self.bit()
425 }
426 #[doc = r" Returns `true` if the bit is set (1)"]
427 #[inline]
428 pub fn bit_is_set(&self) -> bool {
429 self.bit()
430 }
431}
432#[doc = "Possible values of the field `TCCMODE`"]
433#[derive(Clone, Copy, Debug, PartialEq)]
434pub enum TCCMODER {
435 #[doc = "Triggered compare and clear not enabled."]
436 DISABLED,
437 #[doc = "Compare and clear performed on each (optionally prescaled) LFA clock cycle."]
438 LFA,
439 #[doc = "Compare and clear performed on positive PRS edges."]
440 PRS,
441 #[doc = r" Reserved"]
442 _Reserved(u8),
443}
444impl TCCMODER {
445 #[doc = r" Value of the field as raw bits"]
446 #[inline]
447 pub fn bits(&self) -> u8 {
448 match *self {
449 TCCMODER::DISABLED => 0,
450 TCCMODER::LFA => 1,
451 TCCMODER::PRS => 2,
452 TCCMODER::_Reserved(bits) => bits,
453 }
454 }
455 #[allow(missing_docs)]
456 #[doc(hidden)]
457 #[inline]
458 pub fn _from(value: u8) -> TCCMODER {
459 match value {
460 0 => TCCMODER::DISABLED,
461 1 => TCCMODER::LFA,
462 2 => TCCMODER::PRS,
463 i => TCCMODER::_Reserved(i),
464 }
465 }
466 #[doc = "Checks if the value of the field is `DISABLED`"]
467 #[inline]
468 pub fn is_disabled(&self) -> bool {
469 *self == TCCMODER::DISABLED
470 }
471 #[doc = "Checks if the value of the field is `LFA`"]
472 #[inline]
473 pub fn is_lfa(&self) -> bool {
474 *self == TCCMODER::LFA
475 }
476 #[doc = "Checks if the value of the field is `PRS`"]
477 #[inline]
478 pub fn is_prs(&self) -> bool {
479 *self == TCCMODER::PRS
480 }
481}
482#[doc = "Possible values of the field `TCCPRESC`"]
483#[derive(Clone, Copy, Debug, PartialEq)]
484pub enum TCCPRESCR {
485 #[doc = "Compare and clear event each LFA cycle."]
486 DIV1,
487 #[doc = "Compare and clear performed on every other LFA cycle."]
488 DIV2,
489 #[doc = "Compare and clear performed on every 4th LFA cycle."]
490 DIV4,
491 #[doc = "Compare and clear performed on every 8th LFA cycle."]
492 DIV8,
493}
494impl TCCPRESCR {
495 #[doc = r" Value of the field as raw bits"]
496 #[inline]
497 pub fn bits(&self) -> u8 {
498 match *self {
499 TCCPRESCR::DIV1 => 0,
500 TCCPRESCR::DIV2 => 1,
501 TCCPRESCR::DIV4 => 2,
502 TCCPRESCR::DIV8 => 3,
503 }
504 }
505 #[allow(missing_docs)]
506 #[doc(hidden)]
507 #[inline]
508 pub fn _from(value: u8) -> TCCPRESCR {
509 match value {
510 0 => TCCPRESCR::DIV1,
511 1 => TCCPRESCR::DIV2,
512 2 => TCCPRESCR::DIV4,
513 3 => TCCPRESCR::DIV8,
514 _ => unreachable!(),
515 }
516 }
517 #[doc = "Checks if the value of the field is `DIV1`"]
518 #[inline]
519 pub fn is_div1(&self) -> bool {
520 *self == TCCPRESCR::DIV1
521 }
522 #[doc = "Checks if the value of the field is `DIV2`"]
523 #[inline]
524 pub fn is_div2(&self) -> bool {
525 *self == TCCPRESCR::DIV2
526 }
527 #[doc = "Checks if the value of the field is `DIV4`"]
528 #[inline]
529 pub fn is_div4(&self) -> bool {
530 *self == TCCPRESCR::DIV4
531 }
532 #[doc = "Checks if the value of the field is `DIV8`"]
533 #[inline]
534 pub fn is_div8(&self) -> bool {
535 *self == TCCPRESCR::DIV8
536 }
537}
538#[doc = "Possible values of the field `TCCCOMP`"]
539#[derive(Clone, Copy, Debug, PartialEq)]
540pub enum TCCCOMPR {
541 #[doc = "Compare match if PCNT_CNT is less than, or equal to PCNT_TOP."]
542 LTOE,
543 #[doc = "Compare match if PCNT_CNT is greater than or equal to PCNT_TOP."]
544 GTOE,
545 #[doc = "Compare match if PCNT_CNT is less than, or equal to PCNT_TOP\\[15:8\\]\\], and greater than, or equal to PCNT_TOP\\[7:0\\]."]
546 RANGE,
547 #[doc = r" Reserved"]
548 _Reserved(u8),
549}
550impl TCCCOMPR {
551 #[doc = r" Value of the field as raw bits"]
552 #[inline]
553 pub fn bits(&self) -> u8 {
554 match *self {
555 TCCCOMPR::LTOE => 0,
556 TCCCOMPR::GTOE => 1,
557 TCCCOMPR::RANGE => 2,
558 TCCCOMPR::_Reserved(bits) => bits,
559 }
560 }
561 #[allow(missing_docs)]
562 #[doc(hidden)]
563 #[inline]
564 pub fn _from(value: u8) -> TCCCOMPR {
565 match value {
566 0 => TCCCOMPR::LTOE,
567 1 => TCCCOMPR::GTOE,
568 2 => TCCCOMPR::RANGE,
569 i => TCCCOMPR::_Reserved(i),
570 }
571 }
572 #[doc = "Checks if the value of the field is `LTOE`"]
573 #[inline]
574 pub fn is_ltoe(&self) -> bool {
575 *self == TCCCOMPR::LTOE
576 }
577 #[doc = "Checks if the value of the field is `GTOE`"]
578 #[inline]
579 pub fn is_gtoe(&self) -> bool {
580 *self == TCCCOMPR::GTOE
581 }
582 #[doc = "Checks if the value of the field is `RANGE`"]
583 #[inline]
584 pub fn is_range(&self) -> bool {
585 *self == TCCCOMPR::RANGE
586 }
587}
588#[doc = r" Value of the field"]
589pub struct PRSGATEENR {
590 bits: bool,
591}
592impl PRSGATEENR {
593 #[doc = r" Value of the field as raw bits"]
594 #[inline]
595 pub fn bit(&self) -> bool {
596 self.bits
597 }
598 #[doc = r" Returns `true` if the bit is clear (0)"]
599 #[inline]
600 pub fn bit_is_clear(&self) -> bool {
601 !self.bit()
602 }
603 #[doc = r" Returns `true` if the bit is set (1)"]
604 #[inline]
605 pub fn bit_is_set(&self) -> bool {
606 self.bit()
607 }
608}
609#[doc = r" Value of the field"]
610pub struct TCCPRSPOLR {
611 bits: bool,
612}
613impl TCCPRSPOLR {
614 #[doc = r" Value of the field as raw bits"]
615 #[inline]
616 pub fn bit(&self) -> bool {
617 self.bits
618 }
619 #[doc = r" Returns `true` if the bit is clear (0)"]
620 #[inline]
621 pub fn bit_is_clear(&self) -> bool {
622 !self.bit()
623 }
624 #[doc = r" Returns `true` if the bit is set (1)"]
625 #[inline]
626 pub fn bit_is_set(&self) -> bool {
627 self.bit()
628 }
629}
630#[doc = "Possible values of the field `TCCPRSSEL`"]
631#[derive(Clone, Copy, Debug, PartialEq)]
632pub enum TCCPRSSELR {
633 #[doc = "PRS Channel 0 selected."]
634 PRSCH0,
635 #[doc = "PRS Channel 1 selected."]
636 PRSCH1,
637 #[doc = "PRS Channel 2 selected."]
638 PRSCH2,
639 #[doc = "PRS Channel 3 selected."]
640 PRSCH3,
641 #[doc = "PRS Channel 4 selected."]
642 PRSCH4,
643 #[doc = "PRS Channel 5 selected."]
644 PRSCH5,
645 #[doc = "PRS Channel 6 selected."]
646 PRSCH6,
647 #[doc = "PRS Channel 7 selected."]
648 PRSCH7,
649 #[doc = "PRS Channel 8 selected."]
650 PRSCH8,
651 #[doc = "PRS Channel 9 selected."]
652 PRSCH9,
653 #[doc = "PRS Channel 10 selected."]
654 PRSCH10,
655 #[doc = "PRS Channel 11 selected."]
656 PRSCH11,
657 #[doc = r" Reserved"]
658 _Reserved(u8),
659}
660impl TCCPRSSELR {
661 #[doc = r" Value of the field as raw bits"]
662 #[inline]
663 pub fn bits(&self) -> u8 {
664 match *self {
665 TCCPRSSELR::PRSCH0 => 0,
666 TCCPRSSELR::PRSCH1 => 1,
667 TCCPRSSELR::PRSCH2 => 2,
668 TCCPRSSELR::PRSCH3 => 3,
669 TCCPRSSELR::PRSCH4 => 4,
670 TCCPRSSELR::PRSCH5 => 5,
671 TCCPRSSELR::PRSCH6 => 6,
672 TCCPRSSELR::PRSCH7 => 7,
673 TCCPRSSELR::PRSCH8 => 8,
674 TCCPRSSELR::PRSCH9 => 9,
675 TCCPRSSELR::PRSCH10 => 10,
676 TCCPRSSELR::PRSCH11 => 11,
677 TCCPRSSELR::_Reserved(bits) => bits,
678 }
679 }
680 #[allow(missing_docs)]
681 #[doc(hidden)]
682 #[inline]
683 pub fn _from(value: u8) -> TCCPRSSELR {
684 match value {
685 0 => TCCPRSSELR::PRSCH0,
686 1 => TCCPRSSELR::PRSCH1,
687 2 => TCCPRSSELR::PRSCH2,
688 3 => TCCPRSSELR::PRSCH3,
689 4 => TCCPRSSELR::PRSCH4,
690 5 => TCCPRSSELR::PRSCH5,
691 6 => TCCPRSSELR::PRSCH6,
692 7 => TCCPRSSELR::PRSCH7,
693 8 => TCCPRSSELR::PRSCH8,
694 9 => TCCPRSSELR::PRSCH9,
695 10 => TCCPRSSELR::PRSCH10,
696 11 => TCCPRSSELR::PRSCH11,
697 i => TCCPRSSELR::_Reserved(i),
698 }
699 }
700 #[doc = "Checks if the value of the field is `PRSCH0`"]
701 #[inline]
702 pub fn is_prsch0(&self) -> bool {
703 *self == TCCPRSSELR::PRSCH0
704 }
705 #[doc = "Checks if the value of the field is `PRSCH1`"]
706 #[inline]
707 pub fn is_prsch1(&self) -> bool {
708 *self == TCCPRSSELR::PRSCH1
709 }
710 #[doc = "Checks if the value of the field is `PRSCH2`"]
711 #[inline]
712 pub fn is_prsch2(&self) -> bool {
713 *self == TCCPRSSELR::PRSCH2
714 }
715 #[doc = "Checks if the value of the field is `PRSCH3`"]
716 #[inline]
717 pub fn is_prsch3(&self) -> bool {
718 *self == TCCPRSSELR::PRSCH3
719 }
720 #[doc = "Checks if the value of the field is `PRSCH4`"]
721 #[inline]
722 pub fn is_prsch4(&self) -> bool {
723 *self == TCCPRSSELR::PRSCH4
724 }
725 #[doc = "Checks if the value of the field is `PRSCH5`"]
726 #[inline]
727 pub fn is_prsch5(&self) -> bool {
728 *self == TCCPRSSELR::PRSCH5
729 }
730 #[doc = "Checks if the value of the field is `PRSCH6`"]
731 #[inline]
732 pub fn is_prsch6(&self) -> bool {
733 *self == TCCPRSSELR::PRSCH6
734 }
735 #[doc = "Checks if the value of the field is `PRSCH7`"]
736 #[inline]
737 pub fn is_prsch7(&self) -> bool {
738 *self == TCCPRSSELR::PRSCH7
739 }
740 #[doc = "Checks if the value of the field is `PRSCH8`"]
741 #[inline]
742 pub fn is_prsch8(&self) -> bool {
743 *self == TCCPRSSELR::PRSCH8
744 }
745 #[doc = "Checks if the value of the field is `PRSCH9`"]
746 #[inline]
747 pub fn is_prsch9(&self) -> bool {
748 *self == TCCPRSSELR::PRSCH9
749 }
750 #[doc = "Checks if the value of the field is `PRSCH10`"]
751 #[inline]
752 pub fn is_prsch10(&self) -> bool {
753 *self == TCCPRSSELR::PRSCH10
754 }
755 #[doc = "Checks if the value of the field is `PRSCH11`"]
756 #[inline]
757 pub fn is_prsch11(&self) -> bool {
758 *self == TCCPRSSELR::PRSCH11
759 }
760}
761#[doc = r" Value of the field"]
762pub struct TOPBHFSELR {
763 bits: bool,
764}
765impl TOPBHFSELR {
766 #[doc = r" Value of the field as raw bits"]
767 #[inline]
768 pub fn bit(&self) -> bool {
769 self.bits
770 }
771 #[doc = r" Returns `true` if the bit is clear (0)"]
772 #[inline]
773 pub fn bit_is_clear(&self) -> bool {
774 !self.bit()
775 }
776 #[doc = r" Returns `true` if the bit is set (1)"]
777 #[inline]
778 pub fn bit_is_set(&self) -> bool {
779 self.bit()
780 }
781}
782#[doc = "Values that can be written to the field `MODE`"]
783pub enum MODEW {
784 #[doc = "The module is disabled."]
785 DISABLE,
786 #[doc = "Single input LFACLK oversampling mode (available in EM0-EM3)."]
787 OVSSINGLE,
788 #[doc = "Externally clocked single input counter mode (available in EM0-EM3)."]
789 EXTCLKSINGLE,
790 #[doc = "Externally clocked quadrature decoder mode (available in EM0-EM3)."]
791 EXTCLKQUAD,
792 #[doc = "LFACLK oversampling quadrature decoder 1X mode (available in EM0-EM3)."]
793 OVSQUAD1X,
794 #[doc = "LFACLK oversampling quadrature decoder 2X mode (available in EM0-EM3)."]
795 OVSQUAD2X,
796 #[doc = "LFACLK oversampling quadrature decoder 4X mode (available in EM0-EM3)."]
797 OVSQUAD4X,
798}
799impl MODEW {
800 #[allow(missing_docs)]
801 #[doc(hidden)]
802 #[inline]
803 pub fn _bits(&self) -> u8 {
804 match *self {
805 MODEW::DISABLE => 0,
806 MODEW::OVSSINGLE => 1,
807 MODEW::EXTCLKSINGLE => 2,
808 MODEW::EXTCLKQUAD => 3,
809 MODEW::OVSQUAD1X => 4,
810 MODEW::OVSQUAD2X => 5,
811 MODEW::OVSQUAD4X => 6,
812 }
813 }
814}
815#[doc = r" Proxy"]
816pub struct _MODEW<'a> {
817 w: &'a mut W,
818}
819impl<'a> _MODEW<'a> {
820 #[doc = r" Writes `variant` to the field"]
821 #[inline]
822 pub fn variant(self, variant: MODEW) -> &'a mut W {
823 unsafe { self.bits(variant._bits()) }
824 }
825 #[doc = "The module is disabled."]
826 #[inline]
827 pub fn disable(self) -> &'a mut W {
828 self.variant(MODEW::DISABLE)
829 }
830 #[doc = "Single input LFACLK oversampling mode (available in EM0-EM3)."]
831 #[inline]
832 pub fn ovssingle(self) -> &'a mut W {
833 self.variant(MODEW::OVSSINGLE)
834 }
835 #[doc = "Externally clocked single input counter mode (available in EM0-EM3)."]
836 #[inline]
837 pub fn extclksingle(self) -> &'a mut W {
838 self.variant(MODEW::EXTCLKSINGLE)
839 }
840 #[doc = "Externally clocked quadrature decoder mode (available in EM0-EM3)."]
841 #[inline]
842 pub fn extclkquad(self) -> &'a mut W {
843 self.variant(MODEW::EXTCLKQUAD)
844 }
845 #[doc = "LFACLK oversampling quadrature decoder 1X mode (available in EM0-EM3)."]
846 #[inline]
847 pub fn ovsquad1x(self) -> &'a mut W {
848 self.variant(MODEW::OVSQUAD1X)
849 }
850 #[doc = "LFACLK oversampling quadrature decoder 2X mode (available in EM0-EM3)."]
851 #[inline]
852 pub fn ovsquad2x(self) -> &'a mut W {
853 self.variant(MODEW::OVSQUAD2X)
854 }
855 #[doc = "LFACLK oversampling quadrature decoder 4X mode (available in EM0-EM3)."]
856 #[inline]
857 pub fn ovsquad4x(self) -> &'a mut W {
858 self.variant(MODEW::OVSQUAD4X)
859 }
860 #[doc = r" Writes raw bits to the field"]
861 #[inline]
862 pub unsafe fn bits(self, value: u8) -> &'a mut W {
863 const MASK: u8 = 7;
864 const OFFSET: u8 = 0;
865 self.w.bits &= !((MASK as u32) << OFFSET);
866 self.w.bits |= ((value & MASK) as u32) << OFFSET;
867 self.w
868 }
869}
870#[doc = r" Proxy"]
871pub struct _FILTW<'a> {
872 w: &'a mut W,
873}
874impl<'a> _FILTW<'a> {
875 #[doc = r" Sets the field bit"]
876 pub fn set_bit(self) -> &'a mut W {
877 self.bit(true)
878 }
879 #[doc = r" Clears the field bit"]
880 pub fn clear_bit(self) -> &'a mut W {
881 self.bit(false)
882 }
883 #[doc = r" Writes raw bits to the field"]
884 #[inline]
885 pub fn bit(self, value: bool) -> &'a mut W {
886 const MASK: bool = true;
887 const OFFSET: u8 = 3;
888 self.w.bits &= !((MASK as u32) << OFFSET);
889 self.w.bits |= ((value & MASK) as u32) << OFFSET;
890 self.w
891 }
892}
893#[doc = r" Proxy"]
894pub struct _RSTENW<'a> {
895 w: &'a mut W,
896}
897impl<'a> _RSTENW<'a> {
898 #[doc = r" Sets the field bit"]
899 pub fn set_bit(self) -> &'a mut W {
900 self.bit(true)
901 }
902 #[doc = r" Clears the field bit"]
903 pub fn clear_bit(self) -> &'a mut W {
904 self.bit(false)
905 }
906 #[doc = r" Writes raw bits to the field"]
907 #[inline]
908 pub fn bit(self, value: bool) -> &'a mut W {
909 const MASK: bool = true;
910 const OFFSET: u8 = 4;
911 self.w.bits &= !((MASK as u32) << OFFSET);
912 self.w.bits |= ((value & MASK) as u32) << OFFSET;
913 self.w
914 }
915}
916#[doc = r" Proxy"]
917pub struct _CNTRSTENW<'a> {
918 w: &'a mut W,
919}
920impl<'a> _CNTRSTENW<'a> {
921 #[doc = r" Sets the field bit"]
922 pub fn set_bit(self) -> &'a mut W {
923 self.bit(true)
924 }
925 #[doc = r" Clears the field bit"]
926 pub fn clear_bit(self) -> &'a mut W {
927 self.bit(false)
928 }
929 #[doc = r" Writes raw bits to the field"]
930 #[inline]
931 pub fn bit(self, value: bool) -> &'a mut W {
932 const MASK: bool = true;
933 const OFFSET: u8 = 5;
934 self.w.bits &= !((MASK as u32) << OFFSET);
935 self.w.bits |= ((value & MASK) as u32) << OFFSET;
936 self.w
937 }
938}
939#[doc = r" Proxy"]
940pub struct _AUXCNTRSTENW<'a> {
941 w: &'a mut W,
942}
943impl<'a> _AUXCNTRSTENW<'a> {
944 #[doc = r" Sets the field bit"]
945 pub fn set_bit(self) -> &'a mut W {
946 self.bit(true)
947 }
948 #[doc = r" Clears the field bit"]
949 pub fn clear_bit(self) -> &'a mut W {
950 self.bit(false)
951 }
952 #[doc = r" Writes raw bits to the field"]
953 #[inline]
954 pub fn bit(self, value: bool) -> &'a mut W {
955 const MASK: bool = true;
956 const OFFSET: u8 = 6;
957 self.w.bits &= !((MASK as u32) << OFFSET);
958 self.w.bits |= ((value & MASK) as u32) << OFFSET;
959 self.w
960 }
961}
962#[doc = r" Proxy"]
963pub struct _DEBUGHALTW<'a> {
964 w: &'a mut W,
965}
966impl<'a> _DEBUGHALTW<'a> {
967 #[doc = r" Sets the field bit"]
968 pub fn set_bit(self) -> &'a mut W {
969 self.bit(true)
970 }
971 #[doc = r" Clears the field bit"]
972 pub fn clear_bit(self) -> &'a mut W {
973 self.bit(false)
974 }
975 #[doc = r" Writes raw bits to the field"]
976 #[inline]
977 pub fn bit(self, value: bool) -> &'a mut W {
978 const MASK: bool = true;
979 const OFFSET: u8 = 7;
980 self.w.bits &= !((MASK as u32) << OFFSET);
981 self.w.bits |= ((value & MASK) as u32) << OFFSET;
982 self.w
983 }
984}
985#[doc = r" Proxy"]
986pub struct _HYSTW<'a> {
987 w: &'a mut W,
988}
989impl<'a> _HYSTW<'a> {
990 #[doc = r" Sets the field bit"]
991 pub fn set_bit(self) -> &'a mut W {
992 self.bit(true)
993 }
994 #[doc = r" Clears the field bit"]
995 pub fn clear_bit(self) -> &'a mut W {
996 self.bit(false)
997 }
998 #[doc = r" Writes raw bits to the field"]
999 #[inline]
1000 pub fn bit(self, value: bool) -> &'a mut W {
1001 const MASK: bool = true;
1002 const OFFSET: u8 = 8;
1003 self.w.bits &= !((MASK as u32) << OFFSET);
1004 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1005 self.w
1006 }
1007}
1008#[doc = r" Proxy"]
1009pub struct _S1CDIRW<'a> {
1010 w: &'a mut W,
1011}
1012impl<'a> _S1CDIRW<'a> {
1013 #[doc = r" Sets the field bit"]
1014 pub fn set_bit(self) -> &'a mut W {
1015 self.bit(true)
1016 }
1017 #[doc = r" Clears the field bit"]
1018 pub fn clear_bit(self) -> &'a mut W {
1019 self.bit(false)
1020 }
1021 #[doc = r" Writes raw bits to the field"]
1022 #[inline]
1023 pub fn bit(self, value: bool) -> &'a mut W {
1024 const MASK: bool = true;
1025 const OFFSET: u8 = 9;
1026 self.w.bits &= !((MASK as u32) << OFFSET);
1027 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1028 self.w
1029 }
1030}
1031#[doc = "Values that can be written to the field `CNTEV`"]
1032pub enum CNTEVW {
1033 #[doc = "Counts up on up-count and down on down-count events."]
1034 BOTH,
1035 #[doc = "Only counts up on up-count events."]
1036 UP,
1037 #[doc = "Only counts down on down-count events."]
1038 DOWN,
1039 #[doc = "Never counts."]
1040 NONE,
1041}
1042impl CNTEVW {
1043 #[allow(missing_docs)]
1044 #[doc(hidden)]
1045 #[inline]
1046 pub fn _bits(&self) -> u8 {
1047 match *self {
1048 CNTEVW::BOTH => 0,
1049 CNTEVW::UP => 1,
1050 CNTEVW::DOWN => 2,
1051 CNTEVW::NONE => 3,
1052 }
1053 }
1054}
1055#[doc = r" Proxy"]
1056pub struct _CNTEVW<'a> {
1057 w: &'a mut W,
1058}
1059impl<'a> _CNTEVW<'a> {
1060 #[doc = r" Writes `variant` to the field"]
1061 #[inline]
1062 pub fn variant(self, variant: CNTEVW) -> &'a mut W {
1063 {
1064 self.bits(variant._bits())
1065 }
1066 }
1067 #[doc = "Counts up on up-count and down on down-count events."]
1068 #[inline]
1069 pub fn both(self) -> &'a mut W {
1070 self.variant(CNTEVW::BOTH)
1071 }
1072 #[doc = "Only counts up on up-count events."]
1073 #[inline]
1074 pub fn up(self) -> &'a mut W {
1075 self.variant(CNTEVW::UP)
1076 }
1077 #[doc = "Only counts down on down-count events."]
1078 #[inline]
1079 pub fn down(self) -> &'a mut W {
1080 self.variant(CNTEVW::DOWN)
1081 }
1082 #[doc = "Never counts."]
1083 #[inline]
1084 pub fn none(self) -> &'a mut W {
1085 self.variant(CNTEVW::NONE)
1086 }
1087 #[doc = r" Writes raw bits to the field"]
1088 #[inline]
1089 pub fn bits(self, value: u8) -> &'a mut W {
1090 const MASK: u8 = 3;
1091 const OFFSET: u8 = 10;
1092 self.w.bits &= !((MASK as u32) << OFFSET);
1093 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1094 self.w
1095 }
1096}
1097#[doc = "Values that can be written to the field `AUXCNTEV`"]
1098pub enum AUXCNTEVW {
1099 #[doc = "Never counts."]
1100 NONE,
1101 #[doc = "Counts up on up-count events."]
1102 UP,
1103 #[doc = "Counts up on down-count events."]
1104 DOWN,
1105 #[doc = "Counts up on both up-count and down-count events."]
1106 BOTH,
1107}
1108impl AUXCNTEVW {
1109 #[allow(missing_docs)]
1110 #[doc(hidden)]
1111 #[inline]
1112 pub fn _bits(&self) -> u8 {
1113 match *self {
1114 AUXCNTEVW::NONE => 0,
1115 AUXCNTEVW::UP => 1,
1116 AUXCNTEVW::DOWN => 2,
1117 AUXCNTEVW::BOTH => 3,
1118 }
1119 }
1120}
1121#[doc = r" Proxy"]
1122pub struct _AUXCNTEVW<'a> {
1123 w: &'a mut W,
1124}
1125impl<'a> _AUXCNTEVW<'a> {
1126 #[doc = r" Writes `variant` to the field"]
1127 #[inline]
1128 pub fn variant(self, variant: AUXCNTEVW) -> &'a mut W {
1129 {
1130 self.bits(variant._bits())
1131 }
1132 }
1133 #[doc = "Never counts."]
1134 #[inline]
1135 pub fn none(self) -> &'a mut W {
1136 self.variant(AUXCNTEVW::NONE)
1137 }
1138 #[doc = "Counts up on up-count events."]
1139 #[inline]
1140 pub fn up(self) -> &'a mut W {
1141 self.variant(AUXCNTEVW::UP)
1142 }
1143 #[doc = "Counts up on down-count events."]
1144 #[inline]
1145 pub fn down(self) -> &'a mut W {
1146 self.variant(AUXCNTEVW::DOWN)
1147 }
1148 #[doc = "Counts up on both up-count and down-count events."]
1149 #[inline]
1150 pub fn both(self) -> &'a mut W {
1151 self.variant(AUXCNTEVW::BOTH)
1152 }
1153 #[doc = r" Writes raw bits to the field"]
1154 #[inline]
1155 pub fn bits(self, value: u8) -> &'a mut W {
1156 const MASK: u8 = 3;
1157 const OFFSET: u8 = 12;
1158 self.w.bits &= !((MASK as u32) << OFFSET);
1159 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1160 self.w
1161 }
1162}
1163#[doc = r" Proxy"]
1164pub struct _CNTDIRW<'a> {
1165 w: &'a mut W,
1166}
1167impl<'a> _CNTDIRW<'a> {
1168 #[doc = r" Sets the field bit"]
1169 pub fn set_bit(self) -> &'a mut W {
1170 self.bit(true)
1171 }
1172 #[doc = r" Clears the field bit"]
1173 pub fn clear_bit(self) -> &'a mut W {
1174 self.bit(false)
1175 }
1176 #[doc = r" Writes raw bits to the field"]
1177 #[inline]
1178 pub fn bit(self, value: bool) -> &'a mut W {
1179 const MASK: bool = true;
1180 const OFFSET: u8 = 14;
1181 self.w.bits &= !((MASK as u32) << OFFSET);
1182 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1183 self.w
1184 }
1185}
1186#[doc = r" Proxy"]
1187pub struct _EDGEW<'a> {
1188 w: &'a mut W,
1189}
1190impl<'a> _EDGEW<'a> {
1191 #[doc = r" Sets the field bit"]
1192 pub fn set_bit(self) -> &'a mut W {
1193 self.bit(true)
1194 }
1195 #[doc = r" Clears the field bit"]
1196 pub fn clear_bit(self) -> &'a mut W {
1197 self.bit(false)
1198 }
1199 #[doc = r" Writes raw bits to the field"]
1200 #[inline]
1201 pub fn bit(self, value: bool) -> &'a mut W {
1202 const MASK: bool = true;
1203 const OFFSET: u8 = 15;
1204 self.w.bits &= !((MASK as u32) << OFFSET);
1205 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1206 self.w
1207 }
1208}
1209#[doc = "Values that can be written to the field `TCCMODE`"]
1210pub enum TCCMODEW {
1211 #[doc = "Triggered compare and clear not enabled."]
1212 DISABLED,
1213 #[doc = "Compare and clear performed on each (optionally prescaled) LFA clock cycle."]
1214 LFA,
1215 #[doc = "Compare and clear performed on positive PRS edges."]
1216 PRS,
1217}
1218impl TCCMODEW {
1219 #[allow(missing_docs)]
1220 #[doc(hidden)]
1221 #[inline]
1222 pub fn _bits(&self) -> u8 {
1223 match *self {
1224 TCCMODEW::DISABLED => 0,
1225 TCCMODEW::LFA => 1,
1226 TCCMODEW::PRS => 2,
1227 }
1228 }
1229}
1230#[doc = r" Proxy"]
1231pub struct _TCCMODEW<'a> {
1232 w: &'a mut W,
1233}
1234impl<'a> _TCCMODEW<'a> {
1235 #[doc = r" Writes `variant` to the field"]
1236 #[inline]
1237 pub fn variant(self, variant: TCCMODEW) -> &'a mut W {
1238 unsafe { self.bits(variant._bits()) }
1239 }
1240 #[doc = "Triggered compare and clear not enabled."]
1241 #[inline]
1242 pub fn disabled(self) -> &'a mut W {
1243 self.variant(TCCMODEW::DISABLED)
1244 }
1245 #[doc = "Compare and clear performed on each (optionally prescaled) LFA clock cycle."]
1246 #[inline]
1247 pub fn lfa(self) -> &'a mut W {
1248 self.variant(TCCMODEW::LFA)
1249 }
1250 #[doc = "Compare and clear performed on positive PRS edges."]
1251 #[inline]
1252 pub fn prs(self) -> &'a mut W {
1253 self.variant(TCCMODEW::PRS)
1254 }
1255 #[doc = r" Writes raw bits to the field"]
1256 #[inline]
1257 pub unsafe fn bits(self, value: u8) -> &'a mut W {
1258 const MASK: u8 = 3;
1259 const OFFSET: u8 = 16;
1260 self.w.bits &= !((MASK as u32) << OFFSET);
1261 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1262 self.w
1263 }
1264}
1265#[doc = "Values that can be written to the field `TCCPRESC`"]
1266pub enum TCCPRESCW {
1267 #[doc = "Compare and clear event each LFA cycle."]
1268 DIV1,
1269 #[doc = "Compare and clear performed on every other LFA cycle."]
1270 DIV2,
1271 #[doc = "Compare and clear performed on every 4th LFA cycle."]
1272 DIV4,
1273 #[doc = "Compare and clear performed on every 8th LFA cycle."]
1274 DIV8,
1275}
1276impl TCCPRESCW {
1277 #[allow(missing_docs)]
1278 #[doc(hidden)]
1279 #[inline]
1280 pub fn _bits(&self) -> u8 {
1281 match *self {
1282 TCCPRESCW::DIV1 => 0,
1283 TCCPRESCW::DIV2 => 1,
1284 TCCPRESCW::DIV4 => 2,
1285 TCCPRESCW::DIV8 => 3,
1286 }
1287 }
1288}
1289#[doc = r" Proxy"]
1290pub struct _TCCPRESCW<'a> {
1291 w: &'a mut W,
1292}
1293impl<'a> _TCCPRESCW<'a> {
1294 #[doc = r" Writes `variant` to the field"]
1295 #[inline]
1296 pub fn variant(self, variant: TCCPRESCW) -> &'a mut W {
1297 {
1298 self.bits(variant._bits())
1299 }
1300 }
1301 #[doc = "Compare and clear event each LFA cycle."]
1302 #[inline]
1303 pub fn div1(self) -> &'a mut W {
1304 self.variant(TCCPRESCW::DIV1)
1305 }
1306 #[doc = "Compare and clear performed on every other LFA cycle."]
1307 #[inline]
1308 pub fn div2(self) -> &'a mut W {
1309 self.variant(TCCPRESCW::DIV2)
1310 }
1311 #[doc = "Compare and clear performed on every 4th LFA cycle."]
1312 #[inline]
1313 pub fn div4(self) -> &'a mut W {
1314 self.variant(TCCPRESCW::DIV4)
1315 }
1316 #[doc = "Compare and clear performed on every 8th LFA cycle."]
1317 #[inline]
1318 pub fn div8(self) -> &'a mut W {
1319 self.variant(TCCPRESCW::DIV8)
1320 }
1321 #[doc = r" Writes raw bits to the field"]
1322 #[inline]
1323 pub fn bits(self, value: u8) -> &'a mut W {
1324 const MASK: u8 = 3;
1325 const OFFSET: u8 = 19;
1326 self.w.bits &= !((MASK as u32) << OFFSET);
1327 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1328 self.w
1329 }
1330}
1331#[doc = "Values that can be written to the field `TCCCOMP`"]
1332pub enum TCCCOMPW {
1333 #[doc = "Compare match if PCNT_CNT is less than, or equal to PCNT_TOP."]
1334 LTOE,
1335 #[doc = "Compare match if PCNT_CNT is greater than or equal to PCNT_TOP."]
1336 GTOE,
1337 #[doc = "Compare match if PCNT_CNT is less than, or equal to PCNT_TOP\\[15:8\\]\\], and greater than, or equal to PCNT_TOP\\[7:0\\]."]
1338 RANGE,
1339}
1340impl TCCCOMPW {
1341 #[allow(missing_docs)]
1342 #[doc(hidden)]
1343 #[inline]
1344 pub fn _bits(&self) -> u8 {
1345 match *self {
1346 TCCCOMPW::LTOE => 0,
1347 TCCCOMPW::GTOE => 1,
1348 TCCCOMPW::RANGE => 2,
1349 }
1350 }
1351}
1352#[doc = r" Proxy"]
1353pub struct _TCCCOMPW<'a> {
1354 w: &'a mut W,
1355}
1356impl<'a> _TCCCOMPW<'a> {
1357 #[doc = r" Writes `variant` to the field"]
1358 #[inline]
1359 pub fn variant(self, variant: TCCCOMPW) -> &'a mut W {
1360 unsafe { self.bits(variant._bits()) }
1361 }
1362 #[doc = "Compare match if PCNT_CNT is less than, or equal to PCNT_TOP."]
1363 #[inline]
1364 pub fn ltoe(self) -> &'a mut W {
1365 self.variant(TCCCOMPW::LTOE)
1366 }
1367 #[doc = "Compare match if PCNT_CNT is greater than or equal to PCNT_TOP."]
1368 #[inline]
1369 pub fn gtoe(self) -> &'a mut W {
1370 self.variant(TCCCOMPW::GTOE)
1371 }
1372 #[doc = "Compare match if PCNT_CNT is less than, or equal to PCNT_TOP\\[15:8\\]\\], and greater than, or equal to PCNT_TOP\\[7:0\\]."]
1373 #[inline]
1374 pub fn range(self) -> &'a mut W {
1375 self.variant(TCCCOMPW::RANGE)
1376 }
1377 #[doc = r" Writes raw bits to the field"]
1378 #[inline]
1379 pub unsafe fn bits(self, value: u8) -> &'a mut W {
1380 const MASK: u8 = 3;
1381 const OFFSET: u8 = 22;
1382 self.w.bits &= !((MASK as u32) << OFFSET);
1383 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1384 self.w
1385 }
1386}
1387#[doc = r" Proxy"]
1388pub struct _PRSGATEENW<'a> {
1389 w: &'a mut W,
1390}
1391impl<'a> _PRSGATEENW<'a> {
1392 #[doc = r" Sets the field bit"]
1393 pub fn set_bit(self) -> &'a mut W {
1394 self.bit(true)
1395 }
1396 #[doc = r" Clears the field bit"]
1397 pub fn clear_bit(self) -> &'a mut W {
1398 self.bit(false)
1399 }
1400 #[doc = r" Writes raw bits to the field"]
1401 #[inline]
1402 pub fn bit(self, value: bool) -> &'a mut W {
1403 const MASK: bool = true;
1404 const OFFSET: u8 = 24;
1405 self.w.bits &= !((MASK as u32) << OFFSET);
1406 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1407 self.w
1408 }
1409}
1410#[doc = r" Proxy"]
1411pub struct _TCCPRSPOLW<'a> {
1412 w: &'a mut W,
1413}
1414impl<'a> _TCCPRSPOLW<'a> {
1415 #[doc = r" Sets the field bit"]
1416 pub fn set_bit(self) -> &'a mut W {
1417 self.bit(true)
1418 }
1419 #[doc = r" Clears the field bit"]
1420 pub fn clear_bit(self) -> &'a mut W {
1421 self.bit(false)
1422 }
1423 #[doc = r" Writes raw bits to the field"]
1424 #[inline]
1425 pub fn bit(self, value: bool) -> &'a mut W {
1426 const MASK: bool = true;
1427 const OFFSET: u8 = 25;
1428 self.w.bits &= !((MASK as u32) << OFFSET);
1429 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1430 self.w
1431 }
1432}
1433#[doc = "Values that can be written to the field `TCCPRSSEL`"]
1434pub enum TCCPRSSELW {
1435 #[doc = "PRS Channel 0 selected."]
1436 PRSCH0,
1437 #[doc = "PRS Channel 1 selected."]
1438 PRSCH1,
1439 #[doc = "PRS Channel 2 selected."]
1440 PRSCH2,
1441 #[doc = "PRS Channel 3 selected."]
1442 PRSCH3,
1443 #[doc = "PRS Channel 4 selected."]
1444 PRSCH4,
1445 #[doc = "PRS Channel 5 selected."]
1446 PRSCH5,
1447 #[doc = "PRS Channel 6 selected."]
1448 PRSCH6,
1449 #[doc = "PRS Channel 7 selected."]
1450 PRSCH7,
1451 #[doc = "PRS Channel 8 selected."]
1452 PRSCH8,
1453 #[doc = "PRS Channel 9 selected."]
1454 PRSCH9,
1455 #[doc = "PRS Channel 10 selected."]
1456 PRSCH10,
1457 #[doc = "PRS Channel 11 selected."]
1458 PRSCH11,
1459}
1460impl TCCPRSSELW {
1461 #[allow(missing_docs)]
1462 #[doc(hidden)]
1463 #[inline]
1464 pub fn _bits(&self) -> u8 {
1465 match *self {
1466 TCCPRSSELW::PRSCH0 => 0,
1467 TCCPRSSELW::PRSCH1 => 1,
1468 TCCPRSSELW::PRSCH2 => 2,
1469 TCCPRSSELW::PRSCH3 => 3,
1470 TCCPRSSELW::PRSCH4 => 4,
1471 TCCPRSSELW::PRSCH5 => 5,
1472 TCCPRSSELW::PRSCH6 => 6,
1473 TCCPRSSELW::PRSCH7 => 7,
1474 TCCPRSSELW::PRSCH8 => 8,
1475 TCCPRSSELW::PRSCH9 => 9,
1476 TCCPRSSELW::PRSCH10 => 10,
1477 TCCPRSSELW::PRSCH11 => 11,
1478 }
1479 }
1480}
1481#[doc = r" Proxy"]
1482pub struct _TCCPRSSELW<'a> {
1483 w: &'a mut W,
1484}
1485impl<'a> _TCCPRSSELW<'a> {
1486 #[doc = r" Writes `variant` to the field"]
1487 #[inline]
1488 pub fn variant(self, variant: TCCPRSSELW) -> &'a mut W {
1489 unsafe { self.bits(variant._bits()) }
1490 }
1491 #[doc = "PRS Channel 0 selected."]
1492 #[inline]
1493 pub fn prsch0(self) -> &'a mut W {
1494 self.variant(TCCPRSSELW::PRSCH0)
1495 }
1496 #[doc = "PRS Channel 1 selected."]
1497 #[inline]
1498 pub fn prsch1(self) -> &'a mut W {
1499 self.variant(TCCPRSSELW::PRSCH1)
1500 }
1501 #[doc = "PRS Channel 2 selected."]
1502 #[inline]
1503 pub fn prsch2(self) -> &'a mut W {
1504 self.variant(TCCPRSSELW::PRSCH2)
1505 }
1506 #[doc = "PRS Channel 3 selected."]
1507 #[inline]
1508 pub fn prsch3(self) -> &'a mut W {
1509 self.variant(TCCPRSSELW::PRSCH3)
1510 }
1511 #[doc = "PRS Channel 4 selected."]
1512 #[inline]
1513 pub fn prsch4(self) -> &'a mut W {
1514 self.variant(TCCPRSSELW::PRSCH4)
1515 }
1516 #[doc = "PRS Channel 5 selected."]
1517 #[inline]
1518 pub fn prsch5(self) -> &'a mut W {
1519 self.variant(TCCPRSSELW::PRSCH5)
1520 }
1521 #[doc = "PRS Channel 6 selected."]
1522 #[inline]
1523 pub fn prsch6(self) -> &'a mut W {
1524 self.variant(TCCPRSSELW::PRSCH6)
1525 }
1526 #[doc = "PRS Channel 7 selected."]
1527 #[inline]
1528 pub fn prsch7(self) -> &'a mut W {
1529 self.variant(TCCPRSSELW::PRSCH7)
1530 }
1531 #[doc = "PRS Channel 8 selected."]
1532 #[inline]
1533 pub fn prsch8(self) -> &'a mut W {
1534 self.variant(TCCPRSSELW::PRSCH8)
1535 }
1536 #[doc = "PRS Channel 9 selected."]
1537 #[inline]
1538 pub fn prsch9(self) -> &'a mut W {
1539 self.variant(TCCPRSSELW::PRSCH9)
1540 }
1541 #[doc = "PRS Channel 10 selected."]
1542 #[inline]
1543 pub fn prsch10(self) -> &'a mut W {
1544 self.variant(TCCPRSSELW::PRSCH10)
1545 }
1546 #[doc = "PRS Channel 11 selected."]
1547 #[inline]
1548 pub fn prsch11(self) -> &'a mut W {
1549 self.variant(TCCPRSSELW::PRSCH11)
1550 }
1551 #[doc = r" Writes raw bits to the field"]
1552 #[inline]
1553 pub unsafe fn bits(self, value: u8) -> &'a mut W {
1554 const MASK: u8 = 15;
1555 const OFFSET: u8 = 26;
1556 self.w.bits &= !((MASK as u32) << OFFSET);
1557 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1558 self.w
1559 }
1560}
1561#[doc = r" Proxy"]
1562pub struct _TOPBHFSELW<'a> {
1563 w: &'a mut W,
1564}
1565impl<'a> _TOPBHFSELW<'a> {
1566 #[doc = r" Sets the field bit"]
1567 pub fn set_bit(self) -> &'a mut W {
1568 self.bit(true)
1569 }
1570 #[doc = r" Clears the field bit"]
1571 pub fn clear_bit(self) -> &'a mut W {
1572 self.bit(false)
1573 }
1574 #[doc = r" Writes raw bits to the field"]
1575 #[inline]
1576 pub fn bit(self, value: bool) -> &'a mut W {
1577 const MASK: bool = true;
1578 const OFFSET: u8 = 31;
1579 self.w.bits &= !((MASK as u32) << OFFSET);
1580 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1581 self.w
1582 }
1583}
1584impl R {
1585 #[doc = r" Value of the register as raw bits"]
1586 #[inline]
1587 pub fn bits(&self) -> u32 {
1588 self.bits
1589 }
1590 #[doc = "Bits 0:2 - Mode Select"]
1591 #[inline]
1592 pub fn mode(&self) -> MODER {
1593 MODER::_from({
1594 const MASK: u8 = 7;
1595 const OFFSET: u8 = 0;
1596 ((self.bits >> OFFSET) & MASK as u32) as u8
1597 })
1598 }
1599 #[doc = "Bit 3 - Enable Digital Pulse Width Filter"]
1600 #[inline]
1601 pub fn filt(&self) -> FILTR {
1602 let bits = {
1603 const MASK: bool = true;
1604 const OFFSET: u8 = 3;
1605 ((self.bits >> OFFSET) & MASK as u32) != 0
1606 };
1607 FILTR { bits }
1608 }
1609 #[doc = "Bit 4 - Enable PCNT Clock Domain Reset"]
1610 #[inline]
1611 pub fn rsten(&self) -> RSTENR {
1612 let bits = {
1613 const MASK: bool = true;
1614 const OFFSET: u8 = 4;
1615 ((self.bits >> OFFSET) & MASK as u32) != 0
1616 };
1617 RSTENR { bits }
1618 }
1619 #[doc = "Bit 5 - Enable CNT Reset"]
1620 #[inline]
1621 pub fn cntrsten(&self) -> CNTRSTENR {
1622 let bits = {
1623 const MASK: bool = true;
1624 const OFFSET: u8 = 5;
1625 ((self.bits >> OFFSET) & MASK as u32) != 0
1626 };
1627 CNTRSTENR { bits }
1628 }
1629 #[doc = "Bit 6 - Enable AUXCNT Reset"]
1630 #[inline]
1631 pub fn auxcntrsten(&self) -> AUXCNTRSTENR {
1632 let bits = {
1633 const MASK: bool = true;
1634 const OFFSET: u8 = 6;
1635 ((self.bits >> OFFSET) & MASK as u32) != 0
1636 };
1637 AUXCNTRSTENR { bits }
1638 }
1639 #[doc = "Bit 7 - Debug Mode Halt Enable"]
1640 #[inline]
1641 pub fn debughalt(&self) -> DEBUGHALTR {
1642 let bits = {
1643 const MASK: bool = true;
1644 const OFFSET: u8 = 7;
1645 ((self.bits >> OFFSET) & MASK as u32) != 0
1646 };
1647 DEBUGHALTR { bits }
1648 }
1649 #[doc = "Bit 8 - Enable Hysteresis"]
1650 #[inline]
1651 pub fn hyst(&self) -> HYSTR {
1652 let bits = {
1653 const MASK: bool = true;
1654 const OFFSET: u8 = 8;
1655 ((self.bits >> OFFSET) & MASK as u32) != 0
1656 };
1657 HYSTR { bits }
1658 }
1659 #[doc = "Bit 9 - Count Direction Determined By S1"]
1660 #[inline]
1661 pub fn s1cdir(&self) -> S1CDIRR {
1662 let bits = {
1663 const MASK: bool = true;
1664 const OFFSET: u8 = 9;
1665 ((self.bits >> OFFSET) & MASK as u32) != 0
1666 };
1667 S1CDIRR { bits }
1668 }
1669 #[doc = "Bits 10:11 - Controls When the Counter Counts"]
1670 #[inline]
1671 pub fn cntev(&self) -> CNTEVR {
1672 CNTEVR::_from({
1673 const MASK: u8 = 3;
1674 const OFFSET: u8 = 10;
1675 ((self.bits >> OFFSET) & MASK as u32) as u8
1676 })
1677 }
1678 #[doc = "Bits 12:13 - Controls When the Auxiliary Counter Counts"]
1679 #[inline]
1680 pub fn auxcntev(&self) -> AUXCNTEVR {
1681 AUXCNTEVR::_from({
1682 const MASK: u8 = 3;
1683 const OFFSET: u8 = 12;
1684 ((self.bits >> OFFSET) & MASK as u32) as u8
1685 })
1686 }
1687 #[doc = "Bit 14 - Non-Quadrature Mode Counter Direction Control"]
1688 #[inline]
1689 pub fn cntdir(&self) -> CNTDIRR {
1690 let bits = {
1691 const MASK: bool = true;
1692 const OFFSET: u8 = 14;
1693 ((self.bits >> OFFSET) & MASK as u32) != 0
1694 };
1695 CNTDIRR { bits }
1696 }
1697 #[doc = "Bit 15 - Edge Select"]
1698 #[inline]
1699 pub fn edge(&self) -> EDGER {
1700 let bits = {
1701 const MASK: bool = true;
1702 const OFFSET: u8 = 15;
1703 ((self.bits >> OFFSET) & MASK as u32) != 0
1704 };
1705 EDGER { bits }
1706 }
1707 #[doc = "Bits 16:17 - Sets the Mode for Triggered Compare and Clear"]
1708 #[inline]
1709 pub fn tccmode(&self) -> TCCMODER {
1710 TCCMODER::_from({
1711 const MASK: u8 = 3;
1712 const OFFSET: u8 = 16;
1713 ((self.bits >> OFFSET) & MASK as u32) as u8
1714 })
1715 }
1716 #[doc = "Bits 19:20 - Set the LFA Prescaler for Triggered Compare and Clear"]
1717 #[inline]
1718 pub fn tccpresc(&self) -> TCCPRESCR {
1719 TCCPRESCR::_from({
1720 const MASK: u8 = 3;
1721 const OFFSET: u8 = 19;
1722 ((self.bits >> OFFSET) & MASK as u32) as u8
1723 })
1724 }
1725 #[doc = "Bits 22:23 - Triggered Compare and Clear Compare Mode"]
1726 #[inline]
1727 pub fn tcccomp(&self) -> TCCCOMPR {
1728 TCCCOMPR::_from({
1729 const MASK: u8 = 3;
1730 const OFFSET: u8 = 22;
1731 ((self.bits >> OFFSET) & MASK as u32) as u8
1732 })
1733 }
1734 #[doc = "Bit 24 - PRS Gate Enable"]
1735 #[inline]
1736 pub fn prsgateen(&self) -> PRSGATEENR {
1737 let bits = {
1738 const MASK: bool = true;
1739 const OFFSET: u8 = 24;
1740 ((self.bits >> OFFSET) & MASK as u32) != 0
1741 };
1742 PRSGATEENR { bits }
1743 }
1744 #[doc = "Bit 25 - TCC PRS Polarity Select"]
1745 #[inline]
1746 pub fn tccprspol(&self) -> TCCPRSPOLR {
1747 let bits = {
1748 const MASK: bool = true;
1749 const OFFSET: u8 = 25;
1750 ((self.bits >> OFFSET) & MASK as u32) != 0
1751 };
1752 TCCPRSPOLR { bits }
1753 }
1754 #[doc = "Bits 26:29 - TCC PRS Channel Select"]
1755 #[inline]
1756 pub fn tccprssel(&self) -> TCCPRSSELR {
1757 TCCPRSSELR::_from({
1758 const MASK: u8 = 15;
1759 const OFFSET: u8 = 26;
1760 ((self.bits >> OFFSET) & MASK as u32) as u8
1761 })
1762 }
1763 #[doc = "Bit 31 - TOPB High Frequency Value Select"]
1764 #[inline]
1765 pub fn topbhfsel(&self) -> TOPBHFSELR {
1766 let bits = {
1767 const MASK: bool = true;
1768 const OFFSET: u8 = 31;
1769 ((self.bits >> OFFSET) & MASK as u32) != 0
1770 };
1771 TOPBHFSELR { bits }
1772 }
1773}
1774impl W {
1775 #[doc = r" Reset value of the register"]
1776 #[inline]
1777 pub fn reset_value() -> W {
1778 W { bits: 0 }
1779 }
1780 #[doc = r" Writes raw bits to the register"]
1781 #[inline]
1782 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
1783 self.bits = bits;
1784 self
1785 }
1786 #[doc = "Bits 0:2 - Mode Select"]
1787 #[inline]
1788 pub fn mode(&mut self) -> _MODEW {
1789 _MODEW { w: self }
1790 }
1791 #[doc = "Bit 3 - Enable Digital Pulse Width Filter"]
1792 #[inline]
1793 pub fn filt(&mut self) -> _FILTW {
1794 _FILTW { w: self }
1795 }
1796 #[doc = "Bit 4 - Enable PCNT Clock Domain Reset"]
1797 #[inline]
1798 pub fn rsten(&mut self) -> _RSTENW {
1799 _RSTENW { w: self }
1800 }
1801 #[doc = "Bit 5 - Enable CNT Reset"]
1802 #[inline]
1803 pub fn cntrsten(&mut self) -> _CNTRSTENW {
1804 _CNTRSTENW { w: self }
1805 }
1806 #[doc = "Bit 6 - Enable AUXCNT Reset"]
1807 #[inline]
1808 pub fn auxcntrsten(&mut self) -> _AUXCNTRSTENW {
1809 _AUXCNTRSTENW { w: self }
1810 }
1811 #[doc = "Bit 7 - Debug Mode Halt Enable"]
1812 #[inline]
1813 pub fn debughalt(&mut self) -> _DEBUGHALTW {
1814 _DEBUGHALTW { w: self }
1815 }
1816 #[doc = "Bit 8 - Enable Hysteresis"]
1817 #[inline]
1818 pub fn hyst(&mut self) -> _HYSTW {
1819 _HYSTW { w: self }
1820 }
1821 #[doc = "Bit 9 - Count Direction Determined By S1"]
1822 #[inline]
1823 pub fn s1cdir(&mut self) -> _S1CDIRW {
1824 _S1CDIRW { w: self }
1825 }
1826 #[doc = "Bits 10:11 - Controls When the Counter Counts"]
1827 #[inline]
1828 pub fn cntev(&mut self) -> _CNTEVW {
1829 _CNTEVW { w: self }
1830 }
1831 #[doc = "Bits 12:13 - Controls When the Auxiliary Counter Counts"]
1832 #[inline]
1833 pub fn auxcntev(&mut self) -> _AUXCNTEVW {
1834 _AUXCNTEVW { w: self }
1835 }
1836 #[doc = "Bit 14 - Non-Quadrature Mode Counter Direction Control"]
1837 #[inline]
1838 pub fn cntdir(&mut self) -> _CNTDIRW {
1839 _CNTDIRW { w: self }
1840 }
1841 #[doc = "Bit 15 - Edge Select"]
1842 #[inline]
1843 pub fn edge(&mut self) -> _EDGEW {
1844 _EDGEW { w: self }
1845 }
1846 #[doc = "Bits 16:17 - Sets the Mode for Triggered Compare and Clear"]
1847 #[inline]
1848 pub fn tccmode(&mut self) -> _TCCMODEW {
1849 _TCCMODEW { w: self }
1850 }
1851 #[doc = "Bits 19:20 - Set the LFA Prescaler for Triggered Compare and Clear"]
1852 #[inline]
1853 pub fn tccpresc(&mut self) -> _TCCPRESCW {
1854 _TCCPRESCW { w: self }
1855 }
1856 #[doc = "Bits 22:23 - Triggered Compare and Clear Compare Mode"]
1857 #[inline]
1858 pub fn tcccomp(&mut self) -> _TCCCOMPW {
1859 _TCCCOMPW { w: self }
1860 }
1861 #[doc = "Bit 24 - PRS Gate Enable"]
1862 #[inline]
1863 pub fn prsgateen(&mut self) -> _PRSGATEENW {
1864 _PRSGATEENW { w: self }
1865 }
1866 #[doc = "Bit 25 - TCC PRS Polarity Select"]
1867 #[inline]
1868 pub fn tccprspol(&mut self) -> _TCCPRSPOLW {
1869 _TCCPRSPOLW { w: self }
1870 }
1871 #[doc = "Bits 26:29 - TCC PRS Channel Select"]
1872 #[inline]
1873 pub fn tccprssel(&mut self) -> _TCCPRSSELW {
1874 _TCCPRSSELW { w: self }
1875 }
1876 #[doc = "Bit 31 - TOPB High Frequency Value Select"]
1877 #[inline]
1878 pub fn topbhfsel(&mut self) -> _TOPBHFSELW {
1879 _TOPBHFSELW { w: self }
1880 }
1881}