efr32xg1/emu/em4ctrl/
mod.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::EM4CTRL {
10    #[doc = r" Modifies the contents of the register"]
11    #[inline]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        let r = R { bits: bits };
18        let mut w = W { bits: bits };
19        f(&r, &mut w);
20        self.register.set(w.bits);
21    }
22    #[doc = r" Reads the contents of the register"]
23    #[inline]
24    pub fn read(&self) -> R {
25        R {
26            bits: self.register.get(),
27        }
28    }
29    #[doc = r" Writes to the register"]
30    #[inline]
31    pub fn write<F>(&self, f: F)
32    where
33        F: FnOnce(&mut W) -> &mut W,
34    {
35        let mut w = W::reset_value();
36        f(&mut w);
37        self.register.set(w.bits);
38    }
39    #[doc = r" Writes the reset value to the register"]
40    #[inline]
41    pub fn reset(&self) {
42        self.write(|w| w)
43    }
44}
45#[doc = r" Value of the field"]
46pub struct EM4STATER {
47    bits: bool,
48}
49impl EM4STATER {
50    #[doc = r" Value of the field as raw bits"]
51    #[inline]
52    pub fn bit(&self) -> bool {
53        self.bits
54    }
55    #[doc = r" Returns `true` if the bit is clear (0)"]
56    #[inline]
57    pub fn bit_is_clear(&self) -> bool {
58        !self.bit()
59    }
60    #[doc = r" Returns `true` if the bit is set (1)"]
61    #[inline]
62    pub fn bit_is_set(&self) -> bool {
63        self.bit()
64    }
65}
66#[doc = r" Value of the field"]
67pub struct RETAINLFRCOR {
68    bits: bool,
69}
70impl RETAINLFRCOR {
71    #[doc = r" Value of the field as raw bits"]
72    #[inline]
73    pub fn bit(&self) -> bool {
74        self.bits
75    }
76    #[doc = r" Returns `true` if the bit is clear (0)"]
77    #[inline]
78    pub fn bit_is_clear(&self) -> bool {
79        !self.bit()
80    }
81    #[doc = r" Returns `true` if the bit is set (1)"]
82    #[inline]
83    pub fn bit_is_set(&self) -> bool {
84        self.bit()
85    }
86}
87#[doc = r" Value of the field"]
88pub struct RETAINLFXOR {
89    bits: bool,
90}
91impl RETAINLFXOR {
92    #[doc = r" Value of the field as raw bits"]
93    #[inline]
94    pub fn bit(&self) -> bool {
95        self.bits
96    }
97    #[doc = r" Returns `true` if the bit is clear (0)"]
98    #[inline]
99    pub fn bit_is_clear(&self) -> bool {
100        !self.bit()
101    }
102    #[doc = r" Returns `true` if the bit is set (1)"]
103    #[inline]
104    pub fn bit_is_set(&self) -> bool {
105        self.bit()
106    }
107}
108#[doc = r" Value of the field"]
109pub struct RETAINULFRCOR {
110    bits: bool,
111}
112impl RETAINULFRCOR {
113    #[doc = r" Value of the field as raw bits"]
114    #[inline]
115    pub fn bit(&self) -> bool {
116        self.bits
117    }
118    #[doc = r" Returns `true` if the bit is clear (0)"]
119    #[inline]
120    pub fn bit_is_clear(&self) -> bool {
121        !self.bit()
122    }
123    #[doc = r" Returns `true` if the bit is set (1)"]
124    #[inline]
125    pub fn bit_is_set(&self) -> bool {
126        self.bit()
127    }
128}
129#[doc = "Possible values of the field `EM4IORETMODE`"]
130#[derive(Clone, Copy, Debug, PartialEq)]
131pub enum EM4IORETMODER {
132    #[doc = "No Retention: Pads enter reset state when entering EM4"]
133    DISABLE,
134    #[doc = "Retention through EM4: Pads enter reset state when exiting EM4"]
135    EM4EXIT,
136    #[doc = "Retention through EM4 and Wakeup: software writes UNLATCH register to remove retention"]
137    SWUNLATCH,
138    #[doc = r" Reserved"]
139    _Reserved(u8),
140}
141impl EM4IORETMODER {
142    #[doc = r" Value of the field as raw bits"]
143    #[inline]
144    pub fn bits(&self) -> u8 {
145        match *self {
146            EM4IORETMODER::DISABLE => 0,
147            EM4IORETMODER::EM4EXIT => 1,
148            EM4IORETMODER::SWUNLATCH => 2,
149            EM4IORETMODER::_Reserved(bits) => bits,
150        }
151    }
152    #[allow(missing_docs)]
153    #[doc(hidden)]
154    #[inline]
155    pub fn _from(value: u8) -> EM4IORETMODER {
156        match value {
157            0 => EM4IORETMODER::DISABLE,
158            1 => EM4IORETMODER::EM4EXIT,
159            2 => EM4IORETMODER::SWUNLATCH,
160            i => EM4IORETMODER::_Reserved(i),
161        }
162    }
163    #[doc = "Checks if the value of the field is `DISABLE`"]
164    #[inline]
165    pub fn is_disable(&self) -> bool {
166        *self == EM4IORETMODER::DISABLE
167    }
168    #[doc = "Checks if the value of the field is `EM4EXIT`"]
169    #[inline]
170    pub fn is_em4exit(&self) -> bool {
171        *self == EM4IORETMODER::EM4EXIT
172    }
173    #[doc = "Checks if the value of the field is `SWUNLATCH`"]
174    #[inline]
175    pub fn is_swunlatch(&self) -> bool {
176        *self == EM4IORETMODER::SWUNLATCH
177    }
178}
179#[doc = r" Proxy"]
180pub struct _EM4STATEW<'a> {
181    w: &'a mut W,
182}
183impl<'a> _EM4STATEW<'a> {
184    #[doc = r" Sets the field bit"]
185    pub fn set_bit(self) -> &'a mut W {
186        self.bit(true)
187    }
188    #[doc = r" Clears the field bit"]
189    pub fn clear_bit(self) -> &'a mut W {
190        self.bit(false)
191    }
192    #[doc = r" Writes raw bits to the field"]
193    #[inline]
194    pub fn bit(self, value: bool) -> &'a mut W {
195        const MASK: bool = true;
196        const OFFSET: u8 = 0;
197        self.w.bits &= !((MASK as u32) << OFFSET);
198        self.w.bits |= ((value & MASK) as u32) << OFFSET;
199        self.w
200    }
201}
202#[doc = r" Proxy"]
203pub struct _RETAINLFRCOW<'a> {
204    w: &'a mut W,
205}
206impl<'a> _RETAINLFRCOW<'a> {
207    #[doc = r" Sets the field bit"]
208    pub fn set_bit(self) -> &'a mut W {
209        self.bit(true)
210    }
211    #[doc = r" Clears the field bit"]
212    pub fn clear_bit(self) -> &'a mut W {
213        self.bit(false)
214    }
215    #[doc = r" Writes raw bits to the field"]
216    #[inline]
217    pub fn bit(self, value: bool) -> &'a mut W {
218        const MASK: bool = true;
219        const OFFSET: u8 = 1;
220        self.w.bits &= !((MASK as u32) << OFFSET);
221        self.w.bits |= ((value & MASK) as u32) << OFFSET;
222        self.w
223    }
224}
225#[doc = r" Proxy"]
226pub struct _RETAINLFXOW<'a> {
227    w: &'a mut W,
228}
229impl<'a> _RETAINLFXOW<'a> {
230    #[doc = r" Sets the field bit"]
231    pub fn set_bit(self) -> &'a mut W {
232        self.bit(true)
233    }
234    #[doc = r" Clears the field bit"]
235    pub fn clear_bit(self) -> &'a mut W {
236        self.bit(false)
237    }
238    #[doc = r" Writes raw bits to the field"]
239    #[inline]
240    pub fn bit(self, value: bool) -> &'a mut W {
241        const MASK: bool = true;
242        const OFFSET: u8 = 2;
243        self.w.bits &= !((MASK as u32) << OFFSET);
244        self.w.bits |= ((value & MASK) as u32) << OFFSET;
245        self.w
246    }
247}
248#[doc = r" Proxy"]
249pub struct _RETAINULFRCOW<'a> {
250    w: &'a mut W,
251}
252impl<'a> _RETAINULFRCOW<'a> {
253    #[doc = r" Sets the field bit"]
254    pub fn set_bit(self) -> &'a mut W {
255        self.bit(true)
256    }
257    #[doc = r" Clears the field bit"]
258    pub fn clear_bit(self) -> &'a mut W {
259        self.bit(false)
260    }
261    #[doc = r" Writes raw bits to the field"]
262    #[inline]
263    pub fn bit(self, value: bool) -> &'a mut W {
264        const MASK: bool = true;
265        const OFFSET: u8 = 3;
266        self.w.bits &= !((MASK as u32) << OFFSET);
267        self.w.bits |= ((value & MASK) as u32) << OFFSET;
268        self.w
269    }
270}
271#[doc = "Values that can be written to the field `EM4IORETMODE`"]
272pub enum EM4IORETMODEW {
273    #[doc = "No Retention: Pads enter reset state when entering EM4"]
274    DISABLE,
275    #[doc = "Retention through EM4: Pads enter reset state when exiting EM4"]
276    EM4EXIT,
277    #[doc = "Retention through EM4 and Wakeup: software writes UNLATCH register to remove retention"]
278    SWUNLATCH,
279}
280impl EM4IORETMODEW {
281    #[allow(missing_docs)]
282    #[doc(hidden)]
283    #[inline]
284    pub fn _bits(&self) -> u8 {
285        match *self {
286            EM4IORETMODEW::DISABLE => 0,
287            EM4IORETMODEW::EM4EXIT => 1,
288            EM4IORETMODEW::SWUNLATCH => 2,
289        }
290    }
291}
292#[doc = r" Proxy"]
293pub struct _EM4IORETMODEW<'a> {
294    w: &'a mut W,
295}
296impl<'a> _EM4IORETMODEW<'a> {
297    #[doc = r" Writes `variant` to the field"]
298    #[inline]
299    pub fn variant(self, variant: EM4IORETMODEW) -> &'a mut W {
300        unsafe { self.bits(variant._bits()) }
301    }
302    #[doc = "No Retention: Pads enter reset state when entering EM4"]
303    #[inline]
304    pub fn disable(self) -> &'a mut W {
305        self.variant(EM4IORETMODEW::DISABLE)
306    }
307    #[doc = "Retention through EM4: Pads enter reset state when exiting EM4"]
308    #[inline]
309    pub fn em4exit(self) -> &'a mut W {
310        self.variant(EM4IORETMODEW::EM4EXIT)
311    }
312    #[doc = "Retention through EM4 and Wakeup: software writes UNLATCH register to remove retention"]
313    #[inline]
314    pub fn swunlatch(self) -> &'a mut W {
315        self.variant(EM4IORETMODEW::SWUNLATCH)
316    }
317    #[doc = r" Writes raw bits to the field"]
318    #[inline]
319    pub unsafe fn bits(self, value: u8) -> &'a mut W {
320        const MASK: u8 = 3;
321        const OFFSET: u8 = 4;
322        self.w.bits &= !((MASK as u32) << OFFSET);
323        self.w.bits |= ((value & MASK) as u32) << OFFSET;
324        self.w
325    }
326}
327#[doc = r" Proxy"]
328pub struct _EM4ENTRYW<'a> {
329    w: &'a mut W,
330}
331impl<'a> _EM4ENTRYW<'a> {
332    #[doc = r" Writes raw bits to the field"]
333    #[inline]
334    pub unsafe fn bits(self, value: u8) -> &'a mut W {
335        const MASK: u8 = 3;
336        const OFFSET: u8 = 16;
337        self.w.bits &= !((MASK as u32) << OFFSET);
338        self.w.bits |= ((value & MASK) as u32) << OFFSET;
339        self.w
340    }
341}
342impl R {
343    #[doc = r" Value of the register as raw bits"]
344    #[inline]
345    pub fn bits(&self) -> u32 {
346        self.bits
347    }
348    #[doc = "Bit 0 - Energy Mode 4 State"]
349    #[inline]
350    pub fn em4state(&self) -> EM4STATER {
351        let bits = {
352            const MASK: bool = true;
353            const OFFSET: u8 = 0;
354            ((self.bits >> OFFSET) & MASK as u32) != 0
355        };
356        EM4STATER { bits }
357    }
358    #[doc = "Bit 1 - LFRCO Retain During EM4"]
359    #[inline]
360    pub fn retainlfrco(&self) -> RETAINLFRCOR {
361        let bits = {
362            const MASK: bool = true;
363            const OFFSET: u8 = 1;
364            ((self.bits >> OFFSET) & MASK as u32) != 0
365        };
366        RETAINLFRCOR { bits }
367    }
368    #[doc = "Bit 2 - LFXO Retain During EM4"]
369    #[inline]
370    pub fn retainlfxo(&self) -> RETAINLFXOR {
371        let bits = {
372            const MASK: bool = true;
373            const OFFSET: u8 = 2;
374            ((self.bits >> OFFSET) & MASK as u32) != 0
375        };
376        RETAINLFXOR { bits }
377    }
378    #[doc = "Bit 3 - ULFRCO Retain During EM4S"]
379    #[inline]
380    pub fn retainulfrco(&self) -> RETAINULFRCOR {
381        let bits = {
382            const MASK: bool = true;
383            const OFFSET: u8 = 3;
384            ((self.bits >> OFFSET) & MASK as u32) != 0
385        };
386        RETAINULFRCOR { bits }
387    }
388    #[doc = "Bits 4:5 - EM4 IO Retention Disable"]
389    #[inline]
390    pub fn em4ioretmode(&self) -> EM4IORETMODER {
391        EM4IORETMODER::_from({
392            const MASK: u8 = 3;
393            const OFFSET: u8 = 4;
394            ((self.bits >> OFFSET) & MASK as u32) as u8
395        })
396    }
397}
398impl W {
399    #[doc = r" Reset value of the register"]
400    #[inline]
401    pub fn reset_value() -> W {
402        W { bits: 0 }
403    }
404    #[doc = r" Writes raw bits to the register"]
405    #[inline]
406    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
407        self.bits = bits;
408        self
409    }
410    #[doc = "Bit 0 - Energy Mode 4 State"]
411    #[inline]
412    pub fn em4state(&mut self) -> _EM4STATEW {
413        _EM4STATEW { w: self }
414    }
415    #[doc = "Bit 1 - LFRCO Retain During EM4"]
416    #[inline]
417    pub fn retainlfrco(&mut self) -> _RETAINLFRCOW {
418        _RETAINLFRCOW { w: self }
419    }
420    #[doc = "Bit 2 - LFXO Retain During EM4"]
421    #[inline]
422    pub fn retainlfxo(&mut self) -> _RETAINLFXOW {
423        _RETAINLFXOW { w: self }
424    }
425    #[doc = "Bit 3 - ULFRCO Retain During EM4S"]
426    #[inline]
427    pub fn retainulfrco(&mut self) -> _RETAINULFRCOW {
428        _RETAINULFRCOW { w: self }
429    }
430    #[doc = "Bits 4:5 - EM4 IO Retention Disable"]
431    #[inline]
432    pub fn em4ioretmode(&mut self) -> _EM4IORETMODEW {
433        _EM4IORETMODEW { w: self }
434    }
435    #[doc = "Bits 16:17 - Energy Mode 4 Entry"]
436    #[inline]
437    pub fn em4entry(&mut self) -> _EM4ENTRYW {
438        _EM4ENTRYW { w: self }
439    }
440}