efr32xg1/gpio/pc_ctrl/
mod.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::PC_CTRL {
10    #[doc = r" Modifies the contents of the register"]
11    #[inline]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        let r = R { bits: bits };
18        let mut w = W { bits: bits };
19        f(&r, &mut w);
20        self.register.set(w.bits);
21    }
22    #[doc = r" Reads the contents of the register"]
23    #[inline]
24    pub fn read(&self) -> R {
25        R {
26            bits: self.register.get(),
27        }
28    }
29    #[doc = r" Writes to the register"]
30    #[inline]
31    pub fn write<F>(&self, f: F)
32    where
33        F: FnOnce(&mut W) -> &mut W,
34    {
35        let mut w = W::reset_value();
36        f(&mut w);
37        self.register.set(w.bits);
38    }
39    #[doc = r" Writes the reset value to the register"]
40    #[inline]
41    pub fn reset(&self) {
42        self.write(|w| w)
43    }
44}
45#[doc = r" Value of the field"]
46pub struct DRIVESTRENGTHR {
47    bits: bool,
48}
49impl DRIVESTRENGTHR {
50    #[doc = r" Value of the field as raw bits"]
51    #[inline]
52    pub fn bit(&self) -> bool {
53        self.bits
54    }
55    #[doc = r" Returns `true` if the bit is clear (0)"]
56    #[inline]
57    pub fn bit_is_clear(&self) -> bool {
58        !self.bit()
59    }
60    #[doc = r" Returns `true` if the bit is set (1)"]
61    #[inline]
62    pub fn bit_is_set(&self) -> bool {
63        self.bit()
64    }
65}
66#[doc = r" Value of the field"]
67pub struct SLEWRATER {
68    bits: u8,
69}
70impl SLEWRATER {
71    #[doc = r" Value of the field as raw bits"]
72    #[inline]
73    pub fn bits(&self) -> u8 {
74        self.bits
75    }
76}
77#[doc = r" Value of the field"]
78pub struct DINDISR {
79    bits: bool,
80}
81impl DINDISR {
82    #[doc = r" Value of the field as raw bits"]
83    #[inline]
84    pub fn bit(&self) -> bool {
85        self.bits
86    }
87    #[doc = r" Returns `true` if the bit is clear (0)"]
88    #[inline]
89    pub fn bit_is_clear(&self) -> bool {
90        !self.bit()
91    }
92    #[doc = r" Returns `true` if the bit is set (1)"]
93    #[inline]
94    pub fn bit_is_set(&self) -> bool {
95        self.bit()
96    }
97}
98#[doc = r" Value of the field"]
99pub struct DRIVESTRENGTHALTR {
100    bits: bool,
101}
102impl DRIVESTRENGTHALTR {
103    #[doc = r" Value of the field as raw bits"]
104    #[inline]
105    pub fn bit(&self) -> bool {
106        self.bits
107    }
108    #[doc = r" Returns `true` if the bit is clear (0)"]
109    #[inline]
110    pub fn bit_is_clear(&self) -> bool {
111        !self.bit()
112    }
113    #[doc = r" Returns `true` if the bit is set (1)"]
114    #[inline]
115    pub fn bit_is_set(&self) -> bool {
116        self.bit()
117    }
118}
119#[doc = r" Value of the field"]
120pub struct SLEWRATEALTR {
121    bits: u8,
122}
123impl SLEWRATEALTR {
124    #[doc = r" Value of the field as raw bits"]
125    #[inline]
126    pub fn bits(&self) -> u8 {
127        self.bits
128    }
129}
130#[doc = r" Value of the field"]
131pub struct DINDISALTR {
132    bits: bool,
133}
134impl DINDISALTR {
135    #[doc = r" Value of the field as raw bits"]
136    #[inline]
137    pub fn bit(&self) -> bool {
138        self.bits
139    }
140    #[doc = r" Returns `true` if the bit is clear (0)"]
141    #[inline]
142    pub fn bit_is_clear(&self) -> bool {
143        !self.bit()
144    }
145    #[doc = r" Returns `true` if the bit is set (1)"]
146    #[inline]
147    pub fn bit_is_set(&self) -> bool {
148        self.bit()
149    }
150}
151#[doc = r" Proxy"]
152pub struct _DRIVESTRENGTHW<'a> {
153    w: &'a mut W,
154}
155impl<'a> _DRIVESTRENGTHW<'a> {
156    #[doc = r" Sets the field bit"]
157    pub fn set_bit(self) -> &'a mut W {
158        self.bit(true)
159    }
160    #[doc = r" Clears the field bit"]
161    pub fn clear_bit(self) -> &'a mut W {
162        self.bit(false)
163    }
164    #[doc = r" Writes raw bits to the field"]
165    #[inline]
166    pub fn bit(self, value: bool) -> &'a mut W {
167        const MASK: bool = true;
168        const OFFSET: u8 = 0;
169        self.w.bits &= !((MASK as u32) << OFFSET);
170        self.w.bits |= ((value & MASK) as u32) << OFFSET;
171        self.w
172    }
173}
174#[doc = r" Proxy"]
175pub struct _SLEWRATEW<'a> {
176    w: &'a mut W,
177}
178impl<'a> _SLEWRATEW<'a> {
179    #[doc = r" Writes raw bits to the field"]
180    #[inline]
181    pub unsafe fn bits(self, value: u8) -> &'a mut W {
182        const MASK: u8 = 7;
183        const OFFSET: u8 = 4;
184        self.w.bits &= !((MASK as u32) << OFFSET);
185        self.w.bits |= ((value & MASK) as u32) << OFFSET;
186        self.w
187    }
188}
189#[doc = r" Proxy"]
190pub struct _DINDISW<'a> {
191    w: &'a mut W,
192}
193impl<'a> _DINDISW<'a> {
194    #[doc = r" Sets the field bit"]
195    pub fn set_bit(self) -> &'a mut W {
196        self.bit(true)
197    }
198    #[doc = r" Clears the field bit"]
199    pub fn clear_bit(self) -> &'a mut W {
200        self.bit(false)
201    }
202    #[doc = r" Writes raw bits to the field"]
203    #[inline]
204    pub fn bit(self, value: bool) -> &'a mut W {
205        const MASK: bool = true;
206        const OFFSET: u8 = 12;
207        self.w.bits &= !((MASK as u32) << OFFSET);
208        self.w.bits |= ((value & MASK) as u32) << OFFSET;
209        self.w
210    }
211}
212#[doc = r" Proxy"]
213pub struct _DRIVESTRENGTHALTW<'a> {
214    w: &'a mut W,
215}
216impl<'a> _DRIVESTRENGTHALTW<'a> {
217    #[doc = r" Sets the field bit"]
218    pub fn set_bit(self) -> &'a mut W {
219        self.bit(true)
220    }
221    #[doc = r" Clears the field bit"]
222    pub fn clear_bit(self) -> &'a mut W {
223        self.bit(false)
224    }
225    #[doc = r" Writes raw bits to the field"]
226    #[inline]
227    pub fn bit(self, value: bool) -> &'a mut W {
228        const MASK: bool = true;
229        const OFFSET: u8 = 16;
230        self.w.bits &= !((MASK as u32) << OFFSET);
231        self.w.bits |= ((value & MASK) as u32) << OFFSET;
232        self.w
233    }
234}
235#[doc = r" Proxy"]
236pub struct _SLEWRATEALTW<'a> {
237    w: &'a mut W,
238}
239impl<'a> _SLEWRATEALTW<'a> {
240    #[doc = r" Writes raw bits to the field"]
241    #[inline]
242    pub unsafe fn bits(self, value: u8) -> &'a mut W {
243        const MASK: u8 = 7;
244        const OFFSET: u8 = 20;
245        self.w.bits &= !((MASK as u32) << OFFSET);
246        self.w.bits |= ((value & MASK) as u32) << OFFSET;
247        self.w
248    }
249}
250#[doc = r" Proxy"]
251pub struct _DINDISALTW<'a> {
252    w: &'a mut W,
253}
254impl<'a> _DINDISALTW<'a> {
255    #[doc = r" Sets the field bit"]
256    pub fn set_bit(self) -> &'a mut W {
257        self.bit(true)
258    }
259    #[doc = r" Clears the field bit"]
260    pub fn clear_bit(self) -> &'a mut W {
261        self.bit(false)
262    }
263    #[doc = r" Writes raw bits to the field"]
264    #[inline]
265    pub fn bit(self, value: bool) -> &'a mut W {
266        const MASK: bool = true;
267        const OFFSET: u8 = 28;
268        self.w.bits &= !((MASK as u32) << OFFSET);
269        self.w.bits |= ((value & MASK) as u32) << OFFSET;
270        self.w
271    }
272}
273impl R {
274    #[doc = r" Value of the register as raw bits"]
275    #[inline]
276    pub fn bits(&self) -> u32 {
277        self.bits
278    }
279    #[doc = "Bit 0 - Drive Strength for Port"]
280    #[inline]
281    pub fn drivestrength(&self) -> DRIVESTRENGTHR {
282        let bits = {
283            const MASK: bool = true;
284            const OFFSET: u8 = 0;
285            ((self.bits >> OFFSET) & MASK as u32) != 0
286        };
287        DRIVESTRENGTHR { bits }
288    }
289    #[doc = "Bits 4:6 - Slewrate Limit for Port"]
290    #[inline]
291    pub fn slewrate(&self) -> SLEWRATER {
292        let bits = {
293            const MASK: u8 = 7;
294            const OFFSET: u8 = 4;
295            ((self.bits >> OFFSET) & MASK as u32) as u8
296        };
297        SLEWRATER { bits }
298    }
299    #[doc = "Bit 12 - Data in Disable"]
300    #[inline]
301    pub fn dindis(&self) -> DINDISR {
302        let bits = {
303            const MASK: bool = true;
304            const OFFSET: u8 = 12;
305            ((self.bits >> OFFSET) & MASK as u32) != 0
306        };
307        DINDISR { bits }
308    }
309    #[doc = "Bit 16 - Alternate Drive Strength for Port"]
310    #[inline]
311    pub fn drivestrengthalt(&self) -> DRIVESTRENGTHALTR {
312        let bits = {
313            const MASK: bool = true;
314            const OFFSET: u8 = 16;
315            ((self.bits >> OFFSET) & MASK as u32) != 0
316        };
317        DRIVESTRENGTHALTR { bits }
318    }
319    #[doc = "Bits 20:22 - Alternate Slewrate Limit for Port"]
320    #[inline]
321    pub fn slewratealt(&self) -> SLEWRATEALTR {
322        let bits = {
323            const MASK: u8 = 7;
324            const OFFSET: u8 = 20;
325            ((self.bits >> OFFSET) & MASK as u32) as u8
326        };
327        SLEWRATEALTR { bits }
328    }
329    #[doc = "Bit 28 - Alternate Data in Disable"]
330    #[inline]
331    pub fn dindisalt(&self) -> DINDISALTR {
332        let bits = {
333            const MASK: bool = true;
334            const OFFSET: u8 = 28;
335            ((self.bits >> OFFSET) & MASK as u32) != 0
336        };
337        DINDISALTR { bits }
338    }
339}
340impl W {
341    #[doc = r" Reset value of the register"]
342    #[inline]
343    pub fn reset_value() -> W {
344        W { bits: 5242960 }
345    }
346    #[doc = r" Writes raw bits to the register"]
347    #[inline]
348    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
349        self.bits = bits;
350        self
351    }
352    #[doc = "Bit 0 - Drive Strength for Port"]
353    #[inline]
354    pub fn drivestrength(&mut self) -> _DRIVESTRENGTHW {
355        _DRIVESTRENGTHW { w: self }
356    }
357    #[doc = "Bits 4:6 - Slewrate Limit for Port"]
358    #[inline]
359    pub fn slewrate(&mut self) -> _SLEWRATEW {
360        _SLEWRATEW { w: self }
361    }
362    #[doc = "Bit 12 - Data in Disable"]
363    #[inline]
364    pub fn dindis(&mut self) -> _DINDISW {
365        _DINDISW { w: self }
366    }
367    #[doc = "Bit 16 - Alternate Drive Strength for Port"]
368    #[inline]
369    pub fn drivestrengthalt(&mut self) -> _DRIVESTRENGTHALTW {
370        _DRIVESTRENGTHALTW { w: self }
371    }
372    #[doc = "Bits 20:22 - Alternate Slewrate Limit for Port"]
373    #[inline]
374    pub fn slewratealt(&mut self) -> _SLEWRATEALTW {
375        _SLEWRATEALTW { w: self }
376    }
377    #[doc = "Bit 28 - Alternate Data in Disable"]
378    #[inline]
379    pub fn dindisalt(&mut self) -> _DINDISALTW {
380        _DINDISALTW { w: self }
381    }
382}
efr32xg1/gpio/pc_ctrl/mod.rs

efr32xg1/gpio/pc_ctrl/
mod.rs
