efm32wg942_pac/cmu/
ien.rs

1#[doc = "Register `IEN` reader"]
2pub struct R(crate::R<IEN_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<IEN_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<IEN_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<IEN_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `IEN` writer"]
17pub struct W(crate::W<IEN_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<IEN_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<IEN_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<IEN_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `HFRCORDY` reader - HFRCO Ready Interrupt Enable"]
38pub type HFRCORDY_R = crate::BitReader<bool>;
39#[doc = "Field `HFRCORDY` writer - HFRCO Ready Interrupt Enable"]
40pub type HFRCORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 0>;
41#[doc = "Field `HFXORDY` reader - HFXO Ready Interrupt Enable"]
42pub type HFXORDY_R = crate::BitReader<bool>;
43#[doc = "Field `HFXORDY` writer - HFXO Ready Interrupt Enable"]
44pub type HFXORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 1>;
45#[doc = "Field `LFRCORDY` reader - LFRCO Ready Interrupt Enable"]
46pub type LFRCORDY_R = crate::BitReader<bool>;
47#[doc = "Field `LFRCORDY` writer - LFRCO Ready Interrupt Enable"]
48pub type LFRCORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 2>;
49#[doc = "Field `LFXORDY` reader - LFXO Ready Interrupt Enable"]
50pub type LFXORDY_R = crate::BitReader<bool>;
51#[doc = "Field `LFXORDY` writer - LFXO Ready Interrupt Enable"]
52pub type LFXORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 3>;
53#[doc = "Field `AUXHFRCORDY` reader - AUXHFRCO Ready Interrupt Enable"]
54pub type AUXHFRCORDY_R = crate::BitReader<bool>;
55#[doc = "Field `AUXHFRCORDY` writer - AUXHFRCO Ready Interrupt Enable"]
56pub type AUXHFRCORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 4>;
57#[doc = "Field `CALRDY` reader - Calibration Ready Interrupt Enable"]
58pub type CALRDY_R = crate::BitReader<bool>;
59#[doc = "Field `CALRDY` writer - Calibration Ready Interrupt Enable"]
60pub type CALRDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 5>;
61#[doc = "Field `CALOF` reader - Calibration Overflow Interrupt Enable"]
62pub type CALOF_R = crate::BitReader<bool>;
63#[doc = "Field `CALOF` writer - Calibration Overflow Interrupt Enable"]
64pub type CALOF_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 6>;
65#[doc = "Field `USBCHFCLKSEL` reader - USBC HFCLK Selected Interrupt Enable"]
66pub type USBCHFCLKSEL_R = crate::BitReader<bool>;
67#[doc = "Field `USBCHFCLKSEL` writer - USBC HFCLK Selected Interrupt Enable"]
68pub type USBCHFCLKSEL_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 7>;
69impl R {
70    #[doc = "Bit 0 - HFRCO Ready Interrupt Enable"]
71    #[inline(always)]
72    pub fn hfrcordy(&self) -> HFRCORDY_R {
73        HFRCORDY_R::new((self.bits & 1) != 0)
74    }
75    #[doc = "Bit 1 - HFXO Ready Interrupt Enable"]
76    #[inline(always)]
77    pub fn hfxordy(&self) -> HFXORDY_R {
78        HFXORDY_R::new(((self.bits >> 1) & 1) != 0)
79    }
80    #[doc = "Bit 2 - LFRCO Ready Interrupt Enable"]
81    #[inline(always)]
82    pub fn lfrcordy(&self) -> LFRCORDY_R {
83        LFRCORDY_R::new(((self.bits >> 2) & 1) != 0)
84    }
85    #[doc = "Bit 3 - LFXO Ready Interrupt Enable"]
86    #[inline(always)]
87    pub fn lfxordy(&self) -> LFXORDY_R {
88        LFXORDY_R::new(((self.bits >> 3) & 1) != 0)
89    }
90    #[doc = "Bit 4 - AUXHFRCO Ready Interrupt Enable"]
91    #[inline(always)]
92    pub fn auxhfrcordy(&self) -> AUXHFRCORDY_R {
93        AUXHFRCORDY_R::new(((self.bits >> 4) & 1) != 0)
94    }
95    #[doc = "Bit 5 - Calibration Ready Interrupt Enable"]
96    #[inline(always)]
97    pub fn calrdy(&self) -> CALRDY_R {
98        CALRDY_R::new(((self.bits >> 5) & 1) != 0)
99    }
100    #[doc = "Bit 6 - Calibration Overflow Interrupt Enable"]
101    #[inline(always)]
102    pub fn calof(&self) -> CALOF_R {
103        CALOF_R::new(((self.bits >> 6) & 1) != 0)
104    }
105    #[doc = "Bit 7 - USBC HFCLK Selected Interrupt Enable"]
106    #[inline(always)]
107    pub fn usbchfclksel(&self) -> USBCHFCLKSEL_R {
108        USBCHFCLKSEL_R::new(((self.bits >> 7) & 1) != 0)
109    }
110}
111impl W {
112    #[doc = "Bit 0 - HFRCO Ready Interrupt Enable"]
113    #[inline(always)]
114    pub fn hfrcordy(&mut self) -> HFRCORDY_W {
115        HFRCORDY_W::new(self)
116    }
117    #[doc = "Bit 1 - HFXO Ready Interrupt Enable"]
118    #[inline(always)]
119    pub fn hfxordy(&mut self) -> HFXORDY_W {
120        HFXORDY_W::new(self)
121    }
122    #[doc = "Bit 2 - LFRCO Ready Interrupt Enable"]
123    #[inline(always)]
124    pub fn lfrcordy(&mut self) -> LFRCORDY_W {
125        LFRCORDY_W::new(self)
126    }
127    #[doc = "Bit 3 - LFXO Ready Interrupt Enable"]
128    #[inline(always)]
129    pub fn lfxordy(&mut self) -> LFXORDY_W {
130        LFXORDY_W::new(self)
131    }
132    #[doc = "Bit 4 - AUXHFRCO Ready Interrupt Enable"]
133    #[inline(always)]
134    pub fn auxhfrcordy(&mut self) -> AUXHFRCORDY_W {
135        AUXHFRCORDY_W::new(self)
136    }
137    #[doc = "Bit 5 - Calibration Ready Interrupt Enable"]
138    #[inline(always)]
139    pub fn calrdy(&mut self) -> CALRDY_W {
140        CALRDY_W::new(self)
141    }
142    #[doc = "Bit 6 - Calibration Overflow Interrupt Enable"]
143    #[inline(always)]
144    pub fn calof(&mut self) -> CALOF_W {
145        CALOF_W::new(self)
146    }
147    #[doc = "Bit 7 - USBC HFCLK Selected Interrupt Enable"]
148    #[inline(always)]
149    pub fn usbchfclksel(&mut self) -> USBCHFCLKSEL_W {
150        USBCHFCLKSEL_W::new(self)
151    }
152    #[doc = "Writes raw bits to the register."]
153    #[inline(always)]
154    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
155        self.0.bits(bits);
156        self
157    }
158}
159#[doc = "Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"]
160pub struct IEN_SPEC;
161impl crate::RegisterSpec for IEN_SPEC {
162    type Ux = u32;
163}
164#[doc = "`read()` method returns [ien::R](R) reader structure"]
165impl crate::Readable for IEN_SPEC {
166    type Reader = R;
167}
168#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"]
169impl crate::Writable for IEN_SPEC {
170    type Writer = W;
171}
172#[doc = "`reset()` method sets IEN to value 0"]
173impl crate::Resettable for IEN_SPEC {
174    #[inline(always)]
175    fn reset_value() -> Self::Ux {
176        0
177    }
178}
efm32wg942_pac/cmu/ien.rs

efm32wg942_pac/cmu/
ien.rs
