efm32wg390_pac/usb/
diep1_tsiz.rs

1#[doc = "Register `DIEP1_TSIZ` reader"]
2pub struct R(crate::R<DIEP1_TSIZ_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DIEP1_TSIZ_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DIEP1_TSIZ_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DIEP1_TSIZ_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `DIEP1_TSIZ` writer"]
17pub struct W(crate::W<DIEP1_TSIZ_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<DIEP1_TSIZ_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<DIEP1_TSIZ_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<DIEP1_TSIZ_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `XFERSIZE` reader - Transfer Size"]
38pub type XFERSIZE_R = crate::FieldReader<u32, u32>;
39#[doc = "Field `XFERSIZE` writer - Transfer Size"]
40pub type XFERSIZE_W<'a> = crate::FieldWriter<'a, u32, DIEP1_TSIZ_SPEC, u32, u32, 19, 0>;
41#[doc = "Field `PKTCNT` reader - Packet Count"]
42pub type PKTCNT_R = crate::FieldReader<u16, u16>;
43#[doc = "Field `PKTCNT` writer - Packet Count"]
44pub type PKTCNT_W<'a> = crate::FieldWriter<'a, u32, DIEP1_TSIZ_SPEC, u16, u16, 10, 19>;
45#[doc = "Field `MC` reader - Multi Count"]
46pub type MC_R = crate::FieldReader<u8, u8>;
47#[doc = "Field `MC` writer - Multi Count"]
48pub type MC_W<'a> = crate::FieldWriter<'a, u32, DIEP1_TSIZ_SPEC, u8, u8, 2, 29>;
49impl R {
50    #[doc = "Bits 0:18 - Transfer Size"]
51    #[inline(always)]
52    pub fn xfersize(&self) -> XFERSIZE_R {
53        XFERSIZE_R::new((self.bits & 0x0007_ffff) as u32)
54    }
55    #[doc = "Bits 19:28 - Packet Count"]
56    #[inline(always)]
57    pub fn pktcnt(&self) -> PKTCNT_R {
58        PKTCNT_R::new(((self.bits >> 19) & 0x03ff) as u16)
59    }
60    #[doc = "Bits 29:30 - Multi Count"]
61    #[inline(always)]
62    pub fn mc(&self) -> MC_R {
63        MC_R::new(((self.bits >> 29) & 3) as u8)
64    }
65}
66impl W {
67    #[doc = "Bits 0:18 - Transfer Size"]
68    #[inline(always)]
69    pub fn xfersize(&mut self) -> XFERSIZE_W {
70        XFERSIZE_W::new(self)
71    }
72    #[doc = "Bits 19:28 - Packet Count"]
73    #[inline(always)]
74    pub fn pktcnt(&mut self) -> PKTCNT_W {
75        PKTCNT_W::new(self)
76    }
77    #[doc = "Bits 29:30 - Multi Count"]
78    #[inline(always)]
79    pub fn mc(&mut self) -> MC_W {
80        MC_W::new(self)
81    }
82    #[doc = "Writes raw bits to the register."]
83    #[inline(always)]
84    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
85        self.0.bits(bits);
86        self
87    }
88}
89#[doc = "Device IN Endpoint x+1 Transfer Size Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [diep1_tsiz](index.html) module"]
90pub struct DIEP1_TSIZ_SPEC;
91impl crate::RegisterSpec for DIEP1_TSIZ_SPEC {
92    type Ux = u32;
93}
94#[doc = "`read()` method returns [diep1_tsiz::R](R) reader structure"]
95impl crate::Readable for DIEP1_TSIZ_SPEC {
96    type Reader = R;
97}
98#[doc = "`write(|w| ..)` method takes [diep1_tsiz::W](W) writer structure"]
99impl crate::Writable for DIEP1_TSIZ_SPEC {
100    type Writer = W;
101}
102#[doc = "`reset()` method sets DIEP1_TSIZ to value 0"]
103impl crate::Resettable for DIEP1_TSIZ_SPEC {
104    #[inline(always)]
105    fn reset_value() -> Self::Ux {
106        0
107    }
108}
efm32wg390_pac/usb/diep1_tsiz.rs

efm32wg390_pac/usb/
diep1_tsiz.rs
