#[doc = "Register `IFC` writer"]
pub struct W(crate::W<IFC_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<IFC_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<IFC_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<IFC_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `START` writer - Clear START Interrupt Flag"]
pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
#[doc = "Field `RSTART` writer - Clear Repeated START Interrupt Flag"]
pub type RSTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
#[doc = "Field `ADDR` writer - Clear Address Interrupt Flag"]
pub type ADDR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
#[doc = "Field `TXC` writer - Clear Transfer Completed Interrupt Flag"]
pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
#[doc = "Field `ACK` writer - Clear Acknowledge Received Interrupt Flag"]
pub type ACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
#[doc = "Field `NACK` writer - Clear Not Acknowledge Received Interrupt Flag"]
pub type NACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
#[doc = "Field `MSTOP` writer - Clear MSTOP Interrupt Flag"]
pub type MSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
#[doc = "Field `ARBLOST` writer - Clear Arbitration Lost Interrupt Flag"]
pub type ARBLOST_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
#[doc = "Field `BUSERR` writer - Clear Bus Error Interrupt Flag"]
pub type BUSERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
#[doc = "Field `BUSHOLD` writer - Clear Bus Held Interrupt Flag"]
pub type BUSHOLD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
#[doc = "Field `TXOF` writer - Clear Transmit Buffer Overflow Interrupt Flag"]
pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
#[doc = "Field `RXUF` writer - Clear Receive Buffer Underflow Interrupt Flag"]
pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
#[doc = "Field `BITO` writer - Clear Bus Idle Timeout Interrupt Flag"]
pub type BITO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
#[doc = "Field `CLTO` writer - Clear Clock Low Interrupt Flag"]
pub type CLTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
#[doc = "Field `SSTOP` writer - Clear SSTOP Interrupt Flag"]
pub type SSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
impl W {
#[doc = "Bit 0 - Clear START Interrupt Flag"]
#[inline(always)]
#[must_use]
pub fn start(&mut self) -> START_W<0> {
START_W::new(self)
}
#[doc = "Bit 1 - Clear Repeated START Interrupt Flag"]
#[inline(always)]
#[must_use]
pub fn rstart(&mut self) -> RSTART_W<1> {
RSTART_W::new(self)
}
#[doc = "Bit 2 - Clear Address Interrupt Flag"]
#[inline(always)]
#[must_use]
pub fn addr(&mut self) -> ADDR_W<2> {
ADDR_W::new(self)
}
#[doc = "Bit 3 - Clear Transfer Completed Interrupt Flag"]
#[inline(always)]
#[must_use]
pub fn txc(&mut self) -> TXC_W<3> {
TXC_W::new(self)
}
#[doc = "Bit 6 - Clear Acknowledge Received Interrupt Flag"]
#[inline(always)]
#[must_use]
pub fn ack(&mut self) -> ACK_W<6> {
ACK_W::new(self)
}
#[doc = "Bit 7 - Clear Not Acknowledge Received Interrupt Flag"]
#[inline(always)]
#[must_use]
pub fn nack(&mut self) -> NACK_W<7> {
NACK_W::new(self)
}
#[doc = "Bit 8 - Clear MSTOP Interrupt Flag"]
#[inline(always)]
#[must_use]
pub fn mstop(&mut self) -> MSTOP_W<8> {
MSTOP_W::new(self)
}
#[doc = "Bit 9 - Clear Arbitration Lost Interrupt Flag"]
#[inline(always)]
#[must_use]
pub fn arblost(&mut self) -> ARBLOST_W<9> {
ARBLOST_W::new(self)
}
#[doc = "Bit 10 - Clear Bus Error Interrupt Flag"]
#[inline(always)]
#[must_use]
pub fn buserr(&mut self) -> BUSERR_W<10> {
BUSERR_W::new(self)
}
#[doc = "Bit 11 - Clear Bus Held Interrupt Flag"]
#[inline(always)]
#[must_use]
pub fn bushold(&mut self) -> BUSHOLD_W<11> {
BUSHOLD_W::new(self)
}
#[doc = "Bit 12 - Clear Transmit Buffer Overflow Interrupt Flag"]
#[inline(always)]
#[must_use]
pub fn txof(&mut self) -> TXOF_W<12> {
TXOF_W::new(self)
}
#[doc = "Bit 13 - Clear Receive Buffer Underflow Interrupt Flag"]
#[inline(always)]
#[must_use]
pub fn rxuf(&mut self) -> RXUF_W<13> {
RXUF_W::new(self)
}
#[doc = "Bit 14 - Clear Bus Idle Timeout Interrupt Flag"]
#[inline(always)]
#[must_use]
pub fn bito(&mut self) -> BITO_W<14> {
BITO_W::new(self)
}
#[doc = "Bit 15 - Clear Clock Low Interrupt Flag"]
#[inline(always)]
#[must_use]
pub fn clto(&mut self) -> CLTO_W<15> {
CLTO_W::new(self)
}
#[doc = "Bit 16 - Clear SSTOP Interrupt Flag"]
#[inline(always)]
#[must_use]
pub fn sstop(&mut self) -> SSTOP_W<16> {
SSTOP_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Interrupt Flag Clear Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ifc](index.html) module"]
pub struct IFC_SPEC;
impl crate::RegisterSpec for IFC_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [ifc::W](W) writer structure"]
impl crate::Writable for IFC_SPEC {
type Writer = W;
const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
}
#[doc = "`reset()` method sets IFC to value 0"]
impl crate::Resettable for IFC_SPEC {
const RESET_VALUE: Self::Ux = 0;
}