efm32tg11b540_pac/cmu/
ien.rs

1#[doc = "Register `IEN` reader"]
2pub struct R(crate::R<IEN_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<IEN_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<IEN_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<IEN_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `IEN` writer"]
17pub struct W(crate::W<IEN_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<IEN_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<IEN_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<IEN_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `HFRCORDY` reader - HFRCORDY Interrupt Enable"]
38pub type HFRCORDY_R = crate::BitReader<bool>;
39#[doc = "Field `HFRCORDY` writer - HFRCORDY Interrupt Enable"]
40pub type HFRCORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 0>;
41#[doc = "Field `HFXORDY` reader - HFXORDY Interrupt Enable"]
42pub type HFXORDY_R = crate::BitReader<bool>;
43#[doc = "Field `HFXORDY` writer - HFXORDY Interrupt Enable"]
44pub type HFXORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 1>;
45#[doc = "Field `LFRCORDY` reader - LFRCORDY Interrupt Enable"]
46pub type LFRCORDY_R = crate::BitReader<bool>;
47#[doc = "Field `LFRCORDY` writer - LFRCORDY Interrupt Enable"]
48pub type LFRCORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 2>;
49#[doc = "Field `LFXORDY` reader - LFXORDY Interrupt Enable"]
50pub type LFXORDY_R = crate::BitReader<bool>;
51#[doc = "Field `LFXORDY` writer - LFXORDY Interrupt Enable"]
52pub type LFXORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 3>;
53#[doc = "Field `AUXHFRCORDY` reader - AUXHFRCORDY Interrupt Enable"]
54pub type AUXHFRCORDY_R = crate::BitReader<bool>;
55#[doc = "Field `AUXHFRCORDY` writer - AUXHFRCORDY Interrupt Enable"]
56pub type AUXHFRCORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 4>;
57#[doc = "Field `CALRDY` reader - CALRDY Interrupt Enable"]
58pub type CALRDY_R = crate::BitReader<bool>;
59#[doc = "Field `CALRDY` writer - CALRDY Interrupt Enable"]
60pub type CALRDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 5>;
61#[doc = "Field `CALOF` reader - CALOF Interrupt Enable"]
62pub type CALOF_R = crate::BitReader<bool>;
63#[doc = "Field `CALOF` writer - CALOF Interrupt Enable"]
64pub type CALOF_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 6>;
65#[doc = "Field `HFXODISERR` reader - HFXODISERR Interrupt Enable"]
66pub type HFXODISERR_R = crate::BitReader<bool>;
67#[doc = "Field `HFXODISERR` writer - HFXODISERR Interrupt Enable"]
68pub type HFXODISERR_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 8>;
69#[doc = "Field `HFXOAUTOSW` reader - HFXOAUTOSW Interrupt Enable"]
70pub type HFXOAUTOSW_R = crate::BitReader<bool>;
71#[doc = "Field `HFXOAUTOSW` writer - HFXOAUTOSW Interrupt Enable"]
72pub type HFXOAUTOSW_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 9>;
73#[doc = "Field `HFXOPEAKDETRDY` reader - HFXOPEAKDETRDY Interrupt Enable"]
74pub type HFXOPEAKDETRDY_R = crate::BitReader<bool>;
75#[doc = "Field `HFXOPEAKDETRDY` writer - HFXOPEAKDETRDY Interrupt Enable"]
76pub type HFXOPEAKDETRDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 11>;
77#[doc = "Field `HFRCODIS` reader - HFRCODIS Interrupt Enable"]
78pub type HFRCODIS_R = crate::BitReader<bool>;
79#[doc = "Field `HFRCODIS` writer - HFRCODIS Interrupt Enable"]
80pub type HFRCODIS_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 13>;
81#[doc = "Field `LFTIMEOUTERR` reader - LFTIMEOUTERR Interrupt Enable"]
82pub type LFTIMEOUTERR_R = crate::BitReader<bool>;
83#[doc = "Field `LFTIMEOUTERR` writer - LFTIMEOUTERR Interrupt Enable"]
84pub type LFTIMEOUTERR_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 14>;
85#[doc = "Field `DPLLRDY` reader - DPLLRDY Interrupt Enable"]
86pub type DPLLRDY_R = crate::BitReader<bool>;
87#[doc = "Field `DPLLRDY` writer - DPLLRDY Interrupt Enable"]
88pub type DPLLRDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 15>;
89#[doc = "Field `DPLLLOCKFAILLOW` reader - DPLLLOCKFAILLOW Interrupt Enable"]
90pub type DPLLLOCKFAILLOW_R = crate::BitReader<bool>;
91#[doc = "Field `DPLLLOCKFAILLOW` writer - DPLLLOCKFAILLOW Interrupt Enable"]
92pub type DPLLLOCKFAILLOW_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 16>;
93#[doc = "Field `DPLLLOCKFAILHIGH` reader - DPLLLOCKFAILHIGH Interrupt Enable"]
94pub type DPLLLOCKFAILHIGH_R = crate::BitReader<bool>;
95#[doc = "Field `DPLLLOCKFAILHIGH` writer - DPLLLOCKFAILHIGH Interrupt Enable"]
96pub type DPLLLOCKFAILHIGH_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 17>;
97#[doc = "Field `LFXOEDGE` reader - LFXOEDGE Interrupt Enable"]
98pub type LFXOEDGE_R = crate::BitReader<bool>;
99#[doc = "Field `LFXOEDGE` writer - LFXOEDGE Interrupt Enable"]
100pub type LFXOEDGE_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 27>;
101#[doc = "Field `LFRCOEDGE` reader - LFRCOEDGE Interrupt Enable"]
102pub type LFRCOEDGE_R = crate::BitReader<bool>;
103#[doc = "Field `LFRCOEDGE` writer - LFRCOEDGE Interrupt Enable"]
104pub type LFRCOEDGE_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 28>;
105#[doc = "Field `ULFRCOEDGE` reader - ULFRCOEDGE Interrupt Enable"]
106pub type ULFRCOEDGE_R = crate::BitReader<bool>;
107#[doc = "Field `ULFRCOEDGE` writer - ULFRCOEDGE Interrupt Enable"]
108pub type ULFRCOEDGE_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 29>;
109#[doc = "Field `CMUERR` reader - CMUERR Interrupt Enable"]
110pub type CMUERR_R = crate::BitReader<bool>;
111#[doc = "Field `CMUERR` writer - CMUERR Interrupt Enable"]
112pub type CMUERR_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 31>;
113impl R {
114    #[doc = "Bit 0 - HFRCORDY Interrupt Enable"]
115    #[inline(always)]
116    pub fn hfrcordy(&self) -> HFRCORDY_R {
117        HFRCORDY_R::new((self.bits & 1) != 0)
118    }
119    #[doc = "Bit 1 - HFXORDY Interrupt Enable"]
120    #[inline(always)]
121    pub fn hfxordy(&self) -> HFXORDY_R {
122        HFXORDY_R::new(((self.bits >> 1) & 1) != 0)
123    }
124    #[doc = "Bit 2 - LFRCORDY Interrupt Enable"]
125    #[inline(always)]
126    pub fn lfrcordy(&self) -> LFRCORDY_R {
127        LFRCORDY_R::new(((self.bits >> 2) & 1) != 0)
128    }
129    #[doc = "Bit 3 - LFXORDY Interrupt Enable"]
130    #[inline(always)]
131    pub fn lfxordy(&self) -> LFXORDY_R {
132        LFXORDY_R::new(((self.bits >> 3) & 1) != 0)
133    }
134    #[doc = "Bit 4 - AUXHFRCORDY Interrupt Enable"]
135    #[inline(always)]
136    pub fn auxhfrcordy(&self) -> AUXHFRCORDY_R {
137        AUXHFRCORDY_R::new(((self.bits >> 4) & 1) != 0)
138    }
139    #[doc = "Bit 5 - CALRDY Interrupt Enable"]
140    #[inline(always)]
141    pub fn calrdy(&self) -> CALRDY_R {
142        CALRDY_R::new(((self.bits >> 5) & 1) != 0)
143    }
144    #[doc = "Bit 6 - CALOF Interrupt Enable"]
145    #[inline(always)]
146    pub fn calof(&self) -> CALOF_R {
147        CALOF_R::new(((self.bits >> 6) & 1) != 0)
148    }
149    #[doc = "Bit 8 - HFXODISERR Interrupt Enable"]
150    #[inline(always)]
151    pub fn hfxodiserr(&self) -> HFXODISERR_R {
152        HFXODISERR_R::new(((self.bits >> 8) & 1) != 0)
153    }
154    #[doc = "Bit 9 - HFXOAUTOSW Interrupt Enable"]
155    #[inline(always)]
156    pub fn hfxoautosw(&self) -> HFXOAUTOSW_R {
157        HFXOAUTOSW_R::new(((self.bits >> 9) & 1) != 0)
158    }
159    #[doc = "Bit 11 - HFXOPEAKDETRDY Interrupt Enable"]
160    #[inline(always)]
161    pub fn hfxopeakdetrdy(&self) -> HFXOPEAKDETRDY_R {
162        HFXOPEAKDETRDY_R::new(((self.bits >> 11) & 1) != 0)
163    }
164    #[doc = "Bit 13 - HFRCODIS Interrupt Enable"]
165    #[inline(always)]
166    pub fn hfrcodis(&self) -> HFRCODIS_R {
167        HFRCODIS_R::new(((self.bits >> 13) & 1) != 0)
168    }
169    #[doc = "Bit 14 - LFTIMEOUTERR Interrupt Enable"]
170    #[inline(always)]
171    pub fn lftimeouterr(&self) -> LFTIMEOUTERR_R {
172        LFTIMEOUTERR_R::new(((self.bits >> 14) & 1) != 0)
173    }
174    #[doc = "Bit 15 - DPLLRDY Interrupt Enable"]
175    #[inline(always)]
176    pub fn dpllrdy(&self) -> DPLLRDY_R {
177        DPLLRDY_R::new(((self.bits >> 15) & 1) != 0)
178    }
179    #[doc = "Bit 16 - DPLLLOCKFAILLOW Interrupt Enable"]
180    #[inline(always)]
181    pub fn dplllockfaillow(&self) -> DPLLLOCKFAILLOW_R {
182        DPLLLOCKFAILLOW_R::new(((self.bits >> 16) & 1) != 0)
183    }
184    #[doc = "Bit 17 - DPLLLOCKFAILHIGH Interrupt Enable"]
185    #[inline(always)]
186    pub fn dplllockfailhigh(&self) -> DPLLLOCKFAILHIGH_R {
187        DPLLLOCKFAILHIGH_R::new(((self.bits >> 17) & 1) != 0)
188    }
189    #[doc = "Bit 27 - LFXOEDGE Interrupt Enable"]
190    #[inline(always)]
191    pub fn lfxoedge(&self) -> LFXOEDGE_R {
192        LFXOEDGE_R::new(((self.bits >> 27) & 1) != 0)
193    }
194    #[doc = "Bit 28 - LFRCOEDGE Interrupt Enable"]
195    #[inline(always)]
196    pub fn lfrcoedge(&self) -> LFRCOEDGE_R {
197        LFRCOEDGE_R::new(((self.bits >> 28) & 1) != 0)
198    }
199    #[doc = "Bit 29 - ULFRCOEDGE Interrupt Enable"]
200    #[inline(always)]
201    pub fn ulfrcoedge(&self) -> ULFRCOEDGE_R {
202        ULFRCOEDGE_R::new(((self.bits >> 29) & 1) != 0)
203    }
204    #[doc = "Bit 31 - CMUERR Interrupt Enable"]
205    #[inline(always)]
206    pub fn cmuerr(&self) -> CMUERR_R {
207        CMUERR_R::new(((self.bits >> 31) & 1) != 0)
208    }
209}
210impl W {
211    #[doc = "Bit 0 - HFRCORDY Interrupt Enable"]
212    #[inline(always)]
213    pub fn hfrcordy(&mut self) -> HFRCORDY_W {
214        HFRCORDY_W::new(self)
215    }
216    #[doc = "Bit 1 - HFXORDY Interrupt Enable"]
217    #[inline(always)]
218    pub fn hfxordy(&mut self) -> HFXORDY_W {
219        HFXORDY_W::new(self)
220    }
221    #[doc = "Bit 2 - LFRCORDY Interrupt Enable"]
222    #[inline(always)]
223    pub fn lfrcordy(&mut self) -> LFRCORDY_W {
224        LFRCORDY_W::new(self)
225    }
226    #[doc = "Bit 3 - LFXORDY Interrupt Enable"]
227    #[inline(always)]
228    pub fn lfxordy(&mut self) -> LFXORDY_W {
229        LFXORDY_W::new(self)
230    }
231    #[doc = "Bit 4 - AUXHFRCORDY Interrupt Enable"]
232    #[inline(always)]
233    pub fn auxhfrcordy(&mut self) -> AUXHFRCORDY_W {
234        AUXHFRCORDY_W::new(self)
235    }
236    #[doc = "Bit 5 - CALRDY Interrupt Enable"]
237    #[inline(always)]
238    pub fn calrdy(&mut self) -> CALRDY_W {
239        CALRDY_W::new(self)
240    }
241    #[doc = "Bit 6 - CALOF Interrupt Enable"]
242    #[inline(always)]
243    pub fn calof(&mut self) -> CALOF_W {
244        CALOF_W::new(self)
245    }
246    #[doc = "Bit 8 - HFXODISERR Interrupt Enable"]
247    #[inline(always)]
248    pub fn hfxodiserr(&mut self) -> HFXODISERR_W {
249        HFXODISERR_W::new(self)
250    }
251    #[doc = "Bit 9 - HFXOAUTOSW Interrupt Enable"]
252    #[inline(always)]
253    pub fn hfxoautosw(&mut self) -> HFXOAUTOSW_W {
254        HFXOAUTOSW_W::new(self)
255    }
256    #[doc = "Bit 11 - HFXOPEAKDETRDY Interrupt Enable"]
257    #[inline(always)]
258    pub fn hfxopeakdetrdy(&mut self) -> HFXOPEAKDETRDY_W {
259        HFXOPEAKDETRDY_W::new(self)
260    }
261    #[doc = "Bit 13 - HFRCODIS Interrupt Enable"]
262    #[inline(always)]
263    pub fn hfrcodis(&mut self) -> HFRCODIS_W {
264        HFRCODIS_W::new(self)
265    }
266    #[doc = "Bit 14 - LFTIMEOUTERR Interrupt Enable"]
267    #[inline(always)]
268    pub fn lftimeouterr(&mut self) -> LFTIMEOUTERR_W {
269        LFTIMEOUTERR_W::new(self)
270    }
271    #[doc = "Bit 15 - DPLLRDY Interrupt Enable"]
272    #[inline(always)]
273    pub fn dpllrdy(&mut self) -> DPLLRDY_W {
274        DPLLRDY_W::new(self)
275    }
276    #[doc = "Bit 16 - DPLLLOCKFAILLOW Interrupt Enable"]
277    #[inline(always)]
278    pub fn dplllockfaillow(&mut self) -> DPLLLOCKFAILLOW_W {
279        DPLLLOCKFAILLOW_W::new(self)
280    }
281    #[doc = "Bit 17 - DPLLLOCKFAILHIGH Interrupt Enable"]
282    #[inline(always)]
283    pub fn dplllockfailhigh(&mut self) -> DPLLLOCKFAILHIGH_W {
284        DPLLLOCKFAILHIGH_W::new(self)
285    }
286    #[doc = "Bit 27 - LFXOEDGE Interrupt Enable"]
287    #[inline(always)]
288    pub fn lfxoedge(&mut self) -> LFXOEDGE_W {
289        LFXOEDGE_W::new(self)
290    }
291    #[doc = "Bit 28 - LFRCOEDGE Interrupt Enable"]
292    #[inline(always)]
293    pub fn lfrcoedge(&mut self) -> LFRCOEDGE_W {
294        LFRCOEDGE_W::new(self)
295    }
296    #[doc = "Bit 29 - ULFRCOEDGE Interrupt Enable"]
297    #[inline(always)]
298    pub fn ulfrcoedge(&mut self) -> ULFRCOEDGE_W {
299        ULFRCOEDGE_W::new(self)
300    }
301    #[doc = "Bit 31 - CMUERR Interrupt Enable"]
302    #[inline(always)]
303    pub fn cmuerr(&mut self) -> CMUERR_W {
304        CMUERR_W::new(self)
305    }
306    #[doc = "Writes raw bits to the register."]
307    #[inline(always)]
308    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
309        self.0.bits(bits);
310        self
311    }
312}
313#[doc = "Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"]
314pub struct IEN_SPEC;
315impl crate::RegisterSpec for IEN_SPEC {
316    type Ux = u32;
317}
318#[doc = "`read()` method returns [ien::R](R) reader structure"]
319impl crate::Readable for IEN_SPEC {
320    type Reader = R;
321}
322#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"]
323impl crate::Writable for IEN_SPEC {
324    type Writer = W;
325}
326#[doc = "`reset()` method sets IEN to value 0"]
327impl crate::Resettable for IEN_SPEC {
328    #[inline(always)]
329    fn reset_value() -> Self::Ux {
330        0
331    }
332}
efm32tg11b540_pac/cmu/ien.rs

efm32tg11b540_pac/cmu/
ien.rs
