efm32tg11b540_pac/csen/
ctrl.rs

1#[doc = "Register `CTRL` reader"]
2pub struct R(crate::R<CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTRL` writer"]
17pub struct W(crate::W<CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `EN` reader - CSEN Enable"]
38pub type EN_R = crate::BitReader<bool>;
39#[doc = "Field `EN` writer - CSEN Enable"]
40pub type EN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 1>;
41#[doc = "Field `CMPPOL` reader - CSEN Digital Comparator Polarity Select"]
42pub type CMPPOL_R = crate::BitReader<bool>;
43#[doc = "Field `CMPPOL` writer - CSEN Digital Comparator Polarity Select"]
44pub type CMPPOL_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 2>;
45#[doc = "CSEN Conversion Mode Select\n\nValue on reset: 0"]
46#[derive(Clone, Copy, Debug, PartialEq)]
47#[repr(u8)]
48pub enum CM_A {
49    #[doc = "0: Single Channel Mode: One conversion of a single channel (when MCE = 0) or set of bonded channels (when MCE = 1) per conversion trigger."]
50    SGL = 0,
51    #[doc = "1: Scan Mode: Scans multiple selected channels once per conversion trigger."]
52    SCAN = 1,
53    #[doc = "2: Continuous Single Channel: Continuous conversion of a single channel (when MCE = 0) or set of bonded channels (when MCE = 1)."]
54    CONTSGL = 2,
55    #[doc = "3: Continuous Scan Mode: Continuously scans multiple selected channels."]
56    CONTSCAN = 3,
57}
58impl From<CM_A> for u8 {
59    #[inline(always)]
60    fn from(variant: CM_A) -> Self {
61        variant as _
62    }
63}
64#[doc = "Field `CM` reader - CSEN Conversion Mode Select"]
65pub type CM_R = crate::FieldReader<u8, CM_A>;
66impl CM_R {
67    #[doc = "Get enumerated values variant"]
68    #[inline(always)]
69    pub fn variant(&self) -> CM_A {
70        match self.bits {
71            0 => CM_A::SGL,
72            1 => CM_A::SCAN,
73            2 => CM_A::CONTSGL,
74            3 => CM_A::CONTSCAN,
75            _ => unreachable!(),
76        }
77    }
78    #[doc = "Checks if the value of the field is `SGL`"]
79    #[inline(always)]
80    pub fn is_sgl(&self) -> bool {
81        *self == CM_A::SGL
82    }
83    #[doc = "Checks if the value of the field is `SCAN`"]
84    #[inline(always)]
85    pub fn is_scan(&self) -> bool {
86        *self == CM_A::SCAN
87    }
88    #[doc = "Checks if the value of the field is `CONTSGL`"]
89    #[inline(always)]
90    pub fn is_contsgl(&self) -> bool {
91        *self == CM_A::CONTSGL
92    }
93    #[doc = "Checks if the value of the field is `CONTSCAN`"]
94    #[inline(always)]
95    pub fn is_contscan(&self) -> bool {
96        *self == CM_A::CONTSCAN
97    }
98}
99#[doc = "Field `CM` writer - CSEN Conversion Mode Select"]
100pub type CM_W<'a> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, CM_A, 2, 4>;
101impl<'a> CM_W<'a> {
102    #[doc = "Single Channel Mode: One conversion of a single channel (when MCE = 0) or set of bonded channels (when MCE = 1) per conversion trigger."]
103    #[inline(always)]
104    pub fn sgl(self) -> &'a mut W {
105        self.variant(CM_A::SGL)
106    }
107    #[doc = "Scan Mode: Scans multiple selected channels once per conversion trigger."]
108    #[inline(always)]
109    pub fn scan(self) -> &'a mut W {
110        self.variant(CM_A::SCAN)
111    }
112    #[doc = "Continuous Single Channel: Continuous conversion of a single channel (when MCE = 0) or set of bonded channels (when MCE = 1)."]
113    #[inline(always)]
114    pub fn contsgl(self) -> &'a mut W {
115        self.variant(CM_A::CONTSGL)
116    }
117    #[doc = "Continuous Scan Mode: Continuously scans multiple selected channels."]
118    #[inline(always)]
119    pub fn contscan(self) -> &'a mut W {
120        self.variant(CM_A::CONTSCAN)
121    }
122}
123#[doc = "SAR Conversion Resolution.\n\nValue on reset: 0"]
124#[derive(Clone, Copy, Debug, PartialEq)]
125#[repr(u8)]
126pub enum SARCR_A {
127    #[doc = "0: Conversions last 10 internal CSEN clocks and are 10-bits in length."]
128    CLK10 = 0,
129    #[doc = "1: Conversions last 12 internal CSEN clocks and are 12-bits in length."]
130    CLK12 = 1,
131    #[doc = "2: Conversions last 14 internal CSEN clocks and are 14-bits in length."]
132    CLK14 = 2,
133    #[doc = "3: Conversions last 16 internal CSEN clocks and are 16-bits in length."]
134    CLK16 = 3,
135}
136impl From<SARCR_A> for u8 {
137    #[inline(always)]
138    fn from(variant: SARCR_A) -> Self {
139        variant as _
140    }
141}
142#[doc = "Field `SARCR` reader - SAR Conversion Resolution."]
143pub type SARCR_R = crate::FieldReader<u8, SARCR_A>;
144impl SARCR_R {
145    #[doc = "Get enumerated values variant"]
146    #[inline(always)]
147    pub fn variant(&self) -> SARCR_A {
148        match self.bits {
149            0 => SARCR_A::CLK10,
150            1 => SARCR_A::CLK12,
151            2 => SARCR_A::CLK14,
152            3 => SARCR_A::CLK16,
153            _ => unreachable!(),
154        }
155    }
156    #[doc = "Checks if the value of the field is `CLK10`"]
157    #[inline(always)]
158    pub fn is_clk10(&self) -> bool {
159        *self == SARCR_A::CLK10
160    }
161    #[doc = "Checks if the value of the field is `CLK12`"]
162    #[inline(always)]
163    pub fn is_clk12(&self) -> bool {
164        *self == SARCR_A::CLK12
165    }
166    #[doc = "Checks if the value of the field is `CLK14`"]
167    #[inline(always)]
168    pub fn is_clk14(&self) -> bool {
169        *self == SARCR_A::CLK14
170    }
171    #[doc = "Checks if the value of the field is `CLK16`"]
172    #[inline(always)]
173    pub fn is_clk16(&self) -> bool {
174        *self == SARCR_A::CLK16
175    }
176}
177#[doc = "Field `SARCR` writer - SAR Conversion Resolution."]
178pub type SARCR_W<'a> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, SARCR_A, 2, 8>;
179impl<'a> SARCR_W<'a> {
180    #[doc = "Conversions last 10 internal CSEN clocks and are 10-bits in length."]
181    #[inline(always)]
182    pub fn clk10(self) -> &'a mut W {
183        self.variant(SARCR_A::CLK10)
184    }
185    #[doc = "Conversions last 12 internal CSEN clocks and are 12-bits in length."]
186    #[inline(always)]
187    pub fn clk12(self) -> &'a mut W {
188        self.variant(SARCR_A::CLK12)
189    }
190    #[doc = "Conversions last 14 internal CSEN clocks and are 14-bits in length."]
191    #[inline(always)]
192    pub fn clk14(self) -> &'a mut W {
193        self.variant(SARCR_A::CLK14)
194    }
195    #[doc = "Conversions last 16 internal CSEN clocks and are 16-bits in length."]
196    #[inline(always)]
197    pub fn clk16(self) -> &'a mut W {
198        self.variant(SARCR_A::CLK16)
199    }
200}
201#[doc = "CSEN Accumulator Mode Select\n\nValue on reset: 0"]
202#[derive(Clone, Copy, Debug, PartialEq)]
203#[repr(u8)]
204pub enum ACU_A {
205    #[doc = "0: Accumulate 1 sample."]
206    ACC1 = 0,
207    #[doc = "1: Accumulate 2 sample."]
208    ACC2 = 1,
209    #[doc = "2: Accumulate 4 sample."]
210    ACC4 = 2,
211    #[doc = "3: Accumulate 8 sample."]
212    ACC8 = 3,
213    #[doc = "4: Accumulate 16 sample."]
214    ACC16 = 4,
215    #[doc = "5: Accumulate 32 sample."]
216    ACC32 = 5,
217    #[doc = "6: Accumulate 64 sample."]
218    ACC64 = 6,
219}
220impl From<ACU_A> for u8 {
221    #[inline(always)]
222    fn from(variant: ACU_A) -> Self {
223        variant as _
224    }
225}
226#[doc = "Field `ACU` reader - CSEN Accumulator Mode Select"]
227pub type ACU_R = crate::FieldReader<u8, ACU_A>;
228impl ACU_R {
229    #[doc = "Get enumerated values variant"]
230    #[inline(always)]
231    pub fn variant(&self) -> Option<ACU_A> {
232        match self.bits {
233            0 => Some(ACU_A::ACC1),
234            1 => Some(ACU_A::ACC2),
235            2 => Some(ACU_A::ACC4),
236            3 => Some(ACU_A::ACC8),
237            4 => Some(ACU_A::ACC16),
238            5 => Some(ACU_A::ACC32),
239            6 => Some(ACU_A::ACC64),
240            _ => None,
241        }
242    }
243    #[doc = "Checks if the value of the field is `ACC1`"]
244    #[inline(always)]
245    pub fn is_acc1(&self) -> bool {
246        *self == ACU_A::ACC1
247    }
248    #[doc = "Checks if the value of the field is `ACC2`"]
249    #[inline(always)]
250    pub fn is_acc2(&self) -> bool {
251        *self == ACU_A::ACC2
252    }
253    #[doc = "Checks if the value of the field is `ACC4`"]
254    #[inline(always)]
255    pub fn is_acc4(&self) -> bool {
256        *self == ACU_A::ACC4
257    }
258    #[doc = "Checks if the value of the field is `ACC8`"]
259    #[inline(always)]
260    pub fn is_acc8(&self) -> bool {
261        *self == ACU_A::ACC8
262    }
263    #[doc = "Checks if the value of the field is `ACC16`"]
264    #[inline(always)]
265    pub fn is_acc16(&self) -> bool {
266        *self == ACU_A::ACC16
267    }
268    #[doc = "Checks if the value of the field is `ACC32`"]
269    #[inline(always)]
270    pub fn is_acc32(&self) -> bool {
271        *self == ACU_A::ACC32
272    }
273    #[doc = "Checks if the value of the field is `ACC64`"]
274    #[inline(always)]
275    pub fn is_acc64(&self) -> bool {
276        *self == ACU_A::ACC64
277    }
278}
279#[doc = "Field `ACU` writer - CSEN Accumulator Mode Select"]
280pub type ACU_W<'a> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, ACU_A, 3, 12>;
281impl<'a> ACU_W<'a> {
282    #[doc = "Accumulate 1 sample."]
283    #[inline(always)]
284    pub fn acc1(self) -> &'a mut W {
285        self.variant(ACU_A::ACC1)
286    }
287    #[doc = "Accumulate 2 sample."]
288    #[inline(always)]
289    pub fn acc2(self) -> &'a mut W {
290        self.variant(ACU_A::ACC2)
291    }
292    #[doc = "Accumulate 4 sample."]
293    #[inline(always)]
294    pub fn acc4(self) -> &'a mut W {
295        self.variant(ACU_A::ACC4)
296    }
297    #[doc = "Accumulate 8 sample."]
298    #[inline(always)]
299    pub fn acc8(self) -> &'a mut W {
300        self.variant(ACU_A::ACC8)
301    }
302    #[doc = "Accumulate 16 sample."]
303    #[inline(always)]
304    pub fn acc16(self) -> &'a mut W {
305        self.variant(ACU_A::ACC16)
306    }
307    #[doc = "Accumulate 32 sample."]
308    #[inline(always)]
309    pub fn acc32(self) -> &'a mut W {
310        self.variant(ACU_A::ACC32)
311    }
312    #[doc = "Accumulate 64 sample."]
313    #[inline(always)]
314    pub fn acc64(self) -> &'a mut W {
315        self.variant(ACU_A::ACC64)
316    }
317}
318#[doc = "Field `MCEN` reader - CSEN Multiple Channel Enable"]
319pub type MCEN_R = crate::BitReader<bool>;
320#[doc = "Field `MCEN` writer - CSEN Multiple Channel Enable"]
321pub type MCEN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 15>;
322#[doc = "Start Trigger Select\n\nValue on reset: 3"]
323#[derive(Clone, Copy, Debug, PartialEq)]
324#[repr(u8)]
325pub enum STM_A {
326    #[doc = "0: PRS Triggering. Conversions are triggered by the PRS channel selected in PRSSEL."]
327    PRS = 0,
328    #[doc = "1: Timer Triggering. Conversions are triggered by a local CSEN timer reload."]
329    TIMER = 1,
330    #[doc = "2: Software Triggering. Conversions are triggered by writing a 1 to the START field of the CMD register."]
331    START = 2,
332}
333impl From<STM_A> for u8 {
334    #[inline(always)]
335    fn from(variant: STM_A) -> Self {
336        variant as _
337    }
338}
339#[doc = "Field `STM` reader - Start Trigger Select"]
340pub type STM_R = crate::FieldReader<u8, STM_A>;
341impl STM_R {
342    #[doc = "Get enumerated values variant"]
343    #[inline(always)]
344    pub fn variant(&self) -> Option<STM_A> {
345        match self.bits {
346            0 => Some(STM_A::PRS),
347            1 => Some(STM_A::TIMER),
348            2 => Some(STM_A::START),
349            _ => None,
350        }
351    }
352    #[doc = "Checks if the value of the field is `PRS`"]
353    #[inline(always)]
354    pub fn is_prs(&self) -> bool {
355        *self == STM_A::PRS
356    }
357    #[doc = "Checks if the value of the field is `TIMER`"]
358    #[inline(always)]
359    pub fn is_timer(&self) -> bool {
360        *self == STM_A::TIMER
361    }
362    #[doc = "Checks if the value of the field is `START`"]
363    #[inline(always)]
364    pub fn is_start(&self) -> bool {
365        *self == STM_A::START
366    }
367}
368#[doc = "Field `STM` writer - Start Trigger Select"]
369pub type STM_W<'a> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, STM_A, 2, 16>;
370impl<'a> STM_W<'a> {
371    #[doc = "PRS Triggering. Conversions are triggered by the PRS channel selected in PRSSEL."]
372    #[inline(always)]
373    pub fn prs(self) -> &'a mut W {
374        self.variant(STM_A::PRS)
375    }
376    #[doc = "Timer Triggering. Conversions are triggered by a local CSEN timer reload."]
377    #[inline(always)]
378    pub fn timer(self) -> &'a mut W {
379        self.variant(STM_A::TIMER)
380    }
381    #[doc = "Software Triggering. Conversions are triggered by writing a 1 to the START field of the CMD register."]
382    #[inline(always)]
383    pub fn start(self) -> &'a mut W {
384        self.variant(STM_A::START)
385    }
386}
387#[doc = "Field `CMPEN` reader - CSEN Digital Comparator Enable"]
388pub type CMPEN_R = crate::BitReader<bool>;
389#[doc = "Field `CMPEN` writer - CSEN Digital Comparator Enable"]
390pub type CMPEN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 18>;
391#[doc = "Field `DRSF` reader - CSEN Disable Right-Shift"]
392pub type DRSF_R = crate::BitReader<bool>;
393#[doc = "Field `DRSF` writer - CSEN Disable Right-Shift"]
394pub type DRSF_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 19>;
395#[doc = "Field `DMAEN` reader - CSEN DMA Enable Bit"]
396pub type DMAEN_R = crate::BitReader<bool>;
397#[doc = "Field `DMAEN` writer - CSEN DMA Enable Bit"]
398pub type DMAEN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 20>;
399#[doc = "Field `CONVSEL` reader - CSEN Converter Select"]
400pub type CONVSEL_R = crate::BitReader<bool>;
401#[doc = "Field `CONVSEL` writer - CSEN Converter Select"]
402pub type CONVSEL_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 21>;
403#[doc = "Field `CHOPEN` reader - CSEN Chop Enable"]
404pub type CHOPEN_R = crate::BitReader<bool>;
405#[doc = "Field `CHOPEN` writer - CSEN Chop Enable"]
406pub type CHOPEN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 22>;
407#[doc = "Field `AUTOGND` reader - CSEN Automatic Ground Enable"]
408pub type AUTOGND_R = crate::BitReader<bool>;
409#[doc = "Field `AUTOGND` writer - CSEN Automatic Ground Enable"]
410pub type AUTOGND_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 23>;
411#[doc = "Field `MXUC` reader - CSEN Mux Disconnect"]
412pub type MXUC_R = crate::BitReader<bool>;
413#[doc = "Field `MXUC` writer - CSEN Mux Disconnect"]
414pub type MXUC_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 24>;
415#[doc = "Field `EMACMPEN` reader - Greater and Less Than Comparison Using the Exponential Moving Average (EMA) is Enabled"]
416pub type EMACMPEN_R = crate::BitReader<bool>;
417#[doc = "Field `EMACMPEN` writer - Greater and Less Than Comparison Using the Exponential Moving Average (EMA) is Enabled"]
418pub type EMACMPEN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 25>;
419#[doc = "Field `WARMUPMODE` reader - Select Warmup Mode for CSEN"]
420pub type WARMUPMODE_R = crate::BitReader<bool>;
421#[doc = "Field `WARMUPMODE` writer - Select Warmup Mode for CSEN"]
422pub type WARMUPMODE_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 26>;
423#[doc = "Field `LOCALSENS` reader - Local Sensing Enable"]
424pub type LOCALSENS_R = crate::BitReader<bool>;
425#[doc = "Field `LOCALSENS` writer - Local Sensing Enable"]
426pub type LOCALSENS_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 27>;
427#[doc = "Field `CPACCURACY` reader - Charge Pump Accuracy"]
428pub type CPACCURACY_R = crate::BitReader<bool>;
429#[doc = "Field `CPACCURACY` writer - Charge Pump Accuracy"]
430pub type CPACCURACY_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 28>;
431impl R {
432    #[doc = "Bit 1 - CSEN Enable"]
433    #[inline(always)]
434    pub fn en(&self) -> EN_R {
435        EN_R::new(((self.bits >> 1) & 1) != 0)
436    }
437    #[doc = "Bit 2 - CSEN Digital Comparator Polarity Select"]
438    #[inline(always)]
439    pub fn cmppol(&self) -> CMPPOL_R {
440        CMPPOL_R::new(((self.bits >> 2) & 1) != 0)
441    }
442    #[doc = "Bits 4:5 - CSEN Conversion Mode Select"]
443    #[inline(always)]
444    pub fn cm(&self) -> CM_R {
445        CM_R::new(((self.bits >> 4) & 3) as u8)
446    }
447    #[doc = "Bits 8:9 - SAR Conversion Resolution."]
448    #[inline(always)]
449    pub fn sarcr(&self) -> SARCR_R {
450        SARCR_R::new(((self.bits >> 8) & 3) as u8)
451    }
452    #[doc = "Bits 12:14 - CSEN Accumulator Mode Select"]
453    #[inline(always)]
454    pub fn acu(&self) -> ACU_R {
455        ACU_R::new(((self.bits >> 12) & 7) as u8)
456    }
457    #[doc = "Bit 15 - CSEN Multiple Channel Enable"]
458    #[inline(always)]
459    pub fn mcen(&self) -> MCEN_R {
460        MCEN_R::new(((self.bits >> 15) & 1) != 0)
461    }
462    #[doc = "Bits 16:17 - Start Trigger Select"]
463    #[inline(always)]
464    pub fn stm(&self) -> STM_R {
465        STM_R::new(((self.bits >> 16) & 3) as u8)
466    }
467    #[doc = "Bit 18 - CSEN Digital Comparator Enable"]
468    #[inline(always)]
469    pub fn cmpen(&self) -> CMPEN_R {
470        CMPEN_R::new(((self.bits >> 18) & 1) != 0)
471    }
472    #[doc = "Bit 19 - CSEN Disable Right-Shift"]
473    #[inline(always)]
474    pub fn drsf(&self) -> DRSF_R {
475        DRSF_R::new(((self.bits >> 19) & 1) != 0)
476    }
477    #[doc = "Bit 20 - CSEN DMA Enable Bit"]
478    #[inline(always)]
479    pub fn dmaen(&self) -> DMAEN_R {
480        DMAEN_R::new(((self.bits >> 20) & 1) != 0)
481    }
482    #[doc = "Bit 21 - CSEN Converter Select"]
483    #[inline(always)]
484    pub fn convsel(&self) -> CONVSEL_R {
485        CONVSEL_R::new(((self.bits >> 21) & 1) != 0)
486    }
487    #[doc = "Bit 22 - CSEN Chop Enable"]
488    #[inline(always)]
489    pub fn chopen(&self) -> CHOPEN_R {
490        CHOPEN_R::new(((self.bits >> 22) & 1) != 0)
491    }
492    #[doc = "Bit 23 - CSEN Automatic Ground Enable"]
493    #[inline(always)]
494    pub fn autognd(&self) -> AUTOGND_R {
495        AUTOGND_R::new(((self.bits >> 23) & 1) != 0)
496    }
497    #[doc = "Bit 24 - CSEN Mux Disconnect"]
498    #[inline(always)]
499    pub fn mxuc(&self) -> MXUC_R {
500        MXUC_R::new(((self.bits >> 24) & 1) != 0)
501    }
502    #[doc = "Bit 25 - Greater and Less Than Comparison Using the Exponential Moving Average (EMA) is Enabled"]
503    #[inline(always)]
504    pub fn emacmpen(&self) -> EMACMPEN_R {
505        EMACMPEN_R::new(((self.bits >> 25) & 1) != 0)
506    }
507    #[doc = "Bit 26 - Select Warmup Mode for CSEN"]
508    #[inline(always)]
509    pub fn warmupmode(&self) -> WARMUPMODE_R {
510        WARMUPMODE_R::new(((self.bits >> 26) & 1) != 0)
511    }
512    #[doc = "Bit 27 - Local Sensing Enable"]
513    #[inline(always)]
514    pub fn localsens(&self) -> LOCALSENS_R {
515        LOCALSENS_R::new(((self.bits >> 27) & 1) != 0)
516    }
517    #[doc = "Bit 28 - Charge Pump Accuracy"]
518    #[inline(always)]
519    pub fn cpaccuracy(&self) -> CPACCURACY_R {
520        CPACCURACY_R::new(((self.bits >> 28) & 1) != 0)
521    }
522}
523impl W {
524    #[doc = "Bit 1 - CSEN Enable"]
525    #[inline(always)]
526    pub fn en(&mut self) -> EN_W {
527        EN_W::new(self)
528    }
529    #[doc = "Bit 2 - CSEN Digital Comparator Polarity Select"]
530    #[inline(always)]
531    pub fn cmppol(&mut self) -> CMPPOL_W {
532        CMPPOL_W::new(self)
533    }
534    #[doc = "Bits 4:5 - CSEN Conversion Mode Select"]
535    #[inline(always)]
536    pub fn cm(&mut self) -> CM_W {
537        CM_W::new(self)
538    }
539    #[doc = "Bits 8:9 - SAR Conversion Resolution."]
540    #[inline(always)]
541    pub fn sarcr(&mut self) -> SARCR_W {
542        SARCR_W::new(self)
543    }
544    #[doc = "Bits 12:14 - CSEN Accumulator Mode Select"]
545    #[inline(always)]
546    pub fn acu(&mut self) -> ACU_W {
547        ACU_W::new(self)
548    }
549    #[doc = "Bit 15 - CSEN Multiple Channel Enable"]
550    #[inline(always)]
551    pub fn mcen(&mut self) -> MCEN_W {
552        MCEN_W::new(self)
553    }
554    #[doc = "Bits 16:17 - Start Trigger Select"]
555    #[inline(always)]
556    pub fn stm(&mut self) -> STM_W {
557        STM_W::new(self)
558    }
559    #[doc = "Bit 18 - CSEN Digital Comparator Enable"]
560    #[inline(always)]
561    pub fn cmpen(&mut self) -> CMPEN_W {
562        CMPEN_W::new(self)
563    }
564    #[doc = "Bit 19 - CSEN Disable Right-Shift"]
565    #[inline(always)]
566    pub fn drsf(&mut self) -> DRSF_W {
567        DRSF_W::new(self)
568    }
569    #[doc = "Bit 20 - CSEN DMA Enable Bit"]
570    #[inline(always)]
571    pub fn dmaen(&mut self) -> DMAEN_W {
572        DMAEN_W::new(self)
573    }
574    #[doc = "Bit 21 - CSEN Converter Select"]
575    #[inline(always)]
576    pub fn convsel(&mut self) -> CONVSEL_W {
577        CONVSEL_W::new(self)
578    }
579    #[doc = "Bit 22 - CSEN Chop Enable"]
580    #[inline(always)]
581    pub fn chopen(&mut self) -> CHOPEN_W {
582        CHOPEN_W::new(self)
583    }
584    #[doc = "Bit 23 - CSEN Automatic Ground Enable"]
585    #[inline(always)]
586    pub fn autognd(&mut self) -> AUTOGND_W {
587        AUTOGND_W::new(self)
588    }
589    #[doc = "Bit 24 - CSEN Mux Disconnect"]
590    #[inline(always)]
591    pub fn mxuc(&mut self) -> MXUC_W {
592        MXUC_W::new(self)
593    }
594    #[doc = "Bit 25 - Greater and Less Than Comparison Using the Exponential Moving Average (EMA) is Enabled"]
595    #[inline(always)]
596    pub fn emacmpen(&mut self) -> EMACMPEN_W {
597        EMACMPEN_W::new(self)
598    }
599    #[doc = "Bit 26 - Select Warmup Mode for CSEN"]
600    #[inline(always)]
601    pub fn warmupmode(&mut self) -> WARMUPMODE_W {
602        WARMUPMODE_W::new(self)
603    }
604    #[doc = "Bit 27 - Local Sensing Enable"]
605    #[inline(always)]
606    pub fn localsens(&mut self) -> LOCALSENS_W {
607        LOCALSENS_W::new(self)
608    }
609    #[doc = "Bit 28 - Charge Pump Accuracy"]
610    #[inline(always)]
611    pub fn cpaccuracy(&mut self) -> CPACCURACY_W {
612        CPACCURACY_W::new(self)
613    }
614    #[doc = "Writes raw bits to the register."]
615    #[inline(always)]
616    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
617        self.0.bits(bits);
618        self
619    }
620}
621#[doc = "Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"]
622pub struct CTRL_SPEC;
623impl crate::RegisterSpec for CTRL_SPEC {
624    type Ux = u32;
625}
626#[doc = "`read()` method returns [ctrl::R](R) reader structure"]
627impl crate::Readable for CTRL_SPEC {
628    type Reader = R;
629}
630#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"]
631impl crate::Writable for CTRL_SPEC {
632    type Writer = W;
633}
634#[doc = "`reset()` method sets CTRL to value 0x0003_0000"]
635impl crate::Resettable for CTRL_SPEC {
636    #[inline(always)]
637    fn reset_value() -> Self::Ux {
638        0x0003_0000
639    }
640}
efm32tg11b540_pac/csen/ctrl.rs

efm32tg11b540_pac/csen/
ctrl.rs
