efm32tg11b540_pac/vdac0/
opa2_ctrl.rs1#[doc = "Register `OPA2_CTRL` reader"]
2pub struct R(crate::R<OPA2_CTRL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<OPA2_CTRL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<OPA2_CTRL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<OPA2_CTRL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `OPA2_CTRL` writer"]
17pub struct W(crate::W<OPA2_CTRL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<OPA2_CTRL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<OPA2_CTRL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<OPA2_CTRL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "OPAx Operation Mode\n\nValue on reset: 2"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum DRIVESTRENGTH_A {
41 #[doc = "0: Lower accuracy with Low drive strength."]
42 _0 = 0,
43 #[doc = "1: Low accuracy with Low drive strength."]
44 _1 = 1,
45 #[doc = "2: High accuracy with High drive strength."]
46 _2 = 2,
47 #[doc = "3: Higher accuracy with High drive strength."]
48 _3 = 3,
49}
50impl From<DRIVESTRENGTH_A> for u8 {
51 #[inline(always)]
52 fn from(variant: DRIVESTRENGTH_A) -> Self {
53 variant as _
54 }
55}
56#[doc = "Field `DRIVESTRENGTH` reader - OPAx Operation Mode"]
57pub type DRIVESTRENGTH_R = crate::FieldReader<u8, DRIVESTRENGTH_A>;
58impl DRIVESTRENGTH_R {
59 #[doc = "Get enumerated values variant"]
60 #[inline(always)]
61 pub fn variant(&self) -> DRIVESTRENGTH_A {
62 match self.bits {
63 0 => DRIVESTRENGTH_A::_0,
64 1 => DRIVESTRENGTH_A::_1,
65 2 => DRIVESTRENGTH_A::_2,
66 3 => DRIVESTRENGTH_A::_3,
67 _ => unreachable!(),
68 }
69 }
70 #[doc = "Checks if the value of the field is `_0`"]
71 #[inline(always)]
72 pub fn is_0(&self) -> bool {
73 *self == DRIVESTRENGTH_A::_0
74 }
75 #[doc = "Checks if the value of the field is `_1`"]
76 #[inline(always)]
77 pub fn is_1(&self) -> bool {
78 *self == DRIVESTRENGTH_A::_1
79 }
80 #[doc = "Checks if the value of the field is `_2`"]
81 #[inline(always)]
82 pub fn is_2(&self) -> bool {
83 *self == DRIVESTRENGTH_A::_2
84 }
85 #[doc = "Checks if the value of the field is `_3`"]
86 #[inline(always)]
87 pub fn is_3(&self) -> bool {
88 *self == DRIVESTRENGTH_A::_3
89 }
90}
91#[doc = "Field `DRIVESTRENGTH` writer - OPAx Operation Mode"]
92pub type DRIVESTRENGTH_W<'a> =
93 crate::FieldWriterSafe<'a, u32, OPA2_CTRL_SPEC, u8, DRIVESTRENGTH_A, 2, 0>;
94impl<'a> DRIVESTRENGTH_W<'a> {
95 #[doc = "Lower accuracy with Low drive strength."]
96 #[inline(always)]
97 pub fn _0(self) -> &'a mut W {
98 self.variant(DRIVESTRENGTH_A::_0)
99 }
100 #[doc = "Low accuracy with Low drive strength."]
101 #[inline(always)]
102 pub fn _1(self) -> &'a mut W {
103 self.variant(DRIVESTRENGTH_A::_1)
104 }
105 #[doc = "High accuracy with High drive strength."]
106 #[inline(always)]
107 pub fn _2(self) -> &'a mut W {
108 self.variant(DRIVESTRENGTH_A::_2)
109 }
110 #[doc = "Higher accuracy with High drive strength."]
111 #[inline(always)]
112 pub fn _3(self) -> &'a mut W {
113 self.variant(DRIVESTRENGTH_A::_3)
114 }
115}
116#[doc = "Field `INCBW` reader - OPAx Unity Gain Bandwidth Scale"]
117pub type INCBW_R = crate::BitReader<bool>;
118#[doc = "Field `INCBW` writer - OPAx Unity Gain Bandwidth Scale"]
119pub type INCBW_W<'a> = crate::BitWriter<'a, u32, OPA2_CTRL_SPEC, bool, 2>;
120#[doc = "Field `HCMDIS` reader - High Common Mode Disable"]
121pub type HCMDIS_R = crate::BitReader<bool>;
122#[doc = "Field `HCMDIS` writer - High Common Mode Disable"]
123pub type HCMDIS_W<'a> = crate::BitWriter<'a, u32, OPA2_CTRL_SPEC, bool, 3>;
124#[doc = "Field `OUTSCALE` reader - Scale OPAx Output Driving Strength"]
125pub type OUTSCALE_R = crate::BitReader<bool>;
126#[doc = "Field `OUTSCALE` writer - Scale OPAx Output Driving Strength"]
127pub type OUTSCALE_W<'a> = crate::BitWriter<'a, u32, OPA2_CTRL_SPEC, bool, 4>;
128#[doc = "Field `PRSEN` reader - OPAx PRS Trigger Enable"]
129pub type PRSEN_R = crate::BitReader<bool>;
130#[doc = "Field `PRSEN` writer - OPAx PRS Trigger Enable"]
131pub type PRSEN_W<'a> = crate::BitWriter<'a, u32, OPA2_CTRL_SPEC, bool, 8>;
132#[doc = "Field `PRSMODE` reader - OPAx PRS Trigger Mode"]
133pub type PRSMODE_R = crate::BitReader<bool>;
134#[doc = "Field `PRSMODE` writer - OPAx PRS Trigger Mode"]
135pub type PRSMODE_W<'a> = crate::BitWriter<'a, u32, OPA2_CTRL_SPEC, bool, 9>;
136#[doc = "OPAx PRS Trigger Select\n\nValue on reset: 0"]
137#[derive(Clone, Copy, Debug, PartialEq)]
138#[repr(u8)]
139pub enum PRSSEL_A {
140 #[doc = "0: PRS ch 0 triggers OPA."]
141 PRSCH0 = 0,
142 #[doc = "1: PRS ch 1 triggers OPA."]
143 PRSCH1 = 1,
144 #[doc = "2: PRS ch 2 triggers OPA."]
145 PRSCH2 = 2,
146 #[doc = "3: PRS ch 3 triggers OPA."]
147 PRSCH3 = 3,
148 #[doc = "4: PRS ch 4 triggers OPA."]
149 PRSCH4 = 4,
150 #[doc = "5: PRS ch 5 triggers OPA."]
151 PRSCH5 = 5,
152 #[doc = "6: PRS ch 6 triggers OPA."]
153 PRSCH6 = 6,
154 #[doc = "7: PRS ch 7 triggers OPA."]
155 PRSCH7 = 7,
156}
157impl From<PRSSEL_A> for u8 {
158 #[inline(always)]
159 fn from(variant: PRSSEL_A) -> Self {
160 variant as _
161 }
162}
163#[doc = "Field `PRSSEL` reader - OPAx PRS Trigger Select"]
164pub type PRSSEL_R = crate::FieldReader<u8, PRSSEL_A>;
165impl PRSSEL_R {
166 #[doc = "Get enumerated values variant"]
167 #[inline(always)]
168 pub fn variant(&self) -> PRSSEL_A {
169 match self.bits {
170 0 => PRSSEL_A::PRSCH0,
171 1 => PRSSEL_A::PRSCH1,
172 2 => PRSSEL_A::PRSCH2,
173 3 => PRSSEL_A::PRSCH3,
174 4 => PRSSEL_A::PRSCH4,
175 5 => PRSSEL_A::PRSCH5,
176 6 => PRSSEL_A::PRSCH6,
177 7 => PRSSEL_A::PRSCH7,
178 _ => unreachable!(),
179 }
180 }
181 #[doc = "Checks if the value of the field is `PRSCH0`"]
182 #[inline(always)]
183 pub fn is_prsch0(&self) -> bool {
184 *self == PRSSEL_A::PRSCH0
185 }
186 #[doc = "Checks if the value of the field is `PRSCH1`"]
187 #[inline(always)]
188 pub fn is_prsch1(&self) -> bool {
189 *self == PRSSEL_A::PRSCH1
190 }
191 #[doc = "Checks if the value of the field is `PRSCH2`"]
192 #[inline(always)]
193 pub fn is_prsch2(&self) -> bool {
194 *self == PRSSEL_A::PRSCH2
195 }
196 #[doc = "Checks if the value of the field is `PRSCH3`"]
197 #[inline(always)]
198 pub fn is_prsch3(&self) -> bool {
199 *self == PRSSEL_A::PRSCH3
200 }
201 #[doc = "Checks if the value of the field is `PRSCH4`"]
202 #[inline(always)]
203 pub fn is_prsch4(&self) -> bool {
204 *self == PRSSEL_A::PRSCH4
205 }
206 #[doc = "Checks if the value of the field is `PRSCH5`"]
207 #[inline(always)]
208 pub fn is_prsch5(&self) -> bool {
209 *self == PRSSEL_A::PRSCH5
210 }
211 #[doc = "Checks if the value of the field is `PRSCH6`"]
212 #[inline(always)]
213 pub fn is_prsch6(&self) -> bool {
214 *self == PRSSEL_A::PRSCH6
215 }
216 #[doc = "Checks if the value of the field is `PRSCH7`"]
217 #[inline(always)]
218 pub fn is_prsch7(&self) -> bool {
219 *self == PRSSEL_A::PRSCH7
220 }
221}
222#[doc = "Field `PRSSEL` writer - OPAx PRS Trigger Select"]
223pub type PRSSEL_W<'a> = crate::FieldWriterSafe<'a, u32, OPA2_CTRL_SPEC, u8, PRSSEL_A, 3, 10>;
224impl<'a> PRSSEL_W<'a> {
225 #[doc = "PRS ch 0 triggers OPA."]
226 #[inline(always)]
227 pub fn prsch0(self) -> &'a mut W {
228 self.variant(PRSSEL_A::PRSCH0)
229 }
230 #[doc = "PRS ch 1 triggers OPA."]
231 #[inline(always)]
232 pub fn prsch1(self) -> &'a mut W {
233 self.variant(PRSSEL_A::PRSCH1)
234 }
235 #[doc = "PRS ch 2 triggers OPA."]
236 #[inline(always)]
237 pub fn prsch2(self) -> &'a mut W {
238 self.variant(PRSSEL_A::PRSCH2)
239 }
240 #[doc = "PRS ch 3 triggers OPA."]
241 #[inline(always)]
242 pub fn prsch3(self) -> &'a mut W {
243 self.variant(PRSSEL_A::PRSCH3)
244 }
245 #[doc = "PRS ch 4 triggers OPA."]
246 #[inline(always)]
247 pub fn prsch4(self) -> &'a mut W {
248 self.variant(PRSSEL_A::PRSCH4)
249 }
250 #[doc = "PRS ch 5 triggers OPA."]
251 #[inline(always)]
252 pub fn prsch5(self) -> &'a mut W {
253 self.variant(PRSSEL_A::PRSCH5)
254 }
255 #[doc = "PRS ch 6 triggers OPA."]
256 #[inline(always)]
257 pub fn prsch6(self) -> &'a mut W {
258 self.variant(PRSSEL_A::PRSCH6)
259 }
260 #[doc = "PRS ch 7 triggers OPA."]
261 #[inline(always)]
262 pub fn prsch7(self) -> &'a mut W {
263 self.variant(PRSSEL_A::PRSCH7)
264 }
265}
266#[doc = "Field `PRSOUTMODE` reader - OPAx PRS Output Select"]
267pub type PRSOUTMODE_R = crate::BitReader<bool>;
268#[doc = "Field `PRSOUTMODE` writer - OPAx PRS Output Select"]
269pub type PRSOUTMODE_W<'a> = crate::BitWriter<'a, u32, OPA2_CTRL_SPEC, bool, 16>;
270#[doc = "Field `APORTXMASTERDIS` reader - APORT Bus Master Disable"]
271pub type APORTXMASTERDIS_R = crate::BitReader<bool>;
272#[doc = "Field `APORTXMASTERDIS` writer - APORT Bus Master Disable"]
273pub type APORTXMASTERDIS_W<'a> = crate::BitWriter<'a, u32, OPA2_CTRL_SPEC, bool, 20>;
274#[doc = "Field `APORTYMASTERDIS` reader - APORT Bus Master Disable"]
275pub type APORTYMASTERDIS_R = crate::BitReader<bool>;
276#[doc = "Field `APORTYMASTERDIS` writer - APORT Bus Master Disable"]
277pub type APORTYMASTERDIS_W<'a> = crate::BitWriter<'a, u32, OPA2_CTRL_SPEC, bool, 21>;
278impl R {
279 #[doc = "Bits 0:1 - OPAx Operation Mode"]
280 #[inline(always)]
281 pub fn drivestrength(&self) -> DRIVESTRENGTH_R {
282 DRIVESTRENGTH_R::new((self.bits & 3) as u8)
283 }
284 #[doc = "Bit 2 - OPAx Unity Gain Bandwidth Scale"]
285 #[inline(always)]
286 pub fn incbw(&self) -> INCBW_R {
287 INCBW_R::new(((self.bits >> 2) & 1) != 0)
288 }
289 #[doc = "Bit 3 - High Common Mode Disable"]
290 #[inline(always)]
291 pub fn hcmdis(&self) -> HCMDIS_R {
292 HCMDIS_R::new(((self.bits >> 3) & 1) != 0)
293 }
294 #[doc = "Bit 4 - Scale OPAx Output Driving Strength"]
295 #[inline(always)]
296 pub fn outscale(&self) -> OUTSCALE_R {
297 OUTSCALE_R::new(((self.bits >> 4) & 1) != 0)
298 }
299 #[doc = "Bit 8 - OPAx PRS Trigger Enable"]
300 #[inline(always)]
301 pub fn prsen(&self) -> PRSEN_R {
302 PRSEN_R::new(((self.bits >> 8) & 1) != 0)
303 }
304 #[doc = "Bit 9 - OPAx PRS Trigger Mode"]
305 #[inline(always)]
306 pub fn prsmode(&self) -> PRSMODE_R {
307 PRSMODE_R::new(((self.bits >> 9) & 1) != 0)
308 }
309 #[doc = "Bits 10:12 - OPAx PRS Trigger Select"]
310 #[inline(always)]
311 pub fn prssel(&self) -> PRSSEL_R {
312 PRSSEL_R::new(((self.bits >> 10) & 7) as u8)
313 }
314 #[doc = "Bit 16 - OPAx PRS Output Select"]
315 #[inline(always)]
316 pub fn prsoutmode(&self) -> PRSOUTMODE_R {
317 PRSOUTMODE_R::new(((self.bits >> 16) & 1) != 0)
318 }
319 #[doc = "Bit 20 - APORT Bus Master Disable"]
320 #[inline(always)]
321 pub fn aportxmasterdis(&self) -> APORTXMASTERDIS_R {
322 APORTXMASTERDIS_R::new(((self.bits >> 20) & 1) != 0)
323 }
324 #[doc = "Bit 21 - APORT Bus Master Disable"]
325 #[inline(always)]
326 pub fn aportymasterdis(&self) -> APORTYMASTERDIS_R {
327 APORTYMASTERDIS_R::new(((self.bits >> 21) & 1) != 0)
328 }
329}
330impl W {
331 #[doc = "Bits 0:1 - OPAx Operation Mode"]
332 #[inline(always)]
333 pub fn drivestrength(&mut self) -> DRIVESTRENGTH_W {
334 DRIVESTRENGTH_W::new(self)
335 }
336 #[doc = "Bit 2 - OPAx Unity Gain Bandwidth Scale"]
337 #[inline(always)]
338 pub fn incbw(&mut self) -> INCBW_W {
339 INCBW_W::new(self)
340 }
341 #[doc = "Bit 3 - High Common Mode Disable"]
342 #[inline(always)]
343 pub fn hcmdis(&mut self) -> HCMDIS_W {
344 HCMDIS_W::new(self)
345 }
346 #[doc = "Bit 4 - Scale OPAx Output Driving Strength"]
347 #[inline(always)]
348 pub fn outscale(&mut self) -> OUTSCALE_W {
349 OUTSCALE_W::new(self)
350 }
351 #[doc = "Bit 8 - OPAx PRS Trigger Enable"]
352 #[inline(always)]
353 pub fn prsen(&mut self) -> PRSEN_W {
354 PRSEN_W::new(self)
355 }
356 #[doc = "Bit 9 - OPAx PRS Trigger Mode"]
357 #[inline(always)]
358 pub fn prsmode(&mut self) -> PRSMODE_W {
359 PRSMODE_W::new(self)
360 }
361 #[doc = "Bits 10:12 - OPAx PRS Trigger Select"]
362 #[inline(always)]
363 pub fn prssel(&mut self) -> PRSSEL_W {
364 PRSSEL_W::new(self)
365 }
366 #[doc = "Bit 16 - OPAx PRS Output Select"]
367 #[inline(always)]
368 pub fn prsoutmode(&mut self) -> PRSOUTMODE_W {
369 PRSOUTMODE_W::new(self)
370 }
371 #[doc = "Bit 20 - APORT Bus Master Disable"]
372 #[inline(always)]
373 pub fn aportxmasterdis(&mut self) -> APORTXMASTERDIS_W {
374 APORTXMASTERDIS_W::new(self)
375 }
376 #[doc = "Bit 21 - APORT Bus Master Disable"]
377 #[inline(always)]
378 pub fn aportymasterdis(&mut self) -> APORTYMASTERDIS_W {
379 APORTYMASTERDIS_W::new(self)
380 }
381 #[doc = "Writes raw bits to the register."]
382 #[inline(always)]
383 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
384 self.0.bits(bits);
385 self
386 }
387}
388#[doc = "Operational Amplifier Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [opa2_ctrl](index.html) module"]
389pub struct OPA2_CTRL_SPEC;
390impl crate::RegisterSpec for OPA2_CTRL_SPEC {
391 type Ux = u32;
392}
393#[doc = "`read()` method returns [opa2_ctrl::R](R) reader structure"]
394impl crate::Readable for OPA2_CTRL_SPEC {
395 type Reader = R;
396}
397#[doc = "`write(|w| ..)` method takes [opa2_ctrl::W](W) writer structure"]
398impl crate::Writable for OPA2_CTRL_SPEC {
399 type Writer = W;
400}
401#[doc = "`reset()` method sets OPA2_CTRL to value 0x0e"]
402impl crate::Resettable for OPA2_CTRL_SPEC {
403 #[inline(always)]
404 fn reset_value() -> Self::Ux {
405 0x0e
406 }
407}