efm32tg11b320_pac/csen/
timctrl.rs1#[doc = "Register `TIMCTRL` reader"]
2pub struct R(crate::R<TIMCTRL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<TIMCTRL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<TIMCTRL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<TIMCTRL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `TIMCTRL` writer"]
17pub struct W(crate::W<TIMCTRL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<TIMCTRL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<TIMCTRL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<TIMCTRL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Period Counter Prescaler\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum PCPRESC_A {
41 #[doc = "0: The period counter clock frequency is LFBCLKCSEN/1"]
42 DIV1 = 0,
43 #[doc = "1: The period counter clock frequency is LFBCLKCSEN/2"]
44 DIV2 = 1,
45 #[doc = "2: The period counter clock frequency is LFBCLKCSEN/4"]
46 DIV4 = 2,
47 #[doc = "3: The period counter clock frequency is LFBCLKCSEN/8"]
48 DIV8 = 3,
49 #[doc = "4: The period counter clock frequency is LFBCLKCSEN/16"]
50 DIV16 = 4,
51 #[doc = "5: The period counter clock frequency is LFBCLKCSEN/32"]
52 DIV32 = 5,
53 #[doc = "6: The period counter clock frequency is LFBCLKCSEN/64"]
54 DIV64 = 6,
55 #[doc = "7: The period counter clock frequency is LFBCLKCSEN/128"]
56 DIV128 = 7,
57}
58impl From<PCPRESC_A> for u8 {
59 #[inline(always)]
60 fn from(variant: PCPRESC_A) -> Self {
61 variant as _
62 }
63}
64#[doc = "Field `PCPRESC` reader - Period Counter Prescaler"]
65pub type PCPRESC_R = crate::FieldReader<u8, PCPRESC_A>;
66impl PCPRESC_R {
67 #[doc = "Get enumerated values variant"]
68 #[inline(always)]
69 pub fn variant(&self) -> PCPRESC_A {
70 match self.bits {
71 0 => PCPRESC_A::DIV1,
72 1 => PCPRESC_A::DIV2,
73 2 => PCPRESC_A::DIV4,
74 3 => PCPRESC_A::DIV8,
75 4 => PCPRESC_A::DIV16,
76 5 => PCPRESC_A::DIV32,
77 6 => PCPRESC_A::DIV64,
78 7 => PCPRESC_A::DIV128,
79 _ => unreachable!(),
80 }
81 }
82 #[doc = "Checks if the value of the field is `DIV1`"]
83 #[inline(always)]
84 pub fn is_div1(&self) -> bool {
85 *self == PCPRESC_A::DIV1
86 }
87 #[doc = "Checks if the value of the field is `DIV2`"]
88 #[inline(always)]
89 pub fn is_div2(&self) -> bool {
90 *self == PCPRESC_A::DIV2
91 }
92 #[doc = "Checks if the value of the field is `DIV4`"]
93 #[inline(always)]
94 pub fn is_div4(&self) -> bool {
95 *self == PCPRESC_A::DIV4
96 }
97 #[doc = "Checks if the value of the field is `DIV8`"]
98 #[inline(always)]
99 pub fn is_div8(&self) -> bool {
100 *self == PCPRESC_A::DIV8
101 }
102 #[doc = "Checks if the value of the field is `DIV16`"]
103 #[inline(always)]
104 pub fn is_div16(&self) -> bool {
105 *self == PCPRESC_A::DIV16
106 }
107 #[doc = "Checks if the value of the field is `DIV32`"]
108 #[inline(always)]
109 pub fn is_div32(&self) -> bool {
110 *self == PCPRESC_A::DIV32
111 }
112 #[doc = "Checks if the value of the field is `DIV64`"]
113 #[inline(always)]
114 pub fn is_div64(&self) -> bool {
115 *self == PCPRESC_A::DIV64
116 }
117 #[doc = "Checks if the value of the field is `DIV128`"]
118 #[inline(always)]
119 pub fn is_div128(&self) -> bool {
120 *self == PCPRESC_A::DIV128
121 }
122}
123#[doc = "Field `PCPRESC` writer - Period Counter Prescaler"]
124pub type PCPRESC_W<'a> = crate::FieldWriterSafe<'a, u32, TIMCTRL_SPEC, u8, PCPRESC_A, 3, 0>;
125impl<'a> PCPRESC_W<'a> {
126 #[doc = "The period counter clock frequency is LFBCLKCSEN/1"]
127 #[inline(always)]
128 pub fn div1(self) -> &'a mut W {
129 self.variant(PCPRESC_A::DIV1)
130 }
131 #[doc = "The period counter clock frequency is LFBCLKCSEN/2"]
132 #[inline(always)]
133 pub fn div2(self) -> &'a mut W {
134 self.variant(PCPRESC_A::DIV2)
135 }
136 #[doc = "The period counter clock frequency is LFBCLKCSEN/4"]
137 #[inline(always)]
138 pub fn div4(self) -> &'a mut W {
139 self.variant(PCPRESC_A::DIV4)
140 }
141 #[doc = "The period counter clock frequency is LFBCLKCSEN/8"]
142 #[inline(always)]
143 pub fn div8(self) -> &'a mut W {
144 self.variant(PCPRESC_A::DIV8)
145 }
146 #[doc = "The period counter clock frequency is LFBCLKCSEN/16"]
147 #[inline(always)]
148 pub fn div16(self) -> &'a mut W {
149 self.variant(PCPRESC_A::DIV16)
150 }
151 #[doc = "The period counter clock frequency is LFBCLKCSEN/32"]
152 #[inline(always)]
153 pub fn div32(self) -> &'a mut W {
154 self.variant(PCPRESC_A::DIV32)
155 }
156 #[doc = "The period counter clock frequency is LFBCLKCSEN/64"]
157 #[inline(always)]
158 pub fn div64(self) -> &'a mut W {
159 self.variant(PCPRESC_A::DIV64)
160 }
161 #[doc = "The period counter clock frequency is LFBCLKCSEN/128"]
162 #[inline(always)]
163 pub fn div128(self) -> &'a mut W {
164 self.variant(PCPRESC_A::DIV128)
165 }
166}
167#[doc = "Field `PCTOP` reader - Period Counter Top Value"]
168pub type PCTOP_R = crate::FieldReader<u8, u8>;
169#[doc = "Field `PCTOP` writer - Period Counter Top Value"]
170pub type PCTOP_W<'a> = crate::FieldWriter<'a, u32, TIMCTRL_SPEC, u8, u8, 8, 8>;
171#[doc = "Field `WARMUPCNT` reader - Warmup Period Counter"]
172pub type WARMUPCNT_R = crate::FieldReader<u8, u8>;
173#[doc = "Field `WARMUPCNT` writer - Warmup Period Counter"]
174pub type WARMUPCNT_W<'a> = crate::FieldWriter<'a, u32, TIMCTRL_SPEC, u8, u8, 2, 16>;
175impl R {
176 #[doc = "Bits 0:2 - Period Counter Prescaler"]
177 #[inline(always)]
178 pub fn pcpresc(&self) -> PCPRESC_R {
179 PCPRESC_R::new((self.bits & 7) as u8)
180 }
181 #[doc = "Bits 8:15 - Period Counter Top Value"]
182 #[inline(always)]
183 pub fn pctop(&self) -> PCTOP_R {
184 PCTOP_R::new(((self.bits >> 8) & 0xff) as u8)
185 }
186 #[doc = "Bits 16:17 - Warmup Period Counter"]
187 #[inline(always)]
188 pub fn warmupcnt(&self) -> WARMUPCNT_R {
189 WARMUPCNT_R::new(((self.bits >> 16) & 3) as u8)
190 }
191}
192impl W {
193 #[doc = "Bits 0:2 - Period Counter Prescaler"]
194 #[inline(always)]
195 pub fn pcpresc(&mut self) -> PCPRESC_W {
196 PCPRESC_W::new(self)
197 }
198 #[doc = "Bits 8:15 - Period Counter Top Value"]
199 #[inline(always)]
200 pub fn pctop(&mut self) -> PCTOP_W {
201 PCTOP_W::new(self)
202 }
203 #[doc = "Bits 16:17 - Warmup Period Counter"]
204 #[inline(always)]
205 pub fn warmupcnt(&mut self) -> WARMUPCNT_W {
206 WARMUPCNT_W::new(self)
207 }
208 #[doc = "Writes raw bits to the register."]
209 #[inline(always)]
210 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
211 self.0.bits(bits);
212 self
213 }
214}
215#[doc = "Timing Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timctrl](index.html) module"]
216pub struct TIMCTRL_SPEC;
217impl crate::RegisterSpec for TIMCTRL_SPEC {
218 type Ux = u32;
219}
220#[doc = "`read()` method returns [timctrl::R](R) reader structure"]
221impl crate::Readable for TIMCTRL_SPEC {
222 type Reader = R;
223}
224#[doc = "`write(|w| ..)` method takes [timctrl::W](W) writer structure"]
225impl crate::Writable for TIMCTRL_SPEC {
226 type Writer = W;
227}
228#[doc = "`reset()` method sets TIMCTRL to value 0"]
229impl crate::Resettable for TIMCTRL_SPEC {
230 #[inline(always)]
231 fn reset_value() -> Self::Ux {
232 0
233 }
234}