efm32pg1b_pac/
timer0.rs

1#[repr(C)]
2#[derive(Debug)]
3///Register block
4pub struct RegisterBlock {
5    ctrl: Ctrl,
6    cmd: Cmd,
7    status: Status,
8    ifl: Ifl,
9    ifs: Ifs,
10    ifc: Ifc,
11    ien: Ien,
12    top: Top,
13    topb: Topb,
14    cnt: Cnt,
15    _reserved10: [u8; 0x04],
16    lock: Lock,
17    routepen: Routepen,
18    routeloc0: Routeloc0,
19    _reserved13: [u8; 0x04],
20    routeloc2: Routeloc2,
21    _reserved14: [u8; 0x20],
22    cc0_ctrl: Cc0Ctrl,
23    cc0_ccv: Cc0Ccv,
24    cc0_ccvp: Cc0Ccvp,
25    cc0_ccvb: Cc0Ccvb,
26    cc1_ctrl: Cc1Ctrl,
27    cc1_ccv: Cc1Ccv,
28    cc1_ccvp: Cc1Ccvp,
29    cc1_ccvb: Cc1Ccvb,
30    cc2_ctrl: Cc2Ctrl,
31    cc2_ccv: Cc2Ccv,
32    cc2_ccvp: Cc2Ccvp,
33    cc2_ccvb: Cc2Ccvb,
34    cc3_ctrl: Cc3Ctrl,
35    cc3_ccv: Cc3Ccv,
36    cc3_ccvp: Cc3Ccvp,
37    cc3_ccvb: Cc3Ccvb,
38    dtctrl: Dtctrl,
39    dttime: Dttime,
40    dtfc: Dtfc,
41    dtogen: Dtogen,
42    dtfault: Dtfault,
43    dtfaultc: Dtfaultc,
44    dtlock: Dtlock,
45}
46impl RegisterBlock {
47    ///0x00 - Control Register
48    #[inline(always)]
49    pub const fn ctrl(&self) -> &Ctrl {
50        &self.ctrl
51    }
52    ///0x04 - Command Register
53    #[inline(always)]
54    pub const fn cmd(&self) -> &Cmd {
55        &self.cmd
56    }
57    ///0x08 - Status Register
58    #[inline(always)]
59    pub const fn status(&self) -> &Status {
60        &self.status
61    }
62    ///0x0c - Interrupt Flag Register
63    #[inline(always)]
64    pub const fn ifl(&self) -> &Ifl {
65        &self.ifl
66    }
67    ///0x10 - Interrupt Flag Set Register
68    #[inline(always)]
69    pub const fn ifs(&self) -> &Ifs {
70        &self.ifs
71    }
72    ///0x14 - Interrupt Flag Clear Register
73    #[inline(always)]
74    pub const fn ifc(&self) -> &Ifc {
75        &self.ifc
76    }
77    ///0x18 - Interrupt Enable Register
78    #[inline(always)]
79    pub const fn ien(&self) -> &Ien {
80        &self.ien
81    }
82    ///0x1c - Counter Top Value Register
83    #[inline(always)]
84    pub const fn top(&self) -> &Top {
85        &self.top
86    }
87    ///0x20 - Counter Top Value Buffer Register
88    #[inline(always)]
89    pub const fn topb(&self) -> &Topb {
90        &self.topb
91    }
92    ///0x24 - Counter Value Register
93    #[inline(always)]
94    pub const fn cnt(&self) -> &Cnt {
95        &self.cnt
96    }
97    ///0x2c - TIMER Configuration Lock Register
98    #[inline(always)]
99    pub const fn lock(&self) -> &Lock {
100        &self.lock
101    }
102    ///0x30 - I/O Routing Pin Enable Register
103    #[inline(always)]
104    pub const fn routepen(&self) -> &Routepen {
105        &self.routepen
106    }
107    ///0x34 - I/O Routing Location Register
108    #[inline(always)]
109    pub const fn routeloc0(&self) -> &Routeloc0 {
110        &self.routeloc0
111    }
112    ///0x3c - I/O Routing Location Register
113    #[inline(always)]
114    pub const fn routeloc2(&self) -> &Routeloc2 {
115        &self.routeloc2
116    }
117    ///0x60 - CC Channel Control Register
118    #[inline(always)]
119    pub const fn cc0_ctrl(&self) -> &Cc0Ctrl {
120        &self.cc0_ctrl
121    }
122    ///0x64 - CC Channel Value Register
123    #[inline(always)]
124    pub const fn cc0_ccv(&self) -> &Cc0Ccv {
125        &self.cc0_ccv
126    }
127    ///0x68 - CC Channel Value Peek Register
128    #[inline(always)]
129    pub const fn cc0_ccvp(&self) -> &Cc0Ccvp {
130        &self.cc0_ccvp
131    }
132    ///0x6c - CC Channel Buffer Register
133    #[inline(always)]
134    pub const fn cc0_ccvb(&self) -> &Cc0Ccvb {
135        &self.cc0_ccvb
136    }
137    ///0x70 - CC Channel Control Register
138    #[inline(always)]
139    pub const fn cc1_ctrl(&self) -> &Cc1Ctrl {
140        &self.cc1_ctrl
141    }
142    ///0x74 - CC Channel Value Register
143    #[inline(always)]
144    pub const fn cc1_ccv(&self) -> &Cc1Ccv {
145        &self.cc1_ccv
146    }
147    ///0x78 - CC Channel Value Peek Register
148    #[inline(always)]
149    pub const fn cc1_ccvp(&self) -> &Cc1Ccvp {
150        &self.cc1_ccvp
151    }
152    ///0x7c - CC Channel Buffer Register
153    #[inline(always)]
154    pub const fn cc1_ccvb(&self) -> &Cc1Ccvb {
155        &self.cc1_ccvb
156    }
157    ///0x80 - CC Channel Control Register
158    #[inline(always)]
159    pub const fn cc2_ctrl(&self) -> &Cc2Ctrl {
160        &self.cc2_ctrl
161    }
162    ///0x84 - CC Channel Value Register
163    #[inline(always)]
164    pub const fn cc2_ccv(&self) -> &Cc2Ccv {
165        &self.cc2_ccv
166    }
167    ///0x88 - CC Channel Value Peek Register
168    #[inline(always)]
169    pub const fn cc2_ccvp(&self) -> &Cc2Ccvp {
170        &self.cc2_ccvp
171    }
172    ///0x8c - CC Channel Buffer Register
173    #[inline(always)]
174    pub const fn cc2_ccvb(&self) -> &Cc2Ccvb {
175        &self.cc2_ccvb
176    }
177    ///0x90 - CC Channel Control Register
178    #[inline(always)]
179    pub const fn cc3_ctrl(&self) -> &Cc3Ctrl {
180        &self.cc3_ctrl
181    }
182    ///0x94 - CC Channel Value Register
183    #[inline(always)]
184    pub const fn cc3_ccv(&self) -> &Cc3Ccv {
185        &self.cc3_ccv
186    }
187    ///0x98 - CC Channel Value Peek Register
188    #[inline(always)]
189    pub const fn cc3_ccvp(&self) -> &Cc3Ccvp {
190        &self.cc3_ccvp
191    }
192    ///0x9c - CC Channel Buffer Register
193    #[inline(always)]
194    pub const fn cc3_ccvb(&self) -> &Cc3Ccvb {
195        &self.cc3_ccvb
196    }
197    ///0xa0 - DTI Control Register
198    #[inline(always)]
199    pub const fn dtctrl(&self) -> &Dtctrl {
200        &self.dtctrl
201    }
202    ///0xa4 - DTI Time Control Register
203    #[inline(always)]
204    pub const fn dttime(&self) -> &Dttime {
205        &self.dttime
206    }
207    ///0xa8 - DTI Fault Configuration Register
208    #[inline(always)]
209    pub const fn dtfc(&self) -> &Dtfc {
210        &self.dtfc
211    }
212    ///0xac - DTI Output Generation Enable Register
213    #[inline(always)]
214    pub const fn dtogen(&self) -> &Dtogen {
215        &self.dtogen
216    }
217    ///0xb0 - DTI Fault Register
218    #[inline(always)]
219    pub const fn dtfault(&self) -> &Dtfault {
220        &self.dtfault
221    }
222    ///0xb4 - DTI Fault Clear Register
223    #[inline(always)]
224    pub const fn dtfaultc(&self) -> &Dtfaultc {
225        &self.dtfaultc
226    }
227    ///0xb8 - DTI Configuration Lock Register
228    #[inline(always)]
229    pub const fn dtlock(&self) -> &Dtlock {
230        &self.dtlock
231    }
232}
233///CTRL (rw) register accessor: Control Register
234///
235///You can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
236///
237///For information about available fields see [`mod@ctrl`]
238///module
239#[doc(alias = "CTRL")]
240pub type Ctrl = crate::Reg<ctrl::CTRLrs>;
241///Control Register
242pub mod ctrl;
243///CMD (w) register accessor: Command Register
244///
245///You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
246///
247///For information about available fields see [`mod@cmd`]
248///module
249#[doc(alias = "CMD")]
250pub type Cmd = crate::Reg<cmd::CMDrs>;
251///Command Register
252pub mod cmd;
253///STATUS (r) register accessor: Status Register
254///
255///You can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
256///
257///For information about available fields see [`mod@status`]
258///module
259#[doc(alias = "STATUS")]
260pub type Status = crate::Reg<status::STATUSrs>;
261///Status Register
262pub mod status;
263///IFL (r) register accessor: Interrupt Flag Register
264///
265///You can [`read`](crate::Reg::read) this register and get [`ifl::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
266///
267///For information about available fields see [`mod@ifl`]
268///module
269#[doc(alias = "IFL")]
270pub type Ifl = crate::Reg<ifl::IFLrs>;
271///Interrupt Flag Register
272pub mod ifl;
273///IFS (w) register accessor: Interrupt Flag Set Register
274///
275///You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ifs::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
276///
277///For information about available fields see [`mod@ifs`]
278///module
279#[doc(alias = "IFS")]
280pub type Ifs = crate::Reg<ifs::IFSrs>;
281///Interrupt Flag Set Register
282pub mod ifs;
283///IFC (w) register accessor: Interrupt Flag Clear Register
284///
285///You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ifc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
286///
287///For information about available fields see [`mod@ifc`]
288///module
289#[doc(alias = "IFC")]
290pub type Ifc = crate::Reg<ifc::IFCrs>;
291///Interrupt Flag Clear Register
292pub mod ifc;
293///IEN (rw) register accessor: Interrupt Enable Register
294///
295///You can [`read`](crate::Reg::read) this register and get [`ien::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ien::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
296///
297///For information about available fields see [`mod@ien`]
298///module
299#[doc(alias = "IEN")]
300pub type Ien = crate::Reg<ien::IENrs>;
301///Interrupt Enable Register
302pub mod ien;
303///TOP (rw) register accessor: Counter Top Value Register
304///
305///You can [`read`](crate::Reg::read) this register and get [`top::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`top::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
306///
307///For information about available fields see [`mod@top`]
308///module
309#[doc(alias = "TOP")]
310pub type Top = crate::Reg<top::TOPrs>;
311///Counter Top Value Register
312pub mod top;
313///TOPB (rw) register accessor: Counter Top Value Buffer Register
314///
315///You can [`read`](crate::Reg::read) this register and get [`topb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`topb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
316///
317///For information about available fields see [`mod@topb`]
318///module
319#[doc(alias = "TOPB")]
320pub type Topb = crate::Reg<topb::TOPBrs>;
321///Counter Top Value Buffer Register
322pub mod topb;
323///CNT (rw) register accessor: Counter Value Register
324///
325///You can [`read`](crate::Reg::read) this register and get [`cnt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
326///
327///For information about available fields see [`mod@cnt`]
328///module
329#[doc(alias = "CNT")]
330pub type Cnt = crate::Reg<cnt::CNTrs>;
331///Counter Value Register
332pub mod cnt;
333///LOCK (rw) register accessor: TIMER Configuration Lock Register
334///
335///You can [`read`](crate::Reg::read) this register and get [`lock::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lock::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
336///
337///For information about available fields see [`mod@lock`]
338///module
339#[doc(alias = "LOCK")]
340pub type Lock = crate::Reg<lock::LOCKrs>;
341///TIMER Configuration Lock Register
342pub mod lock;
343///ROUTEPEN (rw) register accessor: I/O Routing Pin Enable Register
344///
345///You can [`read`](crate::Reg::read) this register and get [`routepen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`routepen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
346///
347///For information about available fields see [`mod@routepen`]
348///module
349#[doc(alias = "ROUTEPEN")]
350pub type Routepen = crate::Reg<routepen::ROUTEPENrs>;
351///I/O Routing Pin Enable Register
352pub mod routepen;
353///ROUTELOC0 (rw) register accessor: I/O Routing Location Register
354///
355///You can [`read`](crate::Reg::read) this register and get [`routeloc0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`routeloc0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
356///
357///For information about available fields see [`mod@routeloc0`]
358///module
359#[doc(alias = "ROUTELOC0")]
360pub type Routeloc0 = crate::Reg<routeloc0::ROUTELOC0rs>;
361///I/O Routing Location Register
362pub mod routeloc0;
363///ROUTELOC2 (rw) register accessor: I/O Routing Location Register
364///
365///You can [`read`](crate::Reg::read) this register and get [`routeloc2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`routeloc2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
366///
367///For information about available fields see [`mod@routeloc2`]
368///module
369#[doc(alias = "ROUTELOC2")]
370pub type Routeloc2 = crate::Reg<routeloc2::ROUTELOC2rs>;
371///I/O Routing Location Register
372pub mod routeloc2;
373///CC0_CTRL (rw) register accessor: CC Channel Control Register
374///
375///You can [`read`](crate::Reg::read) this register and get [`cc0_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
376///
377///For information about available fields see [`mod@cc0_ctrl`]
378///module
379#[doc(alias = "CC0_CTRL")]
380pub type Cc0Ctrl = crate::Reg<cc0_ctrl::CC0_CTRLrs>;
381///CC Channel Control Register
382pub mod cc0_ctrl;
383///CC0_CCV (rw) register accessor: CC Channel Value Register
384///
385///You can [`read`](crate::Reg::read) this register and get [`cc0_ccv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ccv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
386///
387///<div class="warning">One or more dependent resources other than the current register are immediately affected by a read operation.</div>
388///
389///For information about available fields see [`mod@cc0_ccv`]
390///module
391#[doc(alias = "CC0_CCV")]
392pub type Cc0Ccv = crate::Reg<cc0_ccv::CC0_CCVrs>;
393///CC Channel Value Register
394pub mod cc0_ccv;
395///CC0_CCVP (r) register accessor: CC Channel Value Peek Register
396///
397///You can [`read`](crate::Reg::read) this register and get [`cc0_ccvp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
398///
399///For information about available fields see [`mod@cc0_ccvp`]
400///module
401#[doc(alias = "CC0_CCVP")]
402pub type Cc0Ccvp = crate::Reg<cc0_ccvp::CC0_CCVPrs>;
403///CC Channel Value Peek Register
404pub mod cc0_ccvp;
405///CC0_CCVB (rw) register accessor: CC Channel Buffer Register
406///
407///You can [`read`](crate::Reg::read) this register and get [`cc0_ccvb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc0_ccvb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
408///
409///For information about available fields see [`mod@cc0_ccvb`]
410///module
411#[doc(alias = "CC0_CCVB")]
412pub type Cc0Ccvb = crate::Reg<cc0_ccvb::CC0_CCVBrs>;
413///CC Channel Buffer Register
414pub mod cc0_ccvb;
415pub use cc0_ctrl as cc1_ctrl;
416pub use Cc0Ctrl as Cc1Ctrl;
417///CC1_CCV (rw) register accessor: CC Channel Value Register
418///
419///You can [`read`](crate::Reg::read) this register and get [`cc1_ccv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ccv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
420///
421///<div class="warning">One or more dependent resources other than the current register are immediately affected by a read operation.</div>
422///
423///For information about available fields see [`mod@cc1_ccv`]
424///module
425#[doc(alias = "CC1_CCV")]
426pub type Cc1Ccv = crate::Reg<cc1_ccv::CC1_CCVrs>;
427///CC Channel Value Register
428pub mod cc1_ccv;
429///CC1_CCVP (r) register accessor: CC Channel Value Peek Register
430///
431///You can [`read`](crate::Reg::read) this register and get [`cc1_ccvp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
432///
433///For information about available fields see [`mod@cc1_ccvp`]
434///module
435#[doc(alias = "CC1_CCVP")]
436pub type Cc1Ccvp = crate::Reg<cc1_ccvp::CC1_CCVPrs>;
437///CC Channel Value Peek Register
438pub mod cc1_ccvp;
439///CC1_CCVB (rw) register accessor: CC Channel Buffer Register
440///
441///You can [`read`](crate::Reg::read) this register and get [`cc1_ccvb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc1_ccvb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
442///
443///For information about available fields see [`mod@cc1_ccvb`]
444///module
445#[doc(alias = "CC1_CCVB")]
446pub type Cc1Ccvb = crate::Reg<cc1_ccvb::CC1_CCVBrs>;
447///CC Channel Buffer Register
448pub mod cc1_ccvb;
449pub use cc0_ctrl as cc2_ctrl;
450pub use Cc0Ctrl as Cc2Ctrl;
451///CC2_CCV (rw) register accessor: CC Channel Value Register
452///
453///You can [`read`](crate::Reg::read) this register and get [`cc2_ccv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ccv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
454///
455///<div class="warning">One or more dependent resources other than the current register are immediately affected by a read operation.</div>
456///
457///For information about available fields see [`mod@cc2_ccv`]
458///module
459#[doc(alias = "CC2_CCV")]
460pub type Cc2Ccv = crate::Reg<cc2_ccv::CC2_CCVrs>;
461///CC Channel Value Register
462pub mod cc2_ccv;
463///CC2_CCVP (r) register accessor: CC Channel Value Peek Register
464///
465///You can [`read`](crate::Reg::read) this register and get [`cc2_ccvp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
466///
467///For information about available fields see [`mod@cc2_ccvp`]
468///module
469#[doc(alias = "CC2_CCVP")]
470pub type Cc2Ccvp = crate::Reg<cc2_ccvp::CC2_CCVPrs>;
471///CC Channel Value Peek Register
472pub mod cc2_ccvp;
473///CC2_CCVB (rw) register accessor: CC Channel Buffer Register
474///
475///You can [`read`](crate::Reg::read) this register and get [`cc2_ccvb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc2_ccvb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
476///
477///For information about available fields see [`mod@cc2_ccvb`]
478///module
479#[doc(alias = "CC2_CCVB")]
480pub type Cc2Ccvb = crate::Reg<cc2_ccvb::CC2_CCVBrs>;
481///CC Channel Buffer Register
482pub mod cc2_ccvb;
483pub use cc0_ctrl as cc3_ctrl;
484pub use Cc0Ctrl as Cc3Ctrl;
485///CC3_CCV (rw) register accessor: CC Channel Value Register
486///
487///You can [`read`](crate::Reg::read) this register and get [`cc3_ccv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc3_ccv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
488///
489///<div class="warning">One or more dependent resources other than the current register are immediately affected by a read operation.</div>
490///
491///For information about available fields see [`mod@cc3_ccv`]
492///module
493#[doc(alias = "CC3_CCV")]
494pub type Cc3Ccv = crate::Reg<cc3_ccv::CC3_CCVrs>;
495///CC Channel Value Register
496pub mod cc3_ccv;
497///CC3_CCVP (r) register accessor: CC Channel Value Peek Register
498///
499///You can [`read`](crate::Reg::read) this register and get [`cc3_ccvp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
500///
501///For information about available fields see [`mod@cc3_ccvp`]
502///module
503#[doc(alias = "CC3_CCVP")]
504pub type Cc3Ccvp = crate::Reg<cc3_ccvp::CC3_CCVPrs>;
505///CC Channel Value Peek Register
506pub mod cc3_ccvp;
507///CC3_CCVB (rw) register accessor: CC Channel Buffer Register
508///
509///You can [`read`](crate::Reg::read) this register and get [`cc3_ccvb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cc3_ccvb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
510///
511///For information about available fields see [`mod@cc3_ccvb`]
512///module
513#[doc(alias = "CC3_CCVB")]
514pub type Cc3Ccvb = crate::Reg<cc3_ccvb::CC3_CCVBrs>;
515///CC Channel Buffer Register
516pub mod cc3_ccvb;
517///DTCTRL (rw) register accessor: DTI Control Register
518///
519///You can [`read`](crate::Reg::read) this register and get [`dtctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
520///
521///For information about available fields see [`mod@dtctrl`]
522///module
523#[doc(alias = "DTCTRL")]
524pub type Dtctrl = crate::Reg<dtctrl::DTCTRLrs>;
525///DTI Control Register
526pub mod dtctrl;
527///DTTIME (rw) register accessor: DTI Time Control Register
528///
529///You can [`read`](crate::Reg::read) this register and get [`dttime::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dttime::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
530///
531///For information about available fields see [`mod@dttime`]
532///module
533#[doc(alias = "DTTIME")]
534pub type Dttime = crate::Reg<dttime::DTTIMErs>;
535///DTI Time Control Register
536pub mod dttime;
537///DTFC (rw) register accessor: DTI Fault Configuration Register
538///
539///You can [`read`](crate::Reg::read) this register and get [`dtfc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
540///
541///For information about available fields see [`mod@dtfc`]
542///module
543#[doc(alias = "DTFC")]
544pub type Dtfc = crate::Reg<dtfc::DTFCrs>;
545///DTI Fault Configuration Register
546pub mod dtfc;
547///DTOGEN (rw) register accessor: DTI Output Generation Enable Register
548///
549///You can [`read`](crate::Reg::read) this register and get [`dtogen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtogen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
550///
551///For information about available fields see [`mod@dtogen`]
552///module
553#[doc(alias = "DTOGEN")]
554pub type Dtogen = crate::Reg<dtogen::DTOGENrs>;
555///DTI Output Generation Enable Register
556pub mod dtogen;
557///DTFAULT (r) register accessor: DTI Fault Register
558///
559///You can [`read`](crate::Reg::read) this register and get [`dtfault::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
560///
561///For information about available fields see [`mod@dtfault`]
562///module
563#[doc(alias = "DTFAULT")]
564pub type Dtfault = crate::Reg<dtfault::DTFAULTrs>;
565///DTI Fault Register
566pub mod dtfault;
567///DTFAULTC (w) register accessor: DTI Fault Clear Register
568///
569///You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtfaultc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
570///
571///For information about available fields see [`mod@dtfaultc`]
572///module
573#[doc(alias = "DTFAULTC")]
574pub type Dtfaultc = crate::Reg<dtfaultc::DTFAULTCrs>;
575///DTI Fault Clear Register
576pub mod dtfaultc;
577///DTLOCK (rw) register accessor: DTI Configuration Lock Register
578///
579///You can [`read`](crate::Reg::read) this register and get [`dtlock::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtlock::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
580///
581///For information about available fields see [`mod@dtlock`]
582///module
583#[doc(alias = "DTLOCK")]
584pub type Dtlock = crate::Reg<dtlock::DTLOCKrs>;
585///DTI Configuration Lock Register
586pub mod dtlock;
efm32pg1b_pac/timer0.rs

efm32pg1b_pac/
timer0.rs
