efm32pg1b_pac/letimer0/
ctrl.rs

1///Register `CTRL` reader
2pub type R = crate::R<CTRLrs>;
3///Register `CTRL` writer
4pub type W = crate::W<CTRLrs>;
5///Repeat Mode
6///
7///Value on reset: 0
8#[cfg_attr(feature = "defmt", derive(defmt::Format))]
9#[derive(Clone, Copy, Debug, PartialEq, Eq)]
10#[repr(u8)]
11pub enum REPMODE {
12    ///0: When started, the LETIMER counts down until it is stopped by software
13    Free = 0,
14    ///1: The counter counts REP0 times. When REP0 reaches zero, the counter stops
15    Oneshot = 1,
16    ///2: The counter counts REP0 times. If REP1 has been written, it is loaded into REP0 when REP0 reaches zero, otherwise the counter stops
17    Buffered = 2,
18    ///3: Both REP0 and REP1 are decremented when the LETIMER wraps around. The LETIMER counts until both REP0 and REP1 are zero
19    Double = 3,
20}
21impl From<REPMODE> for u8 {
22    #[inline(always)]
23    fn from(variant: REPMODE) -> Self {
24        variant as _
25    }
26}
27impl crate::FieldSpec for REPMODE {
28    type Ux = u8;
29}
30impl crate::IsEnum for REPMODE {}
31///Field `REPMODE` reader - Repeat Mode
32pub type RepmodeR = crate::FieldReader<REPMODE>;
33impl RepmodeR {
34    ///Get enumerated values variant
35    #[inline(always)]
36    pub const fn variant(&self) -> REPMODE {
37        match self.bits {
38            0 => REPMODE::Free,
39            1 => REPMODE::Oneshot,
40            2 => REPMODE::Buffered,
41            3 => REPMODE::Double,
42            _ => unreachable!(),
43        }
44    }
45    ///When started, the LETIMER counts down until it is stopped by software
46    #[inline(always)]
47    pub fn is_free(&self) -> bool {
48        *self == REPMODE::Free
49    }
50    ///The counter counts REP0 times. When REP0 reaches zero, the counter stops
51    #[inline(always)]
52    pub fn is_oneshot(&self) -> bool {
53        *self == REPMODE::Oneshot
54    }
55    ///The counter counts REP0 times. If REP1 has been written, it is loaded into REP0 when REP0 reaches zero, otherwise the counter stops
56    #[inline(always)]
57    pub fn is_buffered(&self) -> bool {
58        *self == REPMODE::Buffered
59    }
60    ///Both REP0 and REP1 are decremented when the LETIMER wraps around. The LETIMER counts until both REP0 and REP1 are zero
61    #[inline(always)]
62    pub fn is_double(&self) -> bool {
63        *self == REPMODE::Double
64    }
65}
66///Field `REPMODE` writer - Repeat Mode
67pub type RepmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, REPMODE, crate::Safe>;
68impl<'a, REG> RepmodeW<'a, REG>
69where
70    REG: crate::Writable + crate::RegisterSpec,
71    REG::Ux: From<u8>,
72{
73    ///When started, the LETIMER counts down until it is stopped by software
74    #[inline(always)]
75    pub fn free(self) -> &'a mut crate::W<REG> {
76        self.variant(REPMODE::Free)
77    }
78    ///The counter counts REP0 times. When REP0 reaches zero, the counter stops
79    #[inline(always)]
80    pub fn oneshot(self) -> &'a mut crate::W<REG> {
81        self.variant(REPMODE::Oneshot)
82    }
83    ///The counter counts REP0 times. If REP1 has been written, it is loaded into REP0 when REP0 reaches zero, otherwise the counter stops
84    #[inline(always)]
85    pub fn buffered(self) -> &'a mut crate::W<REG> {
86        self.variant(REPMODE::Buffered)
87    }
88    ///Both REP0 and REP1 are decremented when the LETIMER wraps around. The LETIMER counts until both REP0 and REP1 are zero
89    #[inline(always)]
90    pub fn double(self) -> &'a mut crate::W<REG> {
91        self.variant(REPMODE::Double)
92    }
93}
94///Underflow Output Action 0
95///
96///Value on reset: 0
97#[cfg_attr(feature = "defmt", derive(defmt::Format))]
98#[derive(Clone, Copy, Debug, PartialEq, Eq)]
99#[repr(u8)]
100pub enum UFOA0 {
101    ///0: LETn_O0 is held at its idle value as defined by OPOL0
102    None = 0,
103    ///1: LETn_O0 is toggled on CNT underflow
104    Toggle = 1,
105    ///2: LETn_O0 is held active for one LFACLKLETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL0
106    Pulse = 2,
107    ///3: LETn_O0 is set idle on CNT underflow, and active on compare match with COMP1
108    Pwm = 3,
109}
110impl From<UFOA0> for u8 {
111    #[inline(always)]
112    fn from(variant: UFOA0) -> Self {
113        variant as _
114    }
115}
116impl crate::FieldSpec for UFOA0 {
117    type Ux = u8;
118}
119impl crate::IsEnum for UFOA0 {}
120///Field `UFOA0` reader - Underflow Output Action 0
121pub type Ufoa0R = crate::FieldReader<UFOA0>;
122impl Ufoa0R {
123    ///Get enumerated values variant
124    #[inline(always)]
125    pub const fn variant(&self) -> UFOA0 {
126        match self.bits {
127            0 => UFOA0::None,
128            1 => UFOA0::Toggle,
129            2 => UFOA0::Pulse,
130            3 => UFOA0::Pwm,
131            _ => unreachable!(),
132        }
133    }
134    ///LETn_O0 is held at its idle value as defined by OPOL0
135    #[inline(always)]
136    pub fn is_none(&self) -> bool {
137        *self == UFOA0::None
138    }
139    ///LETn_O0 is toggled on CNT underflow
140    #[inline(always)]
141    pub fn is_toggle(&self) -> bool {
142        *self == UFOA0::Toggle
143    }
144    ///LETn_O0 is held active for one LFACLKLETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL0
145    #[inline(always)]
146    pub fn is_pulse(&self) -> bool {
147        *self == UFOA0::Pulse
148    }
149    ///LETn_O0 is set idle on CNT underflow, and active on compare match with COMP1
150    #[inline(always)]
151    pub fn is_pwm(&self) -> bool {
152        *self == UFOA0::Pwm
153    }
154}
155///Field `UFOA0` writer - Underflow Output Action 0
156pub type Ufoa0W<'a, REG> = crate::FieldWriter<'a, REG, 2, UFOA0, crate::Safe>;
157impl<'a, REG> Ufoa0W<'a, REG>
158where
159    REG: crate::Writable + crate::RegisterSpec,
160    REG::Ux: From<u8>,
161{
162    ///LETn_O0 is held at its idle value as defined by OPOL0
163    #[inline(always)]
164    pub fn none(self) -> &'a mut crate::W<REG> {
165        self.variant(UFOA0::None)
166    }
167    ///LETn_O0 is toggled on CNT underflow
168    #[inline(always)]
169    pub fn toggle(self) -> &'a mut crate::W<REG> {
170        self.variant(UFOA0::Toggle)
171    }
172    ///LETn_O0 is held active for one LFACLKLETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL0
173    #[inline(always)]
174    pub fn pulse(self) -> &'a mut crate::W<REG> {
175        self.variant(UFOA0::Pulse)
176    }
177    ///LETn_O0 is set idle on CNT underflow, and active on compare match with COMP1
178    #[inline(always)]
179    pub fn pwm(self) -> &'a mut crate::W<REG> {
180        self.variant(UFOA0::Pwm)
181    }
182}
183///Underflow Output Action 1
184///
185///Value on reset: 0
186#[cfg_attr(feature = "defmt", derive(defmt::Format))]
187#[derive(Clone, Copy, Debug, PartialEq, Eq)]
188#[repr(u8)]
189pub enum UFOA1 {
190    ///0: LETn_O1 is held at its idle value as defined by OPOL1
191    None = 0,
192    ///1: LETn_O1 is toggled on CNT underflow
193    Toggle = 1,
194    ///2: LETn_O1 is held active for one LFACLKLETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL1
195    Pulse = 2,
196    ///3: LETn_O1 is set idle on CNT underflow, and active on compare match with COMP1
197    Pwm = 3,
198}
199impl From<UFOA1> for u8 {
200    #[inline(always)]
201    fn from(variant: UFOA1) -> Self {
202        variant as _
203    }
204}
205impl crate::FieldSpec for UFOA1 {
206    type Ux = u8;
207}
208impl crate::IsEnum for UFOA1 {}
209///Field `UFOA1` reader - Underflow Output Action 1
210pub type Ufoa1R = crate::FieldReader<UFOA1>;
211impl Ufoa1R {
212    ///Get enumerated values variant
213    #[inline(always)]
214    pub const fn variant(&self) -> UFOA1 {
215        match self.bits {
216            0 => UFOA1::None,
217            1 => UFOA1::Toggle,
218            2 => UFOA1::Pulse,
219            3 => UFOA1::Pwm,
220            _ => unreachable!(),
221        }
222    }
223    ///LETn_O1 is held at its idle value as defined by OPOL1
224    #[inline(always)]
225    pub fn is_none(&self) -> bool {
226        *self == UFOA1::None
227    }
228    ///LETn_O1 is toggled on CNT underflow
229    #[inline(always)]
230    pub fn is_toggle(&self) -> bool {
231        *self == UFOA1::Toggle
232    }
233    ///LETn_O1 is held active for one LFACLKLETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL1
234    #[inline(always)]
235    pub fn is_pulse(&self) -> bool {
236        *self == UFOA1::Pulse
237    }
238    ///LETn_O1 is set idle on CNT underflow, and active on compare match with COMP1
239    #[inline(always)]
240    pub fn is_pwm(&self) -> bool {
241        *self == UFOA1::Pwm
242    }
243}
244///Field `UFOA1` writer - Underflow Output Action 1
245pub type Ufoa1W<'a, REG> = crate::FieldWriter<'a, REG, 2, UFOA1, crate::Safe>;
246impl<'a, REG> Ufoa1W<'a, REG>
247where
248    REG: crate::Writable + crate::RegisterSpec,
249    REG::Ux: From<u8>,
250{
251    ///LETn_O1 is held at its idle value as defined by OPOL1
252    #[inline(always)]
253    pub fn none(self) -> &'a mut crate::W<REG> {
254        self.variant(UFOA1::None)
255    }
256    ///LETn_O1 is toggled on CNT underflow
257    #[inline(always)]
258    pub fn toggle(self) -> &'a mut crate::W<REG> {
259        self.variant(UFOA1::Toggle)
260    }
261    ///LETn_O1 is held active for one LFACLKLETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL1
262    #[inline(always)]
263    pub fn pulse(self) -> &'a mut crate::W<REG> {
264        self.variant(UFOA1::Pulse)
265    }
266    ///LETn_O1 is set idle on CNT underflow, and active on compare match with COMP1
267    #[inline(always)]
268    pub fn pwm(self) -> &'a mut crate::W<REG> {
269        self.variant(UFOA1::Pwm)
270    }
271}
272///Field `OPOL0` reader - Output 0 Polarity
273pub type Opol0R = crate::BitReader;
274///Field `OPOL0` writer - Output 0 Polarity
275pub type Opol0W<'a, REG> = crate::BitWriter<'a, REG>;
276///Field `OPOL1` reader - Output 1 Polarity
277pub type Opol1R = crate::BitReader;
278///Field `OPOL1` writer - Output 1 Polarity
279pub type Opol1W<'a, REG> = crate::BitWriter<'a, REG>;
280///Field `BUFTOP` reader - Buffered Top
281pub type BuftopR = crate::BitReader;
282///Field `BUFTOP` writer - Buffered Top
283pub type BuftopW<'a, REG> = crate::BitWriter<'a, REG>;
284///Field `COMP0TOP` reader - Compare Value 0 is Top Value
285pub type Comp0topR = crate::BitReader;
286///Field `COMP0TOP` writer - Compare Value 0 is Top Value
287pub type Comp0topW<'a, REG> = crate::BitWriter<'a, REG>;
288///Field `DEBUGRUN` reader - Debug Mode Run Enable
289pub type DebugrunR = crate::BitReader;
290///Field `DEBUGRUN` writer - Debug Mode Run Enable
291pub type DebugrunW<'a, REG> = crate::BitWriter<'a, REG>;
292impl R {
293    ///Bits 0:1 - Repeat Mode
294    #[inline(always)]
295    pub fn repmode(&self) -> RepmodeR {
296        RepmodeR::new((self.bits & 3) as u8)
297    }
298    ///Bits 2:3 - Underflow Output Action 0
299    #[inline(always)]
300    pub fn ufoa0(&self) -> Ufoa0R {
301        Ufoa0R::new(((self.bits >> 2) & 3) as u8)
302    }
303    ///Bits 4:5 - Underflow Output Action 1
304    #[inline(always)]
305    pub fn ufoa1(&self) -> Ufoa1R {
306        Ufoa1R::new(((self.bits >> 4) & 3) as u8)
307    }
308    ///Bit 6 - Output 0 Polarity
309    #[inline(always)]
310    pub fn opol0(&self) -> Opol0R {
311        Opol0R::new(((self.bits >> 6) & 1) != 0)
312    }
313    ///Bit 7 - Output 1 Polarity
314    #[inline(always)]
315    pub fn opol1(&self) -> Opol1R {
316        Opol1R::new(((self.bits >> 7) & 1) != 0)
317    }
318    ///Bit 8 - Buffered Top
319    #[inline(always)]
320    pub fn buftop(&self) -> BuftopR {
321        BuftopR::new(((self.bits >> 8) & 1) != 0)
322    }
323    ///Bit 9 - Compare Value 0 is Top Value
324    #[inline(always)]
325    pub fn comp0top(&self) -> Comp0topR {
326        Comp0topR::new(((self.bits >> 9) & 1) != 0)
327    }
328    ///Bit 12 - Debug Mode Run Enable
329    #[inline(always)]
330    pub fn debugrun(&self) -> DebugrunR {
331        DebugrunR::new(((self.bits >> 12) & 1) != 0)
332    }
333}
334impl core::fmt::Debug for R {
335    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
336        f.debug_struct("CTRL")
337            .field("repmode", &self.repmode())
338            .field("ufoa0", &self.ufoa0())
339            .field("ufoa1", &self.ufoa1())
340            .field("opol0", &self.opol0())
341            .field("opol1", &self.opol1())
342            .field("buftop", &self.buftop())
343            .field("comp0top", &self.comp0top())
344            .field("debugrun", &self.debugrun())
345            .finish()
346    }
347}
348impl W {
349    ///Bits 0:1 - Repeat Mode
350    #[inline(always)]
351    pub fn repmode(&mut self) -> RepmodeW<'_, CTRLrs> {
352        RepmodeW::new(self, 0)
353    }
354    ///Bits 2:3 - Underflow Output Action 0
355    #[inline(always)]
356    pub fn ufoa0(&mut self) -> Ufoa0W<'_, CTRLrs> {
357        Ufoa0W::new(self, 2)
358    }
359    ///Bits 4:5 - Underflow Output Action 1
360    #[inline(always)]
361    pub fn ufoa1(&mut self) -> Ufoa1W<'_, CTRLrs> {
362        Ufoa1W::new(self, 4)
363    }
364    ///Bit 6 - Output 0 Polarity
365    #[inline(always)]
366    pub fn opol0(&mut self) -> Opol0W<'_, CTRLrs> {
367        Opol0W::new(self, 6)
368    }
369    ///Bit 7 - Output 1 Polarity
370    #[inline(always)]
371    pub fn opol1(&mut self) -> Opol1W<'_, CTRLrs> {
372        Opol1W::new(self, 7)
373    }
374    ///Bit 8 - Buffered Top
375    #[inline(always)]
376    pub fn buftop(&mut self) -> BuftopW<'_, CTRLrs> {
377        BuftopW::new(self, 8)
378    }
379    ///Bit 9 - Compare Value 0 is Top Value
380    #[inline(always)]
381    pub fn comp0top(&mut self) -> Comp0topW<'_, CTRLrs> {
382        Comp0topW::new(self, 9)
383    }
384    ///Bit 12 - Debug Mode Run Enable
385    #[inline(always)]
386    pub fn debugrun(&mut self) -> DebugrunW<'_, CTRLrs> {
387        DebugrunW::new(self, 12)
388    }
389}
390///Control Register
391///
392///You can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
393pub struct CTRLrs;
394impl crate::RegisterSpec for CTRLrs {
395    type Ux = u32;
396}
397///`read()` method returns [`ctrl::R`](R) reader structure
398impl crate::Readable for CTRLrs {}
399///`write(|w| ..)` method takes [`ctrl::W`](W) writer structure
400impl crate::Writable for CTRLrs {
401    type Safety = crate::Unsafe;
402}
403///`reset()` method sets CTRL to value 0
404impl crate::Resettable for CTRLrs {}
efm32pg1b_pac/letimer0/ctrl.rs

efm32pg1b_pac/letimer0/
ctrl.rs
