efm32pg1b-pac 0.4.3

Peripheral access API for Silicon Labs EFM32PG1B microcontrollers
Documentation
///Register `SINGLEFIFOCLEAR` writer
pub type W = crate::W<SINGLEFIFOCLEARrs>;
///Field `SINGLEFIFOCLEAR` writer - Clear Single FIFO Content
pub type SinglefifoclearW<'a, REG> = crate::BitWriter<'a, REG>;
impl core::fmt::Debug for crate::generic::Reg<SINGLEFIFOCLEARrs> {
    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
        write!(f, "(not readable)")
    }
}
impl W {
    ///Bit 0 - Clear Single FIFO Content
    #[inline(always)]
    pub fn singlefifoclear(&mut self) -> SinglefifoclearW<'_, SINGLEFIFOCLEARrs> {
        SinglefifoclearW::new(self, 0)
    }
}
///Single FIFO Clear Register
///
///You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`singlefifoclear::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
pub struct SINGLEFIFOCLEARrs;
impl crate::RegisterSpec for SINGLEFIFOCLEARrs {
    type Ux = u32;
}
///`write(|w| ..)` method takes [`singlefifoclear::W`](W) writer structure
impl crate::Writable for SINGLEFIFOCLEARrs {
    type Safety = crate::Unsafe;
}
///`reset()` method sets SINGLEFIFOCLEAR to value 0
impl crate::Resettable for SINGLEFIFOCLEARrs {}