efm32pg12b500_pac/msc/
ien.rs

1#[doc = "Register `IEN` reader"]
2pub struct R(crate::R<IEN_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<IEN_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<IEN_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<IEN_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `IEN` writer"]
17pub struct W(crate::W<IEN_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<IEN_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<IEN_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<IEN_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `ERASE` reader - ERASE Interrupt Enable"]
38pub type ERASE_R = crate::BitReader<bool>;
39#[doc = "Field `ERASE` writer - ERASE Interrupt Enable"]
40pub type ERASE_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 0>;
41#[doc = "Field `WRITE` reader - WRITE Interrupt Enable"]
42pub type WRITE_R = crate::BitReader<bool>;
43#[doc = "Field `WRITE` writer - WRITE Interrupt Enable"]
44pub type WRITE_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 1>;
45#[doc = "Field `CHOF` reader - CHOF Interrupt Enable"]
46pub type CHOF_R = crate::BitReader<bool>;
47#[doc = "Field `CHOF` writer - CHOF Interrupt Enable"]
48pub type CHOF_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 2>;
49#[doc = "Field `CMOF` reader - CMOF Interrupt Enable"]
50pub type CMOF_R = crate::BitReader<bool>;
51#[doc = "Field `CMOF` writer - CMOF Interrupt Enable"]
52pub type CMOF_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 3>;
53#[doc = "Field `PWRUPF` reader - PWRUPF Interrupt Enable"]
54pub type PWRUPF_R = crate::BitReader<bool>;
55#[doc = "Field `PWRUPF` writer - PWRUPF Interrupt Enable"]
56pub type PWRUPF_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 4>;
57#[doc = "Field `ICACHERR` reader - ICACHERR Interrupt Enable"]
58pub type ICACHERR_R = crate::BitReader<bool>;
59#[doc = "Field `ICACHERR` writer - ICACHERR Interrupt Enable"]
60pub type ICACHERR_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 5>;
61#[doc = "Field `WDATAOV` reader - WDATAOV Interrupt Enable"]
62pub type WDATAOV_R = crate::BitReader<bool>;
63#[doc = "Field `WDATAOV` writer - WDATAOV Interrupt Enable"]
64pub type WDATAOV_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 6>;
65#[doc = "Field `LVEWRITE` reader - LVEWRITE Interrupt Enable"]
66pub type LVEWRITE_R = crate::BitReader<bool>;
67#[doc = "Field `LVEWRITE` writer - LVEWRITE Interrupt Enable"]
68pub type LVEWRITE_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 8>;
69impl R {
70    #[doc = "Bit 0 - ERASE Interrupt Enable"]
71    #[inline(always)]
72    pub fn erase(&self) -> ERASE_R {
73        ERASE_R::new((self.bits & 1) != 0)
74    }
75    #[doc = "Bit 1 - WRITE Interrupt Enable"]
76    #[inline(always)]
77    pub fn write(&self) -> WRITE_R {
78        WRITE_R::new(((self.bits >> 1) & 1) != 0)
79    }
80    #[doc = "Bit 2 - CHOF Interrupt Enable"]
81    #[inline(always)]
82    pub fn chof(&self) -> CHOF_R {
83        CHOF_R::new(((self.bits >> 2) & 1) != 0)
84    }
85    #[doc = "Bit 3 - CMOF Interrupt Enable"]
86    #[inline(always)]
87    pub fn cmof(&self) -> CMOF_R {
88        CMOF_R::new(((self.bits >> 3) & 1) != 0)
89    }
90    #[doc = "Bit 4 - PWRUPF Interrupt Enable"]
91    #[inline(always)]
92    pub fn pwrupf(&self) -> PWRUPF_R {
93        PWRUPF_R::new(((self.bits >> 4) & 1) != 0)
94    }
95    #[doc = "Bit 5 - ICACHERR Interrupt Enable"]
96    #[inline(always)]
97    pub fn icacherr(&self) -> ICACHERR_R {
98        ICACHERR_R::new(((self.bits >> 5) & 1) != 0)
99    }
100    #[doc = "Bit 6 - WDATAOV Interrupt Enable"]
101    #[inline(always)]
102    pub fn wdataov(&self) -> WDATAOV_R {
103        WDATAOV_R::new(((self.bits >> 6) & 1) != 0)
104    }
105    #[doc = "Bit 8 - LVEWRITE Interrupt Enable"]
106    #[inline(always)]
107    pub fn lvewrite(&self) -> LVEWRITE_R {
108        LVEWRITE_R::new(((self.bits >> 8) & 1) != 0)
109    }
110}
111impl W {
112    #[doc = "Bit 0 - ERASE Interrupt Enable"]
113    #[inline(always)]
114    pub fn erase(&mut self) -> ERASE_W {
115        ERASE_W::new(self)
116    }
117    #[doc = "Bit 1 - WRITE Interrupt Enable"]
118    #[inline(always)]
119    pub fn write(&mut self) -> WRITE_W {
120        WRITE_W::new(self)
121    }
122    #[doc = "Bit 2 - CHOF Interrupt Enable"]
123    #[inline(always)]
124    pub fn chof(&mut self) -> CHOF_W {
125        CHOF_W::new(self)
126    }
127    #[doc = "Bit 3 - CMOF Interrupt Enable"]
128    #[inline(always)]
129    pub fn cmof(&mut self) -> CMOF_W {
130        CMOF_W::new(self)
131    }
132    #[doc = "Bit 4 - PWRUPF Interrupt Enable"]
133    #[inline(always)]
134    pub fn pwrupf(&mut self) -> PWRUPF_W {
135        PWRUPF_W::new(self)
136    }
137    #[doc = "Bit 5 - ICACHERR Interrupt Enable"]
138    #[inline(always)]
139    pub fn icacherr(&mut self) -> ICACHERR_W {
140        ICACHERR_W::new(self)
141    }
142    #[doc = "Bit 6 - WDATAOV Interrupt Enable"]
143    #[inline(always)]
144    pub fn wdataov(&mut self) -> WDATAOV_W {
145        WDATAOV_W::new(self)
146    }
147    #[doc = "Bit 8 - LVEWRITE Interrupt Enable"]
148    #[inline(always)]
149    pub fn lvewrite(&mut self) -> LVEWRITE_W {
150        LVEWRITE_W::new(self)
151    }
152    #[doc = "Writes raw bits to the register."]
153    #[inline(always)]
154    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
155        self.0.bits(bits);
156        self
157    }
158}
159#[doc = "Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"]
160pub struct IEN_SPEC;
161impl crate::RegisterSpec for IEN_SPEC {
162    type Ux = u32;
163}
164#[doc = "`read()` method returns [ien::R](R) reader structure"]
165impl crate::Readable for IEN_SPEC {
166    type Reader = R;
167}
168#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"]
169impl crate::Writable for IEN_SPEC {
170    type Writer = W;
171}
172#[doc = "`reset()` method sets IEN to value 0"]
173impl crate::Resettable for IEN_SPEC {
174    #[inline(always)]
175    fn reset_value() -> Self::Ux {
176        0
177    }
178}
efm32pg12b500_pac/msc/ien.rs

efm32pg12b500_pac/msc/
ien.rs
