#[doc = "Register `IEN` reader"]
pub struct R(crate::R<IEN_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<IEN_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<IEN_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<IEN_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `IEN` writer"]
pub struct W(crate::W<IEN_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<IEN_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<IEN_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<IEN_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `ERASE` reader - Erase Done Interrupt Enable"]
pub type ERASE_R = crate::BitReader<bool>;
#[doc = "Field `ERASE` writer - Erase Done Interrupt Enable"]
pub type ERASE_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 0>;
#[doc = "Field `WRITE` reader - Write Done Interrupt Enable"]
pub type WRITE_R = crate::BitReader<bool>;
#[doc = "Field `WRITE` writer - Write Done Interrupt Enable"]
pub type WRITE_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 1>;
#[doc = "Field `CHOF` reader - Cache Hits Overflow Interrupt Enable"]
pub type CHOF_R = crate::BitReader<bool>;
#[doc = "Field `CHOF` writer - Cache Hits Overflow Interrupt Enable"]
pub type CHOF_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 2>;
#[doc = "Field `CMOF` reader - Cache Misses Overflow Interrupt Enable"]
pub type CMOF_R = crate::BitReader<bool>;
#[doc = "Field `CMOF` writer - Cache Misses Overflow Interrupt Enable"]
pub type CMOF_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 3>;
impl R {
#[doc = "Bit 0 - Erase Done Interrupt Enable"]
#[inline(always)]
pub fn erase(&self) -> ERASE_R {
ERASE_R::new((self.bits & 1) != 0)
}
#[doc = "Bit 1 - Write Done Interrupt Enable"]
#[inline(always)]
pub fn write(&self) -> WRITE_R {
WRITE_R::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 2 - Cache Hits Overflow Interrupt Enable"]
#[inline(always)]
pub fn chof(&self) -> CHOF_R {
CHOF_R::new(((self.bits >> 2) & 1) != 0)
}
#[doc = "Bit 3 - Cache Misses Overflow Interrupt Enable"]
#[inline(always)]
pub fn cmof(&self) -> CMOF_R {
CMOF_R::new(((self.bits >> 3) & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - Erase Done Interrupt Enable"]
#[inline(always)]
pub fn erase(&mut self) -> ERASE_W {
ERASE_W::new(self)
}
#[doc = "Bit 1 - Write Done Interrupt Enable"]
#[inline(always)]
pub fn write(&mut self) -> WRITE_W {
WRITE_W::new(self)
}
#[doc = "Bit 2 - Cache Hits Overflow Interrupt Enable"]
#[inline(always)]
pub fn chof(&mut self) -> CHOF_W {
CHOF_W::new(self)
}
#[doc = "Bit 3 - Cache Misses Overflow Interrupt Enable"]
#[inline(always)]
pub fn cmof(&mut self) -> CMOF_W {
CMOF_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"]
pub struct IEN_SPEC;
impl crate::RegisterSpec for IEN_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [ien::R](R) reader structure"]
impl crate::Readable for IEN_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"]
impl crate::Writable for IEN_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets IEN to value 0"]
impl crate::Resettable for IEN_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}