1#[doc = "Reader of register CTRL"]
2pub type R = crate::R<u32, super::CTRL>;
3#[doc = "Writer for register CTRL"]
4pub type W = crate::W<u32, super::CTRL>;
5#[doc = "Register CTRL `reset()`'s with value 0"]
6impl crate::ResetValue for super::CTRL {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Reader of field `SYNC`"]
14pub type SYNC_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `SYNC`"]
16pub struct SYNC_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> SYNC_W<'a> {
20 #[doc = r"Sets the field bit"]
21 #[inline(always)]
22 pub fn set_bit(self) -> &'a mut W {
23 self.bit(true)
24 }
25 #[doc = r"Clears the field bit"]
26 #[inline(always)]
27 pub fn clear_bit(self) -> &'a mut W {
28 self.bit(false)
29 }
30 #[doc = r"Writes raw bits to the field"]
31 #[inline(always)]
32 pub fn bit(self, value: bool) -> &'a mut W {
33 self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
34 self.w
35 }
36}
37#[doc = "Reader of field `LOOPBK`"]
38pub type LOOPBK_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `LOOPBK`"]
40pub struct LOOPBK_W<'a> {
41 w: &'a mut W,
42}
43impl<'a> LOOPBK_W<'a> {
44 #[doc = r"Sets the field bit"]
45 #[inline(always)]
46 pub fn set_bit(self) -> &'a mut W {
47 self.bit(true)
48 }
49 #[doc = r"Clears the field bit"]
50 #[inline(always)]
51 pub fn clear_bit(self) -> &'a mut W {
52 self.bit(false)
53 }
54 #[doc = r"Writes raw bits to the field"]
55 #[inline(always)]
56 pub fn bit(self, value: bool) -> &'a mut W {
57 self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
58 self.w
59 }
60}
61#[doc = "Reader of field `CCEN`"]
62pub type CCEN_R = crate::R<bool, bool>;
63#[doc = "Write proxy for field `CCEN`"]
64pub struct CCEN_W<'a> {
65 w: &'a mut W,
66}
67impl<'a> CCEN_W<'a> {
68 #[doc = r"Sets the field bit"]
69 #[inline(always)]
70 pub fn set_bit(self) -> &'a mut W {
71 self.bit(true)
72 }
73 #[doc = r"Clears the field bit"]
74 #[inline(always)]
75 pub fn clear_bit(self) -> &'a mut W {
76 self.bit(false)
77 }
78 #[doc = r"Writes raw bits to the field"]
79 #[inline(always)]
80 pub fn bit(self, value: bool) -> &'a mut W {
81 self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
82 self.w
83 }
84}
85#[doc = "Reader of field `MPM`"]
86pub type MPM_R = crate::R<bool, bool>;
87#[doc = "Write proxy for field `MPM`"]
88pub struct MPM_W<'a> {
89 w: &'a mut W,
90}
91impl<'a> MPM_W<'a> {
92 #[doc = r"Sets the field bit"]
93 #[inline(always)]
94 pub fn set_bit(self) -> &'a mut W {
95 self.bit(true)
96 }
97 #[doc = r"Clears the field bit"]
98 #[inline(always)]
99 pub fn clear_bit(self) -> &'a mut W {
100 self.bit(false)
101 }
102 #[doc = r"Writes raw bits to the field"]
103 #[inline(always)]
104 pub fn bit(self, value: bool) -> &'a mut W {
105 self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
106 self.w
107 }
108}
109#[doc = "Reader of field `MPAB`"]
110pub type MPAB_R = crate::R<bool, bool>;
111#[doc = "Write proxy for field `MPAB`"]
112pub struct MPAB_W<'a> {
113 w: &'a mut W,
114}
115impl<'a> MPAB_W<'a> {
116 #[doc = r"Sets the field bit"]
117 #[inline(always)]
118 pub fn set_bit(self) -> &'a mut W {
119 self.bit(true)
120 }
121 #[doc = r"Clears the field bit"]
122 #[inline(always)]
123 pub fn clear_bit(self) -> &'a mut W {
124 self.bit(false)
125 }
126 #[doc = r"Writes raw bits to the field"]
127 #[inline(always)]
128 pub fn bit(self, value: bool) -> &'a mut W {
129 self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
130 self.w
131 }
132}
133#[doc = "Oversampling\n\nValue on reset: 0"]
134#[derive(Clone, Copy, Debug, PartialEq)]
135pub enum OVS_A {
136 #[doc = "0: Regular UART mode with 16X oversampling in asynchronous mode"]
137 X16,
138 #[doc = "1: Double speed with 8X oversampling in asynchronous mode"]
139 X8,
140 #[doc = "2: 6X oversampling in asynchronous mode"]
141 X6,
142 #[doc = "3: Quadruple speed with 4X oversampling in asynchronous mode"]
143 X4,
144}
145impl From<OVS_A> for u8 {
146 #[inline(always)]
147 fn from(variant: OVS_A) -> Self {
148 match variant {
149 OVS_A::X16 => 0,
150 OVS_A::X8 => 1,
151 OVS_A::X6 => 2,
152 OVS_A::X4 => 3,
153 }
154 }
155}
156#[doc = "Reader of field `OVS`"]
157pub type OVS_R = crate::R<u8, OVS_A>;
158impl OVS_R {
159 #[doc = r"Get enumerated values variant"]
160 #[inline(always)]
161 pub fn variant(&self) -> OVS_A {
162 match self.bits {
163 0 => OVS_A::X16,
164 1 => OVS_A::X8,
165 2 => OVS_A::X6,
166 3 => OVS_A::X4,
167 _ => unreachable!(),
168 }
169 }
170 #[doc = "Checks if the value of the field is `X16`"]
171 #[inline(always)]
172 pub fn is_x16(&self) -> bool {
173 *self == OVS_A::X16
174 }
175 #[doc = "Checks if the value of the field is `X8`"]
176 #[inline(always)]
177 pub fn is_x8(&self) -> bool {
178 *self == OVS_A::X8
179 }
180 #[doc = "Checks if the value of the field is `X6`"]
181 #[inline(always)]
182 pub fn is_x6(&self) -> bool {
183 *self == OVS_A::X6
184 }
185 #[doc = "Checks if the value of the field is `X4`"]
186 #[inline(always)]
187 pub fn is_x4(&self) -> bool {
188 *self == OVS_A::X4
189 }
190}
191#[doc = "Write proxy for field `OVS`"]
192pub struct OVS_W<'a> {
193 w: &'a mut W,
194}
195impl<'a> OVS_W<'a> {
196 #[doc = r"Writes `variant` to the field"]
197 #[inline(always)]
198 pub fn variant(self, variant: OVS_A) -> &'a mut W {
199 {
200 self.bits(variant.into())
201 }
202 }
203 #[doc = "Regular UART mode with 16X oversampling in asynchronous mode"]
204 #[inline(always)]
205 pub fn x16(self) -> &'a mut W {
206 self.variant(OVS_A::X16)
207 }
208 #[doc = "Double speed with 8X oversampling in asynchronous mode"]
209 #[inline(always)]
210 pub fn x8(self) -> &'a mut W {
211 self.variant(OVS_A::X8)
212 }
213 #[doc = "6X oversampling in asynchronous mode"]
214 #[inline(always)]
215 pub fn x6(self) -> &'a mut W {
216 self.variant(OVS_A::X6)
217 }
218 #[doc = "Quadruple speed with 4X oversampling in asynchronous mode"]
219 #[inline(always)]
220 pub fn x4(self) -> &'a mut W {
221 self.variant(OVS_A::X4)
222 }
223 #[doc = r"Writes raw bits to the field"]
224 #[inline(always)]
225 pub fn bits(self, value: u8) -> &'a mut W {
226 self.w.bits = (self.w.bits & !(0x03 << 5)) | (((value as u32) & 0x03) << 5);
227 self.w
228 }
229}
230#[doc = "Reader of field `CLKPOL`"]
231pub type CLKPOL_R = crate::R<bool, bool>;
232#[doc = "Write proxy for field `CLKPOL`"]
233pub struct CLKPOL_W<'a> {
234 w: &'a mut W,
235}
236impl<'a> CLKPOL_W<'a> {
237 #[doc = r"Sets the field bit"]
238 #[inline(always)]
239 pub fn set_bit(self) -> &'a mut W {
240 self.bit(true)
241 }
242 #[doc = r"Clears the field bit"]
243 #[inline(always)]
244 pub fn clear_bit(self) -> &'a mut W {
245 self.bit(false)
246 }
247 #[doc = r"Writes raw bits to the field"]
248 #[inline(always)]
249 pub fn bit(self, value: bool) -> &'a mut W {
250 self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
251 self.w
252 }
253}
254#[doc = "Reader of field `CLKPHA`"]
255pub type CLKPHA_R = crate::R<bool, bool>;
256#[doc = "Write proxy for field `CLKPHA`"]
257pub struct CLKPHA_W<'a> {
258 w: &'a mut W,
259}
260impl<'a> CLKPHA_W<'a> {
261 #[doc = r"Sets the field bit"]
262 #[inline(always)]
263 pub fn set_bit(self) -> &'a mut W {
264 self.bit(true)
265 }
266 #[doc = r"Clears the field bit"]
267 #[inline(always)]
268 pub fn clear_bit(self) -> &'a mut W {
269 self.bit(false)
270 }
271 #[doc = r"Writes raw bits to the field"]
272 #[inline(always)]
273 pub fn bit(self, value: bool) -> &'a mut W {
274 self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
275 self.w
276 }
277}
278#[doc = "Reader of field `MSBF`"]
279pub type MSBF_R = crate::R<bool, bool>;
280#[doc = "Write proxy for field `MSBF`"]
281pub struct MSBF_W<'a> {
282 w: &'a mut W,
283}
284impl<'a> MSBF_W<'a> {
285 #[doc = r"Sets the field bit"]
286 #[inline(always)]
287 pub fn set_bit(self) -> &'a mut W {
288 self.bit(true)
289 }
290 #[doc = r"Clears the field bit"]
291 #[inline(always)]
292 pub fn clear_bit(self) -> &'a mut W {
293 self.bit(false)
294 }
295 #[doc = r"Writes raw bits to the field"]
296 #[inline(always)]
297 pub fn bit(self, value: bool) -> &'a mut W {
298 self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
299 self.w
300 }
301}
302#[doc = "Reader of field `CSMA`"]
303pub type CSMA_R = crate::R<bool, bool>;
304#[doc = "Write proxy for field `CSMA`"]
305pub struct CSMA_W<'a> {
306 w: &'a mut W,
307}
308impl<'a> CSMA_W<'a> {
309 #[doc = r"Sets the field bit"]
310 #[inline(always)]
311 pub fn set_bit(self) -> &'a mut W {
312 self.bit(true)
313 }
314 #[doc = r"Clears the field bit"]
315 #[inline(always)]
316 pub fn clear_bit(self) -> &'a mut W {
317 self.bit(false)
318 }
319 #[doc = r"Writes raw bits to the field"]
320 #[inline(always)]
321 pub fn bit(self, value: bool) -> &'a mut W {
322 self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
323 self.w
324 }
325}
326#[doc = "Reader of field `TXBIL`"]
327pub type TXBIL_R = crate::R<bool, bool>;
328#[doc = "Write proxy for field `TXBIL`"]
329pub struct TXBIL_W<'a> {
330 w: &'a mut W,
331}
332impl<'a> TXBIL_W<'a> {
333 #[doc = r"Sets the field bit"]
334 #[inline(always)]
335 pub fn set_bit(self) -> &'a mut W {
336 self.bit(true)
337 }
338 #[doc = r"Clears the field bit"]
339 #[inline(always)]
340 pub fn clear_bit(self) -> &'a mut W {
341 self.bit(false)
342 }
343 #[doc = r"Writes raw bits to the field"]
344 #[inline(always)]
345 pub fn bit(self, value: bool) -> &'a mut W {
346 self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12);
347 self.w
348 }
349}
350#[doc = "Reader of field `RXINV`"]
351pub type RXINV_R = crate::R<bool, bool>;
352#[doc = "Write proxy for field `RXINV`"]
353pub struct RXINV_W<'a> {
354 w: &'a mut W,
355}
356impl<'a> RXINV_W<'a> {
357 #[doc = r"Sets the field bit"]
358 #[inline(always)]
359 pub fn set_bit(self) -> &'a mut W {
360 self.bit(true)
361 }
362 #[doc = r"Clears the field bit"]
363 #[inline(always)]
364 pub fn clear_bit(self) -> &'a mut W {
365 self.bit(false)
366 }
367 #[doc = r"Writes raw bits to the field"]
368 #[inline(always)]
369 pub fn bit(self, value: bool) -> &'a mut W {
370 self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13);
371 self.w
372 }
373}
374#[doc = "Reader of field `TXINV`"]
375pub type TXINV_R = crate::R<bool, bool>;
376#[doc = "Write proxy for field `TXINV`"]
377pub struct TXINV_W<'a> {
378 w: &'a mut W,
379}
380impl<'a> TXINV_W<'a> {
381 #[doc = r"Sets the field bit"]
382 #[inline(always)]
383 pub fn set_bit(self) -> &'a mut W {
384 self.bit(true)
385 }
386 #[doc = r"Clears the field bit"]
387 #[inline(always)]
388 pub fn clear_bit(self) -> &'a mut W {
389 self.bit(false)
390 }
391 #[doc = r"Writes raw bits to the field"]
392 #[inline(always)]
393 pub fn bit(self, value: bool) -> &'a mut W {
394 self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
395 self.w
396 }
397}
398#[doc = "Reader of field `CSINV`"]
399pub type CSINV_R = crate::R<bool, bool>;
400#[doc = "Write proxy for field `CSINV`"]
401pub struct CSINV_W<'a> {
402 w: &'a mut W,
403}
404impl<'a> CSINV_W<'a> {
405 #[doc = r"Sets the field bit"]
406 #[inline(always)]
407 pub fn set_bit(self) -> &'a mut W {
408 self.bit(true)
409 }
410 #[doc = r"Clears the field bit"]
411 #[inline(always)]
412 pub fn clear_bit(self) -> &'a mut W {
413 self.bit(false)
414 }
415 #[doc = r"Writes raw bits to the field"]
416 #[inline(always)]
417 pub fn bit(self, value: bool) -> &'a mut W {
418 self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
419 self.w
420 }
421}
422#[doc = "Reader of field `AUTOCS`"]
423pub type AUTOCS_R = crate::R<bool, bool>;
424#[doc = "Write proxy for field `AUTOCS`"]
425pub struct AUTOCS_W<'a> {
426 w: &'a mut W,
427}
428impl<'a> AUTOCS_W<'a> {
429 #[doc = r"Sets the field bit"]
430 #[inline(always)]
431 pub fn set_bit(self) -> &'a mut W {
432 self.bit(true)
433 }
434 #[doc = r"Clears the field bit"]
435 #[inline(always)]
436 pub fn clear_bit(self) -> &'a mut W {
437 self.bit(false)
438 }
439 #[doc = r"Writes raw bits to the field"]
440 #[inline(always)]
441 pub fn bit(self, value: bool) -> &'a mut W {
442 self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
443 self.w
444 }
445}
446#[doc = "Reader of field `AUTOTRI`"]
447pub type AUTOTRI_R = crate::R<bool, bool>;
448#[doc = "Write proxy for field `AUTOTRI`"]
449pub struct AUTOTRI_W<'a> {
450 w: &'a mut W,
451}
452impl<'a> AUTOTRI_W<'a> {
453 #[doc = r"Sets the field bit"]
454 #[inline(always)]
455 pub fn set_bit(self) -> &'a mut W {
456 self.bit(true)
457 }
458 #[doc = r"Clears the field bit"]
459 #[inline(always)]
460 pub fn clear_bit(self) -> &'a mut W {
461 self.bit(false)
462 }
463 #[doc = r"Writes raw bits to the field"]
464 #[inline(always)]
465 pub fn bit(self, value: bool) -> &'a mut W {
466 self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17);
467 self.w
468 }
469}
470#[doc = "Reader of field `SCMODE`"]
471pub type SCMODE_R = crate::R<bool, bool>;
472#[doc = "Write proxy for field `SCMODE`"]
473pub struct SCMODE_W<'a> {
474 w: &'a mut W,
475}
476impl<'a> SCMODE_W<'a> {
477 #[doc = r"Sets the field bit"]
478 #[inline(always)]
479 pub fn set_bit(self) -> &'a mut W {
480 self.bit(true)
481 }
482 #[doc = r"Clears the field bit"]
483 #[inline(always)]
484 pub fn clear_bit(self) -> &'a mut W {
485 self.bit(false)
486 }
487 #[doc = r"Writes raw bits to the field"]
488 #[inline(always)]
489 pub fn bit(self, value: bool) -> &'a mut W {
490 self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18);
491 self.w
492 }
493}
494#[doc = "Reader of field `SCRETRANS`"]
495pub type SCRETRANS_R = crate::R<bool, bool>;
496#[doc = "Write proxy for field `SCRETRANS`"]
497pub struct SCRETRANS_W<'a> {
498 w: &'a mut W,
499}
500impl<'a> SCRETRANS_W<'a> {
501 #[doc = r"Sets the field bit"]
502 #[inline(always)]
503 pub fn set_bit(self) -> &'a mut W {
504 self.bit(true)
505 }
506 #[doc = r"Clears the field bit"]
507 #[inline(always)]
508 pub fn clear_bit(self) -> &'a mut W {
509 self.bit(false)
510 }
511 #[doc = r"Writes raw bits to the field"]
512 #[inline(always)]
513 pub fn bit(self, value: bool) -> &'a mut W {
514 self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19);
515 self.w
516 }
517}
518#[doc = "Reader of field `SKIPPERRF`"]
519pub type SKIPPERRF_R = crate::R<bool, bool>;
520#[doc = "Write proxy for field `SKIPPERRF`"]
521pub struct SKIPPERRF_W<'a> {
522 w: &'a mut W,
523}
524impl<'a> SKIPPERRF_W<'a> {
525 #[doc = r"Sets the field bit"]
526 #[inline(always)]
527 pub fn set_bit(self) -> &'a mut W {
528 self.bit(true)
529 }
530 #[doc = r"Clears the field bit"]
531 #[inline(always)]
532 pub fn clear_bit(self) -> &'a mut W {
533 self.bit(false)
534 }
535 #[doc = r"Writes raw bits to the field"]
536 #[inline(always)]
537 pub fn bit(self, value: bool) -> &'a mut W {
538 self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20);
539 self.w
540 }
541}
542#[doc = "Reader of field `BIT8DV`"]
543pub type BIT8DV_R = crate::R<bool, bool>;
544#[doc = "Write proxy for field `BIT8DV`"]
545pub struct BIT8DV_W<'a> {
546 w: &'a mut W,
547}
548impl<'a> BIT8DV_W<'a> {
549 #[doc = r"Sets the field bit"]
550 #[inline(always)]
551 pub fn set_bit(self) -> &'a mut W {
552 self.bit(true)
553 }
554 #[doc = r"Clears the field bit"]
555 #[inline(always)]
556 pub fn clear_bit(self) -> &'a mut W {
557 self.bit(false)
558 }
559 #[doc = r"Writes raw bits to the field"]
560 #[inline(always)]
561 pub fn bit(self, value: bool) -> &'a mut W {
562 self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21);
563 self.w
564 }
565}
566#[doc = "Reader of field `ERRSDMA`"]
567pub type ERRSDMA_R = crate::R<bool, bool>;
568#[doc = "Write proxy for field `ERRSDMA`"]
569pub struct ERRSDMA_W<'a> {
570 w: &'a mut W,
571}
572impl<'a> ERRSDMA_W<'a> {
573 #[doc = r"Sets the field bit"]
574 #[inline(always)]
575 pub fn set_bit(self) -> &'a mut W {
576 self.bit(true)
577 }
578 #[doc = r"Clears the field bit"]
579 #[inline(always)]
580 pub fn clear_bit(self) -> &'a mut W {
581 self.bit(false)
582 }
583 #[doc = r"Writes raw bits to the field"]
584 #[inline(always)]
585 pub fn bit(self, value: bool) -> &'a mut W {
586 self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22);
587 self.w
588 }
589}
590#[doc = "Reader of field `ERRSRX`"]
591pub type ERRSRX_R = crate::R<bool, bool>;
592#[doc = "Write proxy for field `ERRSRX`"]
593pub struct ERRSRX_W<'a> {
594 w: &'a mut W,
595}
596impl<'a> ERRSRX_W<'a> {
597 #[doc = r"Sets the field bit"]
598 #[inline(always)]
599 pub fn set_bit(self) -> &'a mut W {
600 self.bit(true)
601 }
602 #[doc = r"Clears the field bit"]
603 #[inline(always)]
604 pub fn clear_bit(self) -> &'a mut W {
605 self.bit(false)
606 }
607 #[doc = r"Writes raw bits to the field"]
608 #[inline(always)]
609 pub fn bit(self, value: bool) -> &'a mut W {
610 self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23);
611 self.w
612 }
613}
614#[doc = "Reader of field `ERRSTX`"]
615pub type ERRSTX_R = crate::R<bool, bool>;
616#[doc = "Write proxy for field `ERRSTX`"]
617pub struct ERRSTX_W<'a> {
618 w: &'a mut W,
619}
620impl<'a> ERRSTX_W<'a> {
621 #[doc = r"Sets the field bit"]
622 #[inline(always)]
623 pub fn set_bit(self) -> &'a mut W {
624 self.bit(true)
625 }
626 #[doc = r"Clears the field bit"]
627 #[inline(always)]
628 pub fn clear_bit(self) -> &'a mut W {
629 self.bit(false)
630 }
631 #[doc = r"Writes raw bits to the field"]
632 #[inline(always)]
633 pub fn bit(self, value: bool) -> &'a mut W {
634 self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
635 self.w
636 }
637}
638#[doc = "Reader of field `SSSEARLY`"]
639pub type SSSEARLY_R = crate::R<bool, bool>;
640#[doc = "Write proxy for field `SSSEARLY`"]
641pub struct SSSEARLY_W<'a> {
642 w: &'a mut W,
643}
644impl<'a> SSSEARLY_W<'a> {
645 #[doc = r"Sets the field bit"]
646 #[inline(always)]
647 pub fn set_bit(self) -> &'a mut W {
648 self.bit(true)
649 }
650 #[doc = r"Clears the field bit"]
651 #[inline(always)]
652 pub fn clear_bit(self) -> &'a mut W {
653 self.bit(false)
654 }
655 #[doc = r"Writes raw bits to the field"]
656 #[inline(always)]
657 pub fn bit(self, value: bool) -> &'a mut W {
658 self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25);
659 self.w
660 }
661}
662#[doc = "TX Delay Transmission\n\nValue on reset: 0"]
663#[derive(Clone, Copy, Debug, PartialEq)]
664pub enum TXDELAY_A {
665 #[doc = "0: Frames are transmitted immediately"]
666 NONE,
667 #[doc = "1: Transmission of new frames are delayed by a single baud period"]
668 SINGLE,
669 #[doc = "2: Transmission of new frames are delayed by two baud periods"]
670 DOUBLE,
671 #[doc = "3: Transmission of new frames are delayed by three baud periods"]
672 TRIPLE,
673}
674impl From<TXDELAY_A> for u8 {
675 #[inline(always)]
676 fn from(variant: TXDELAY_A) -> Self {
677 match variant {
678 TXDELAY_A::NONE => 0,
679 TXDELAY_A::SINGLE => 1,
680 TXDELAY_A::DOUBLE => 2,
681 TXDELAY_A::TRIPLE => 3,
682 }
683 }
684}
685#[doc = "Reader of field `TXDELAY`"]
686pub type TXDELAY_R = crate::R<u8, TXDELAY_A>;
687impl TXDELAY_R {
688 #[doc = r"Get enumerated values variant"]
689 #[inline(always)]
690 pub fn variant(&self) -> TXDELAY_A {
691 match self.bits {
692 0 => TXDELAY_A::NONE,
693 1 => TXDELAY_A::SINGLE,
694 2 => TXDELAY_A::DOUBLE,
695 3 => TXDELAY_A::TRIPLE,
696 _ => unreachable!(),
697 }
698 }
699 #[doc = "Checks if the value of the field is `NONE`"]
700 #[inline(always)]
701 pub fn is_none(&self) -> bool {
702 *self == TXDELAY_A::NONE
703 }
704 #[doc = "Checks if the value of the field is `SINGLE`"]
705 #[inline(always)]
706 pub fn is_single(&self) -> bool {
707 *self == TXDELAY_A::SINGLE
708 }
709 #[doc = "Checks if the value of the field is `DOUBLE`"]
710 #[inline(always)]
711 pub fn is_double(&self) -> bool {
712 *self == TXDELAY_A::DOUBLE
713 }
714 #[doc = "Checks if the value of the field is `TRIPLE`"]
715 #[inline(always)]
716 pub fn is_triple(&self) -> bool {
717 *self == TXDELAY_A::TRIPLE
718 }
719}
720#[doc = "Write proxy for field `TXDELAY`"]
721pub struct TXDELAY_W<'a> {
722 w: &'a mut W,
723}
724impl<'a> TXDELAY_W<'a> {
725 #[doc = r"Writes `variant` to the field"]
726 #[inline(always)]
727 pub fn variant(self, variant: TXDELAY_A) -> &'a mut W {
728 {
729 self.bits(variant.into())
730 }
731 }
732 #[doc = "Frames are transmitted immediately"]
733 #[inline(always)]
734 pub fn none(self) -> &'a mut W {
735 self.variant(TXDELAY_A::NONE)
736 }
737 #[doc = "Transmission of new frames are delayed by a single baud period"]
738 #[inline(always)]
739 pub fn single(self) -> &'a mut W {
740 self.variant(TXDELAY_A::SINGLE)
741 }
742 #[doc = "Transmission of new frames are delayed by two baud periods"]
743 #[inline(always)]
744 pub fn double(self) -> &'a mut W {
745 self.variant(TXDELAY_A::DOUBLE)
746 }
747 #[doc = "Transmission of new frames are delayed by three baud periods"]
748 #[inline(always)]
749 pub fn triple(self) -> &'a mut W {
750 self.variant(TXDELAY_A::TRIPLE)
751 }
752 #[doc = r"Writes raw bits to the field"]
753 #[inline(always)]
754 pub fn bits(self, value: u8) -> &'a mut W {
755 self.w.bits = (self.w.bits & !(0x03 << 26)) | (((value as u32) & 0x03) << 26);
756 self.w
757 }
758}
759#[doc = "Reader of field `BYTESWAP`"]
760pub type BYTESWAP_R = crate::R<bool, bool>;
761#[doc = "Write proxy for field `BYTESWAP`"]
762pub struct BYTESWAP_W<'a> {
763 w: &'a mut W,
764}
765impl<'a> BYTESWAP_W<'a> {
766 #[doc = r"Sets the field bit"]
767 #[inline(always)]
768 pub fn set_bit(self) -> &'a mut W {
769 self.bit(true)
770 }
771 #[doc = r"Clears the field bit"]
772 #[inline(always)]
773 pub fn clear_bit(self) -> &'a mut W {
774 self.bit(false)
775 }
776 #[doc = r"Writes raw bits to the field"]
777 #[inline(always)]
778 pub fn bit(self, value: bool) -> &'a mut W {
779 self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28);
780 self.w
781 }
782}
783#[doc = "Reader of field `AUTOTX`"]
784pub type AUTOTX_R = crate::R<bool, bool>;
785#[doc = "Write proxy for field `AUTOTX`"]
786pub struct AUTOTX_W<'a> {
787 w: &'a mut W,
788}
789impl<'a> AUTOTX_W<'a> {
790 #[doc = r"Sets the field bit"]
791 #[inline(always)]
792 pub fn set_bit(self) -> &'a mut W {
793 self.bit(true)
794 }
795 #[doc = r"Clears the field bit"]
796 #[inline(always)]
797 pub fn clear_bit(self) -> &'a mut W {
798 self.bit(false)
799 }
800 #[doc = r"Writes raw bits to the field"]
801 #[inline(always)]
802 pub fn bit(self, value: bool) -> &'a mut W {
803 self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29);
804 self.w
805 }
806}
807#[doc = "Reader of field `MVDIS`"]
808pub type MVDIS_R = crate::R<bool, bool>;
809#[doc = "Write proxy for field `MVDIS`"]
810pub struct MVDIS_W<'a> {
811 w: &'a mut W,
812}
813impl<'a> MVDIS_W<'a> {
814 #[doc = r"Sets the field bit"]
815 #[inline(always)]
816 pub fn set_bit(self) -> &'a mut W {
817 self.bit(true)
818 }
819 #[doc = r"Clears the field bit"]
820 #[inline(always)]
821 pub fn clear_bit(self) -> &'a mut W {
822 self.bit(false)
823 }
824 #[doc = r"Writes raw bits to the field"]
825 #[inline(always)]
826 pub fn bit(self, value: bool) -> &'a mut W {
827 self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30);
828 self.w
829 }
830}
831#[doc = "Reader of field `SMSDELAY`"]
832pub type SMSDELAY_R = crate::R<bool, bool>;
833#[doc = "Write proxy for field `SMSDELAY`"]
834pub struct SMSDELAY_W<'a> {
835 w: &'a mut W,
836}
837impl<'a> SMSDELAY_W<'a> {
838 #[doc = r"Sets the field bit"]
839 #[inline(always)]
840 pub fn set_bit(self) -> &'a mut W {
841 self.bit(true)
842 }
843 #[doc = r"Clears the field bit"]
844 #[inline(always)]
845 pub fn clear_bit(self) -> &'a mut W {
846 self.bit(false)
847 }
848 #[doc = r"Writes raw bits to the field"]
849 #[inline(always)]
850 pub fn bit(self, value: bool) -> &'a mut W {
851 self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31);
852 self.w
853 }
854}
855impl R {
856 #[doc = "Bit 0 - USART Synchronous Mode"]
857 #[inline(always)]
858 pub fn sync(&self) -> SYNC_R {
859 SYNC_R::new((self.bits & 0x01) != 0)
860 }
861 #[doc = "Bit 1 - Loopback Enable"]
862 #[inline(always)]
863 pub fn loopbk(&self) -> LOOPBK_R {
864 LOOPBK_R::new(((self.bits >> 1) & 0x01) != 0)
865 }
866 #[doc = "Bit 2 - Collision Check Enable"]
867 #[inline(always)]
868 pub fn ccen(&self) -> CCEN_R {
869 CCEN_R::new(((self.bits >> 2) & 0x01) != 0)
870 }
871 #[doc = "Bit 3 - Multi-Processor Mode"]
872 #[inline(always)]
873 pub fn mpm(&self) -> MPM_R {
874 MPM_R::new(((self.bits >> 3) & 0x01) != 0)
875 }
876 #[doc = "Bit 4 - Multi-Processor Address-Bit"]
877 #[inline(always)]
878 pub fn mpab(&self) -> MPAB_R {
879 MPAB_R::new(((self.bits >> 4) & 0x01) != 0)
880 }
881 #[doc = "Bits 5:6 - Oversampling"]
882 #[inline(always)]
883 pub fn ovs(&self) -> OVS_R {
884 OVS_R::new(((self.bits >> 5) & 0x03) as u8)
885 }
886 #[doc = "Bit 8 - Clock Polarity"]
887 #[inline(always)]
888 pub fn clkpol(&self) -> CLKPOL_R {
889 CLKPOL_R::new(((self.bits >> 8) & 0x01) != 0)
890 }
891 #[doc = "Bit 9 - Clock Edge For Setup/Sample"]
892 #[inline(always)]
893 pub fn clkpha(&self) -> CLKPHA_R {
894 CLKPHA_R::new(((self.bits >> 9) & 0x01) != 0)
895 }
896 #[doc = "Bit 10 - Most Significant Bit First"]
897 #[inline(always)]
898 pub fn msbf(&self) -> MSBF_R {
899 MSBF_R::new(((self.bits >> 10) & 0x01) != 0)
900 }
901 #[doc = "Bit 11 - Action On Slave-Select In Master Mode"]
902 #[inline(always)]
903 pub fn csma(&self) -> CSMA_R {
904 CSMA_R::new(((self.bits >> 11) & 0x01) != 0)
905 }
906 #[doc = "Bit 12 - TX Buffer Interrupt Level"]
907 #[inline(always)]
908 pub fn txbil(&self) -> TXBIL_R {
909 TXBIL_R::new(((self.bits >> 12) & 0x01) != 0)
910 }
911 #[doc = "Bit 13 - Receiver Input Invert"]
912 #[inline(always)]
913 pub fn rxinv(&self) -> RXINV_R {
914 RXINV_R::new(((self.bits >> 13) & 0x01) != 0)
915 }
916 #[doc = "Bit 14 - Transmitter output Invert"]
917 #[inline(always)]
918 pub fn txinv(&self) -> TXINV_R {
919 TXINV_R::new(((self.bits >> 14) & 0x01) != 0)
920 }
921 #[doc = "Bit 15 - Chip Select Invert"]
922 #[inline(always)]
923 pub fn csinv(&self) -> CSINV_R {
924 CSINV_R::new(((self.bits >> 15) & 0x01) != 0)
925 }
926 #[doc = "Bit 16 - Automatic Chip Select"]
927 #[inline(always)]
928 pub fn autocs(&self) -> AUTOCS_R {
929 AUTOCS_R::new(((self.bits >> 16) & 0x01) != 0)
930 }
931 #[doc = "Bit 17 - Automatic TX Tristate"]
932 #[inline(always)]
933 pub fn autotri(&self) -> AUTOTRI_R {
934 AUTOTRI_R::new(((self.bits >> 17) & 0x01) != 0)
935 }
936 #[doc = "Bit 18 - SmartCard Mode"]
937 #[inline(always)]
938 pub fn scmode(&self) -> SCMODE_R {
939 SCMODE_R::new(((self.bits >> 18) & 0x01) != 0)
940 }
941 #[doc = "Bit 19 - SmartCard Retransmit"]
942 #[inline(always)]
943 pub fn scretrans(&self) -> SCRETRANS_R {
944 SCRETRANS_R::new(((self.bits >> 19) & 0x01) != 0)
945 }
946 #[doc = "Bit 20 - Skip Parity Error Frames"]
947 #[inline(always)]
948 pub fn skipperrf(&self) -> SKIPPERRF_R {
949 SKIPPERRF_R::new(((self.bits >> 20) & 0x01) != 0)
950 }
951 #[doc = "Bit 21 - Bit 8 Default Value"]
952 #[inline(always)]
953 pub fn bit8dv(&self) -> BIT8DV_R {
954 BIT8DV_R::new(((self.bits >> 21) & 0x01) != 0)
955 }
956 #[doc = "Bit 22 - Halt DMA On Error"]
957 #[inline(always)]
958 pub fn errsdma(&self) -> ERRSDMA_R {
959 ERRSDMA_R::new(((self.bits >> 22) & 0x01) != 0)
960 }
961 #[doc = "Bit 23 - Disable RX On Error"]
962 #[inline(always)]
963 pub fn errsrx(&self) -> ERRSRX_R {
964 ERRSRX_R::new(((self.bits >> 23) & 0x01) != 0)
965 }
966 #[doc = "Bit 24 - Disable TX On Error"]
967 #[inline(always)]
968 pub fn errstx(&self) -> ERRSTX_R {
969 ERRSTX_R::new(((self.bits >> 24) & 0x01) != 0)
970 }
971 #[doc = "Bit 25 - Synchronous Slave Setup Early"]
972 #[inline(always)]
973 pub fn sssearly(&self) -> SSSEARLY_R {
974 SSSEARLY_R::new(((self.bits >> 25) & 0x01) != 0)
975 }
976 #[doc = "Bits 26:27 - TX Delay Transmission"]
977 #[inline(always)]
978 pub fn txdelay(&self) -> TXDELAY_R {
979 TXDELAY_R::new(((self.bits >> 26) & 0x03) as u8)
980 }
981 #[doc = "Bit 28 - Byteswap In Double Accesses"]
982 #[inline(always)]
983 pub fn byteswap(&self) -> BYTESWAP_R {
984 BYTESWAP_R::new(((self.bits >> 28) & 0x01) != 0)
985 }
986 #[doc = "Bit 29 - Always Transmit When RX Not Full"]
987 #[inline(always)]
988 pub fn autotx(&self) -> AUTOTX_R {
989 AUTOTX_R::new(((self.bits >> 29) & 0x01) != 0)
990 }
991 #[doc = "Bit 30 - Majority Vote Disable"]
992 #[inline(always)]
993 pub fn mvdis(&self) -> MVDIS_R {
994 MVDIS_R::new(((self.bits >> 30) & 0x01) != 0)
995 }
996 #[doc = "Bit 31 - Synchronous Master Sample Delay"]
997 #[inline(always)]
998 pub fn smsdelay(&self) -> SMSDELAY_R {
999 SMSDELAY_R::new(((self.bits >> 31) & 0x01) != 0)
1000 }
1001}
1002impl W {
1003 #[doc = "Bit 0 - USART Synchronous Mode"]
1004 #[inline(always)]
1005 pub fn sync(&mut self) -> SYNC_W {
1006 SYNC_W { w: self }
1007 }
1008 #[doc = "Bit 1 - Loopback Enable"]
1009 #[inline(always)]
1010 pub fn loopbk(&mut self) -> LOOPBK_W {
1011 LOOPBK_W { w: self }
1012 }
1013 #[doc = "Bit 2 - Collision Check Enable"]
1014 #[inline(always)]
1015 pub fn ccen(&mut self) -> CCEN_W {
1016 CCEN_W { w: self }
1017 }
1018 #[doc = "Bit 3 - Multi-Processor Mode"]
1019 #[inline(always)]
1020 pub fn mpm(&mut self) -> MPM_W {
1021 MPM_W { w: self }
1022 }
1023 #[doc = "Bit 4 - Multi-Processor Address-Bit"]
1024 #[inline(always)]
1025 pub fn mpab(&mut self) -> MPAB_W {
1026 MPAB_W { w: self }
1027 }
1028 #[doc = "Bits 5:6 - Oversampling"]
1029 #[inline(always)]
1030 pub fn ovs(&mut self) -> OVS_W {
1031 OVS_W { w: self }
1032 }
1033 #[doc = "Bit 8 - Clock Polarity"]
1034 #[inline(always)]
1035 pub fn clkpol(&mut self) -> CLKPOL_W {
1036 CLKPOL_W { w: self }
1037 }
1038 #[doc = "Bit 9 - Clock Edge For Setup/Sample"]
1039 #[inline(always)]
1040 pub fn clkpha(&mut self) -> CLKPHA_W {
1041 CLKPHA_W { w: self }
1042 }
1043 #[doc = "Bit 10 - Most Significant Bit First"]
1044 #[inline(always)]
1045 pub fn msbf(&mut self) -> MSBF_W {
1046 MSBF_W { w: self }
1047 }
1048 #[doc = "Bit 11 - Action On Slave-Select In Master Mode"]
1049 #[inline(always)]
1050 pub fn csma(&mut self) -> CSMA_W {
1051 CSMA_W { w: self }
1052 }
1053 #[doc = "Bit 12 - TX Buffer Interrupt Level"]
1054 #[inline(always)]
1055 pub fn txbil(&mut self) -> TXBIL_W {
1056 TXBIL_W { w: self }
1057 }
1058 #[doc = "Bit 13 - Receiver Input Invert"]
1059 #[inline(always)]
1060 pub fn rxinv(&mut self) -> RXINV_W {
1061 RXINV_W { w: self }
1062 }
1063 #[doc = "Bit 14 - Transmitter output Invert"]
1064 #[inline(always)]
1065 pub fn txinv(&mut self) -> TXINV_W {
1066 TXINV_W { w: self }
1067 }
1068 #[doc = "Bit 15 - Chip Select Invert"]
1069 #[inline(always)]
1070 pub fn csinv(&mut self) -> CSINV_W {
1071 CSINV_W { w: self }
1072 }
1073 #[doc = "Bit 16 - Automatic Chip Select"]
1074 #[inline(always)]
1075 pub fn autocs(&mut self) -> AUTOCS_W {
1076 AUTOCS_W { w: self }
1077 }
1078 #[doc = "Bit 17 - Automatic TX Tristate"]
1079 #[inline(always)]
1080 pub fn autotri(&mut self) -> AUTOTRI_W {
1081 AUTOTRI_W { w: self }
1082 }
1083 #[doc = "Bit 18 - SmartCard Mode"]
1084 #[inline(always)]
1085 pub fn scmode(&mut self) -> SCMODE_W {
1086 SCMODE_W { w: self }
1087 }
1088 #[doc = "Bit 19 - SmartCard Retransmit"]
1089 #[inline(always)]
1090 pub fn scretrans(&mut self) -> SCRETRANS_W {
1091 SCRETRANS_W { w: self }
1092 }
1093 #[doc = "Bit 20 - Skip Parity Error Frames"]
1094 #[inline(always)]
1095 pub fn skipperrf(&mut self) -> SKIPPERRF_W {
1096 SKIPPERRF_W { w: self }
1097 }
1098 #[doc = "Bit 21 - Bit 8 Default Value"]
1099 #[inline(always)]
1100 pub fn bit8dv(&mut self) -> BIT8DV_W {
1101 BIT8DV_W { w: self }
1102 }
1103 #[doc = "Bit 22 - Halt DMA On Error"]
1104 #[inline(always)]
1105 pub fn errsdma(&mut self) -> ERRSDMA_W {
1106 ERRSDMA_W { w: self }
1107 }
1108 #[doc = "Bit 23 - Disable RX On Error"]
1109 #[inline(always)]
1110 pub fn errsrx(&mut self) -> ERRSRX_W {
1111 ERRSRX_W { w: self }
1112 }
1113 #[doc = "Bit 24 - Disable TX On Error"]
1114 #[inline(always)]
1115 pub fn errstx(&mut self) -> ERRSTX_W {
1116 ERRSTX_W { w: self }
1117 }
1118 #[doc = "Bit 25 - Synchronous Slave Setup Early"]
1119 #[inline(always)]
1120 pub fn sssearly(&mut self) -> SSSEARLY_W {
1121 SSSEARLY_W { w: self }
1122 }
1123 #[doc = "Bits 26:27 - TX Delay Transmission"]
1124 #[inline(always)]
1125 pub fn txdelay(&mut self) -> TXDELAY_W {
1126 TXDELAY_W { w: self }
1127 }
1128 #[doc = "Bit 28 - Byteswap In Double Accesses"]
1129 #[inline(always)]
1130 pub fn byteswap(&mut self) -> BYTESWAP_W {
1131 BYTESWAP_W { w: self }
1132 }
1133 #[doc = "Bit 29 - Always Transmit When RX Not Full"]
1134 #[inline(always)]
1135 pub fn autotx(&mut self) -> AUTOTX_W {
1136 AUTOTX_W { w: self }
1137 }
1138 #[doc = "Bit 30 - Majority Vote Disable"]
1139 #[inline(always)]
1140 pub fn mvdis(&mut self) -> MVDIS_W {
1141 MVDIS_W { w: self }
1142 }
1143 #[doc = "Bit 31 - Synchronous Master Sample Delay"]
1144 #[inline(always)]
1145 pub fn smsdelay(&mut self) -> SMSDELAY_W {
1146 SMSDELAY_W { w: self }
1147 }
1148}