efm32hg108_pac/dma/
ifs.rs

1#[doc = "Register `IFS` writer"]
2pub struct W(crate::W<IFS_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<IFS_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<IFS_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<IFS_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `CH0DONE` writer - DMA Channel 0 Complete Interrupt Flag Set"]
23pub type CH0DONE_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 0>;
24#[doc = "Field `CH1DONE` writer - DMA Channel 1 Complete Interrupt Flag Set"]
25pub type CH1DONE_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 1>;
26#[doc = "Field `CH2DONE` writer - DMA Channel 2 Complete Interrupt Flag Set"]
27pub type CH2DONE_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 2>;
28#[doc = "Field `CH3DONE` writer - DMA Channel 3 Complete Interrupt Flag Set"]
29pub type CH3DONE_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 3>;
30#[doc = "Field `CH4DONE` writer - DMA Channel 4 Complete Interrupt Flag Set"]
31pub type CH4DONE_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 4>;
32#[doc = "Field `CH5DONE` writer - DMA Channel 5 Complete Interrupt Flag Set"]
33pub type CH5DONE_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 5>;
34#[doc = "Field `ERR` writer - DMA Error Interrupt Flag Set"]
35pub type ERR_W<'a> = crate::BitWriter<'a, u32, IFS_SPEC, bool, 31>;
36impl W {
37    #[doc = "Bit 0 - DMA Channel 0 Complete Interrupt Flag Set"]
38    #[inline(always)]
39    pub fn ch0done(&mut self) -> CH0DONE_W {
40        CH0DONE_W::new(self)
41    }
42    #[doc = "Bit 1 - DMA Channel 1 Complete Interrupt Flag Set"]
43    #[inline(always)]
44    pub fn ch1done(&mut self) -> CH1DONE_W {
45        CH1DONE_W::new(self)
46    }
47    #[doc = "Bit 2 - DMA Channel 2 Complete Interrupt Flag Set"]
48    #[inline(always)]
49    pub fn ch2done(&mut self) -> CH2DONE_W {
50        CH2DONE_W::new(self)
51    }
52    #[doc = "Bit 3 - DMA Channel 3 Complete Interrupt Flag Set"]
53    #[inline(always)]
54    pub fn ch3done(&mut self) -> CH3DONE_W {
55        CH3DONE_W::new(self)
56    }
57    #[doc = "Bit 4 - DMA Channel 4 Complete Interrupt Flag Set"]
58    #[inline(always)]
59    pub fn ch4done(&mut self) -> CH4DONE_W {
60        CH4DONE_W::new(self)
61    }
62    #[doc = "Bit 5 - DMA Channel 5 Complete Interrupt Flag Set"]
63    #[inline(always)]
64    pub fn ch5done(&mut self) -> CH5DONE_W {
65        CH5DONE_W::new(self)
66    }
67    #[doc = "Bit 31 - DMA Error Interrupt Flag Set"]
68    #[inline(always)]
69    pub fn err(&mut self) -> ERR_W {
70        ERR_W::new(self)
71    }
72    #[doc = "Writes raw bits to the register."]
73    #[inline(always)]
74    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
75        self.0.bits(bits);
76        self
77    }
78}
79#[doc = "Interrupt Flag Set Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ifs](index.html) module"]
80pub struct IFS_SPEC;
81impl crate::RegisterSpec for IFS_SPEC {
82    type Ux = u32;
83}
84#[doc = "`write(|w| ..)` method takes [ifs::W](W) writer structure"]
85impl crate::Writable for IFS_SPEC {
86    type Writer = W;
87}
88#[doc = "`reset()` method sets IFS to value 0"]
89impl crate::Resettable for IFS_SPEC {
90    #[inline(always)]
91    fn reset_value() -> Self::Ux {
92        0
93    }
94}
efm32hg108_pac/dma/ifs.rs

efm32hg108_pac/dma/
ifs.rs
