#[doc = "Register `CTRL` reader"]
pub struct R(crate::R<CTRL_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<CTRL_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<CTRL_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<CTRL_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `CTRL` writer"]
pub struct W(crate::W<CTRL_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<CTRL_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<CTRL_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<CTRL_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Mode Select\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum MODE_A {
#[doc = "0: The module is disabled."]
DISABLE = 0,
#[doc = "1: Single input LFACLK oversampling mode (available in EM0-EM2)."]
OVSSINGLE = 1,
#[doc = "2: Externally clocked single input counter mode (available in EM0-EM3)."]
EXTCLKSINGLE = 2,
#[doc = "3: Externally clocked quadrature decoder mode (available in EM0-EM3)."]
EXTCLKQUAD = 3,
}
impl From<MODE_A> for u8 {
#[inline(always)]
fn from(variant: MODE_A) -> Self {
variant as _
}
}
#[doc = "Field `MODE` reader - Mode Select"]
pub type MODE_R = crate::FieldReader<u8, MODE_A>;
impl MODE_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> MODE_A {
match self.bits {
0 => MODE_A::DISABLE,
1 => MODE_A::OVSSINGLE,
2 => MODE_A::EXTCLKSINGLE,
3 => MODE_A::EXTCLKQUAD,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `DISABLE`"]
#[inline(always)]
pub fn is_disable(&self) -> bool {
*self == MODE_A::DISABLE
}
#[doc = "Checks if the value of the field is `OVSSINGLE`"]
#[inline(always)]
pub fn is_ovssingle(&self) -> bool {
*self == MODE_A::OVSSINGLE
}
#[doc = "Checks if the value of the field is `EXTCLKSINGLE`"]
#[inline(always)]
pub fn is_extclksingle(&self) -> bool {
*self == MODE_A::EXTCLKSINGLE
}
#[doc = "Checks if the value of the field is `EXTCLKQUAD`"]
#[inline(always)]
pub fn is_extclkquad(&self) -> bool {
*self == MODE_A::EXTCLKQUAD
}
}
#[doc = "Field `MODE` writer - Mode Select"]
pub type MODE_W<'a> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, MODE_A, 2, 0>;
impl<'a> MODE_W<'a> {
#[doc = "The module is disabled."]
#[inline(always)]
pub fn disable(self) -> &'a mut W {
self.variant(MODE_A::DISABLE)
}
#[doc = "Single input LFACLK oversampling mode (available in EM0-EM2)."]
#[inline(always)]
pub fn ovssingle(self) -> &'a mut W {
self.variant(MODE_A::OVSSINGLE)
}
#[doc = "Externally clocked single input counter mode (available in EM0-EM3)."]
#[inline(always)]
pub fn extclksingle(self) -> &'a mut W {
self.variant(MODE_A::EXTCLKSINGLE)
}
#[doc = "Externally clocked quadrature decoder mode (available in EM0-EM3)."]
#[inline(always)]
pub fn extclkquad(self) -> &'a mut W {
self.variant(MODE_A::EXTCLKQUAD)
}
}
#[doc = "Field `CNTDIR` reader - Non-Quadrature Mode Counter Direction Control"]
pub type CNTDIR_R = crate::BitReader<bool>;
#[doc = "Field `CNTDIR` writer - Non-Quadrature Mode Counter Direction Control"]
pub type CNTDIR_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 2>;
#[doc = "Field `EDGE` reader - Edge Select"]
pub type EDGE_R = crate::BitReader<bool>;
#[doc = "Field `EDGE` writer - Edge Select"]
pub type EDGE_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 3>;
#[doc = "Field `FILT` reader - Enable Digital Pulse Width Filter"]
pub type FILT_R = crate::BitReader<bool>;
#[doc = "Field `FILT` writer - Enable Digital Pulse Width Filter"]
pub type FILT_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 4>;
#[doc = "Field `RSTEN` reader - Enable PCNT Clock Domain Reset"]
pub type RSTEN_R = crate::BitReader<bool>;
#[doc = "Field `RSTEN` writer - Enable PCNT Clock Domain Reset"]
pub type RSTEN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 5>;
#[doc = "Field `HYST` reader - Enable Hysteresis"]
pub type HYST_R = crate::BitReader<bool>;
#[doc = "Field `HYST` writer - Enable Hysteresis"]
pub type HYST_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 8>;
#[doc = "Field `S1CDIR` reader - Count direction determined by S1"]
pub type S1CDIR_R = crate::BitReader<bool>;
#[doc = "Field `S1CDIR` writer - Count direction determined by S1"]
pub type S1CDIR_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 9>;
#[doc = "Controls when the counter counts\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum CNTEV_A {
#[doc = "0: Counts up on up-count and down on down-count events."]
BOTH = 0,
#[doc = "1: Only counts up on up-count events."]
UP = 1,
#[doc = "2: Only counts down on down-count events."]
DOWN = 2,
#[doc = "3: Never counts."]
NONE = 3,
}
impl From<CNTEV_A> for u8 {
#[inline(always)]
fn from(variant: CNTEV_A) -> Self {
variant as _
}
}
#[doc = "Field `CNTEV` reader - Controls when the counter counts"]
pub type CNTEV_R = crate::FieldReader<u8, CNTEV_A>;
impl CNTEV_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> CNTEV_A {
match self.bits {
0 => CNTEV_A::BOTH,
1 => CNTEV_A::UP,
2 => CNTEV_A::DOWN,
3 => CNTEV_A::NONE,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `BOTH`"]
#[inline(always)]
pub fn is_both(&self) -> bool {
*self == CNTEV_A::BOTH
}
#[doc = "Checks if the value of the field is `UP`"]
#[inline(always)]
pub fn is_up(&self) -> bool {
*self == CNTEV_A::UP
}
#[doc = "Checks if the value of the field is `DOWN`"]
#[inline(always)]
pub fn is_down(&self) -> bool {
*self == CNTEV_A::DOWN
}
#[doc = "Checks if the value of the field is `NONE`"]
#[inline(always)]
pub fn is_none(&self) -> bool {
*self == CNTEV_A::NONE
}
}
#[doc = "Field `CNTEV` writer - Controls when the counter counts"]
pub type CNTEV_W<'a> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, CNTEV_A, 2, 10>;
impl<'a> CNTEV_W<'a> {
#[doc = "Counts up on up-count and down on down-count events."]
#[inline(always)]
pub fn both(self) -> &'a mut W {
self.variant(CNTEV_A::BOTH)
}
#[doc = "Only counts up on up-count events."]
#[inline(always)]
pub fn up(self) -> &'a mut W {
self.variant(CNTEV_A::UP)
}
#[doc = "Only counts down on down-count events."]
#[inline(always)]
pub fn down(self) -> &'a mut W {
self.variant(CNTEV_A::DOWN)
}
#[doc = "Never counts."]
#[inline(always)]
pub fn none(self) -> &'a mut W {
self.variant(CNTEV_A::NONE)
}
}
#[doc = "Controls when the auxiliary counter counts\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum AUXCNTEV_A {
#[doc = "0: Never counts."]
NONE = 0,
#[doc = "1: Counts up on up-count events."]
UP = 1,
#[doc = "2: Counts up on down-count events."]
DOWN = 2,
#[doc = "3: Counts up on both up-count and down-count events."]
BOTH = 3,
}
impl From<AUXCNTEV_A> for u8 {
#[inline(always)]
fn from(variant: AUXCNTEV_A) -> Self {
variant as _
}
}
#[doc = "Field `AUXCNTEV` reader - Controls when the auxiliary counter counts"]
pub type AUXCNTEV_R = crate::FieldReader<u8, AUXCNTEV_A>;
impl AUXCNTEV_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> AUXCNTEV_A {
match self.bits {
0 => AUXCNTEV_A::NONE,
1 => AUXCNTEV_A::UP,
2 => AUXCNTEV_A::DOWN,
3 => AUXCNTEV_A::BOTH,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `NONE`"]
#[inline(always)]
pub fn is_none(&self) -> bool {
*self == AUXCNTEV_A::NONE
}
#[doc = "Checks if the value of the field is `UP`"]
#[inline(always)]
pub fn is_up(&self) -> bool {
*self == AUXCNTEV_A::UP
}
#[doc = "Checks if the value of the field is `DOWN`"]
#[inline(always)]
pub fn is_down(&self) -> bool {
*self == AUXCNTEV_A::DOWN
}
#[doc = "Checks if the value of the field is `BOTH`"]
#[inline(always)]
pub fn is_both(&self) -> bool {
*self == AUXCNTEV_A::BOTH
}
}
#[doc = "Field `AUXCNTEV` writer - Controls when the auxiliary counter counts"]
pub type AUXCNTEV_W<'a> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, AUXCNTEV_A, 2, 14>;
impl<'a> AUXCNTEV_W<'a> {
#[doc = "Never counts."]
#[inline(always)]
pub fn none(self) -> &'a mut W {
self.variant(AUXCNTEV_A::NONE)
}
#[doc = "Counts up on up-count events."]
#[inline(always)]
pub fn up(self) -> &'a mut W {
self.variant(AUXCNTEV_A::UP)
}
#[doc = "Counts up on down-count events."]
#[inline(always)]
pub fn down(self) -> &'a mut W {
self.variant(AUXCNTEV_A::DOWN)
}
#[doc = "Counts up on both up-count and down-count events."]
#[inline(always)]
pub fn both(self) -> &'a mut W {
self.variant(AUXCNTEV_A::BOTH)
}
}
impl R {
#[doc = "Bits 0:1 - Mode Select"]
#[inline(always)]
pub fn mode(&self) -> MODE_R {
MODE_R::new((self.bits & 3) as u8)
}
#[doc = "Bit 2 - Non-Quadrature Mode Counter Direction Control"]
#[inline(always)]
pub fn cntdir(&self) -> CNTDIR_R {
CNTDIR_R::new(((self.bits >> 2) & 1) != 0)
}
#[doc = "Bit 3 - Edge Select"]
#[inline(always)]
pub fn edge(&self) -> EDGE_R {
EDGE_R::new(((self.bits >> 3) & 1) != 0)
}
#[doc = "Bit 4 - Enable Digital Pulse Width Filter"]
#[inline(always)]
pub fn filt(&self) -> FILT_R {
FILT_R::new(((self.bits >> 4) & 1) != 0)
}
#[doc = "Bit 5 - Enable PCNT Clock Domain Reset"]
#[inline(always)]
pub fn rsten(&self) -> RSTEN_R {
RSTEN_R::new(((self.bits >> 5) & 1) != 0)
}
#[doc = "Bit 8 - Enable Hysteresis"]
#[inline(always)]
pub fn hyst(&self) -> HYST_R {
HYST_R::new(((self.bits >> 8) & 1) != 0)
}
#[doc = "Bit 9 - Count direction determined by S1"]
#[inline(always)]
pub fn s1cdir(&self) -> S1CDIR_R {
S1CDIR_R::new(((self.bits >> 9) & 1) != 0)
}
#[doc = "Bits 10:11 - Controls when the counter counts"]
#[inline(always)]
pub fn cntev(&self) -> CNTEV_R {
CNTEV_R::new(((self.bits >> 10) & 3) as u8)
}
#[doc = "Bits 14:15 - Controls when the auxiliary counter counts"]
#[inline(always)]
pub fn auxcntev(&self) -> AUXCNTEV_R {
AUXCNTEV_R::new(((self.bits >> 14) & 3) as u8)
}
}
impl W {
#[doc = "Bits 0:1 - Mode Select"]
#[inline(always)]
pub fn mode(&mut self) -> MODE_W {
MODE_W::new(self)
}
#[doc = "Bit 2 - Non-Quadrature Mode Counter Direction Control"]
#[inline(always)]
pub fn cntdir(&mut self) -> CNTDIR_W {
CNTDIR_W::new(self)
}
#[doc = "Bit 3 - Edge Select"]
#[inline(always)]
pub fn edge(&mut self) -> EDGE_W {
EDGE_W::new(self)
}
#[doc = "Bit 4 - Enable Digital Pulse Width Filter"]
#[inline(always)]
pub fn filt(&mut self) -> FILT_W {
FILT_W::new(self)
}
#[doc = "Bit 5 - Enable PCNT Clock Domain Reset"]
#[inline(always)]
pub fn rsten(&mut self) -> RSTEN_W {
RSTEN_W::new(self)
}
#[doc = "Bit 8 - Enable Hysteresis"]
#[inline(always)]
pub fn hyst(&mut self) -> HYST_W {
HYST_W::new(self)
}
#[doc = "Bit 9 - Count direction determined by S1"]
#[inline(always)]
pub fn s1cdir(&mut self) -> S1CDIR_W {
S1CDIR_W::new(self)
}
#[doc = "Bits 10:11 - Controls when the counter counts"]
#[inline(always)]
pub fn cntev(&mut self) -> CNTEV_W {
CNTEV_W::new(self)
}
#[doc = "Bits 14:15 - Controls when the auxiliary counter counts"]
#[inline(always)]
pub fn auxcntev(&mut self) -> AUXCNTEV_W {
AUXCNTEV_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"]
pub struct CTRL_SPEC;
impl crate::RegisterSpec for CTRL_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [ctrl::R](R) reader structure"]
impl crate::Readable for CTRL_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"]
impl crate::Writable for CTRL_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets CTRL to value 0"]
impl crate::Resettable for CTRL_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}