efm32gg12b810/can1/
mir1_ctrl.rs

1#[doc = "Reader of register MIR1_CTRL"]
2pub type R = crate::R<u32, super::MIR1_CTRL>;
3#[doc = "Writer for register MIR1_CTRL"]
4pub type W = crate::W<u32, super::MIR1_CTRL>;
5#[doc = "Register MIR1_CTRL `reset()`'s with value 0"]
6impl crate::ResetValue for super::MIR1_CTRL {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `DLC`"]
14pub type DLC_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `DLC`"]
16pub struct DLC_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> DLC_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u8) -> &'a mut W {
23        self.w.bits = (self.w.bits & !0x0f) | ((value as u32) & 0x0f);
24        self.w
25    }
26}
27#[doc = "Reader of field `EOB`"]
28pub type EOB_R = crate::R<bool, bool>;
29#[doc = "Write proxy for field `EOB`"]
30pub struct EOB_W<'a> {
31    w: &'a mut W,
32}
33impl<'a> EOB_W<'a> {
34    #[doc = r"Sets the field bit"]
35    #[inline(always)]
36    pub fn set_bit(self) -> &'a mut W {
37        self.bit(true)
38    }
39    #[doc = r"Clears the field bit"]
40    #[inline(always)]
41    pub fn clear_bit(self) -> &'a mut W {
42        self.bit(false)
43    }
44    #[doc = r"Writes raw bits to the field"]
45    #[inline(always)]
46    pub fn bit(self, value: bool) -> &'a mut W {
47        self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
48        self.w
49    }
50}
51#[doc = "Reader of field `TXRQST`"]
52pub type TXRQST_R = crate::R<bool, bool>;
53#[doc = "Write proxy for field `TXRQST`"]
54pub struct TXRQST_W<'a> {
55    w: &'a mut W,
56}
57impl<'a> TXRQST_W<'a> {
58    #[doc = r"Sets the field bit"]
59    #[inline(always)]
60    pub fn set_bit(self) -> &'a mut W {
61        self.bit(true)
62    }
63    #[doc = r"Clears the field bit"]
64    #[inline(always)]
65    pub fn clear_bit(self) -> &'a mut W {
66        self.bit(false)
67    }
68    #[doc = r"Writes raw bits to the field"]
69    #[inline(always)]
70    pub fn bit(self, value: bool) -> &'a mut W {
71        self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
72        self.w
73    }
74}
75#[doc = "Reader of field `RMTEN`"]
76pub type RMTEN_R = crate::R<bool, bool>;
77#[doc = "Write proxy for field `RMTEN`"]
78pub struct RMTEN_W<'a> {
79    w: &'a mut W,
80}
81impl<'a> RMTEN_W<'a> {
82    #[doc = r"Sets the field bit"]
83    #[inline(always)]
84    pub fn set_bit(self) -> &'a mut W {
85        self.bit(true)
86    }
87    #[doc = r"Clears the field bit"]
88    #[inline(always)]
89    pub fn clear_bit(self) -> &'a mut W {
90        self.bit(false)
91    }
92    #[doc = r"Writes raw bits to the field"]
93    #[inline(always)]
94    pub fn bit(self, value: bool) -> &'a mut W {
95        self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
96        self.w
97    }
98}
99#[doc = "Reader of field `RXIE`"]
100pub type RXIE_R = crate::R<bool, bool>;
101#[doc = "Write proxy for field `RXIE`"]
102pub struct RXIE_W<'a> {
103    w: &'a mut W,
104}
105impl<'a> RXIE_W<'a> {
106    #[doc = r"Sets the field bit"]
107    #[inline(always)]
108    pub fn set_bit(self) -> &'a mut W {
109        self.bit(true)
110    }
111    #[doc = r"Clears the field bit"]
112    #[inline(always)]
113    pub fn clear_bit(self) -> &'a mut W {
114        self.bit(false)
115    }
116    #[doc = r"Writes raw bits to the field"]
117    #[inline(always)]
118    pub fn bit(self, value: bool) -> &'a mut W {
119        self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
120        self.w
121    }
122}
123#[doc = "Reader of field `TXIE`"]
124pub type TXIE_R = crate::R<bool, bool>;
125#[doc = "Write proxy for field `TXIE`"]
126pub struct TXIE_W<'a> {
127    w: &'a mut W,
128}
129impl<'a> TXIE_W<'a> {
130    #[doc = r"Sets the field bit"]
131    #[inline(always)]
132    pub fn set_bit(self) -> &'a mut W {
133        self.bit(true)
134    }
135    #[doc = r"Clears the field bit"]
136    #[inline(always)]
137    pub fn clear_bit(self) -> &'a mut W {
138        self.bit(false)
139    }
140    #[doc = r"Writes raw bits to the field"]
141    #[inline(always)]
142    pub fn bit(self, value: bool) -> &'a mut W {
143        self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
144        self.w
145    }
146}
147#[doc = "Reader of field `UMASK`"]
148pub type UMASK_R = crate::R<bool, bool>;
149#[doc = "Write proxy for field `UMASK`"]
150pub struct UMASK_W<'a> {
151    w: &'a mut W,
152}
153impl<'a> UMASK_W<'a> {
154    #[doc = r"Sets the field bit"]
155    #[inline(always)]
156    pub fn set_bit(self) -> &'a mut W {
157        self.bit(true)
158    }
159    #[doc = r"Clears the field bit"]
160    #[inline(always)]
161    pub fn clear_bit(self) -> &'a mut W {
162        self.bit(false)
163    }
164    #[doc = r"Writes raw bits to the field"]
165    #[inline(always)]
166    pub fn bit(self, value: bool) -> &'a mut W {
167        self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12);
168        self.w
169    }
170}
171#[doc = "Reader of field `INTPND`"]
172pub type INTPND_R = crate::R<bool, bool>;
173#[doc = "Write proxy for field `INTPND`"]
174pub struct INTPND_W<'a> {
175    w: &'a mut W,
176}
177impl<'a> INTPND_W<'a> {
178    #[doc = r"Sets the field bit"]
179    #[inline(always)]
180    pub fn set_bit(self) -> &'a mut W {
181        self.bit(true)
182    }
183    #[doc = r"Clears the field bit"]
184    #[inline(always)]
185    pub fn clear_bit(self) -> &'a mut W {
186        self.bit(false)
187    }
188    #[doc = r"Writes raw bits to the field"]
189    #[inline(always)]
190    pub fn bit(self, value: bool) -> &'a mut W {
191        self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13);
192        self.w
193    }
194}
195#[doc = "Reader of field `MESSAGEOF`"]
196pub type MESSAGEOF_R = crate::R<bool, bool>;
197#[doc = "Write proxy for field `MESSAGEOF`"]
198pub struct MESSAGEOF_W<'a> {
199    w: &'a mut W,
200}
201impl<'a> MESSAGEOF_W<'a> {
202    #[doc = r"Sets the field bit"]
203    #[inline(always)]
204    pub fn set_bit(self) -> &'a mut W {
205        self.bit(true)
206    }
207    #[doc = r"Clears the field bit"]
208    #[inline(always)]
209    pub fn clear_bit(self) -> &'a mut W {
210        self.bit(false)
211    }
212    #[doc = r"Writes raw bits to the field"]
213    #[inline(always)]
214    pub fn bit(self, value: bool) -> &'a mut W {
215        self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
216        self.w
217    }
218}
219#[doc = "Reader of field `DATAVALID`"]
220pub type DATAVALID_R = crate::R<bool, bool>;
221#[doc = "Write proxy for field `DATAVALID`"]
222pub struct DATAVALID_W<'a> {
223    w: &'a mut W,
224}
225impl<'a> DATAVALID_W<'a> {
226    #[doc = r"Sets the field bit"]
227    #[inline(always)]
228    pub fn set_bit(self) -> &'a mut W {
229        self.bit(true)
230    }
231    #[doc = r"Clears the field bit"]
232    #[inline(always)]
233    pub fn clear_bit(self) -> &'a mut W {
234        self.bit(false)
235    }
236    #[doc = r"Writes raw bits to the field"]
237    #[inline(always)]
238    pub fn bit(self, value: bool) -> &'a mut W {
239        self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
240        self.w
241    }
242}
243impl R {
244    #[doc = "Bits 0:3 - Data Length Code"]
245    #[inline(always)]
246    pub fn dlc(&self) -> DLC_R {
247        DLC_R::new((self.bits & 0x0f) as u8)
248    }
249    #[doc = "Bit 7 - End of Buffer"]
250    #[inline(always)]
251    pub fn eob(&self) -> EOB_R {
252        EOB_R::new(((self.bits >> 7) & 0x01) != 0)
253    }
254    #[doc = "Bit 8 - Transmit Request"]
255    #[inline(always)]
256    pub fn txrqst(&self) -> TXRQST_R {
257        TXRQST_R::new(((self.bits >> 8) & 0x01) != 0)
258    }
259    #[doc = "Bit 9 - Remote Enable"]
260    #[inline(always)]
261    pub fn rmten(&self) -> RMTEN_R {
262        RMTEN_R::new(((self.bits >> 9) & 0x01) != 0)
263    }
264    #[doc = "Bit 10 - Receive Interrupt Enable"]
265    #[inline(always)]
266    pub fn rxie(&self) -> RXIE_R {
267        RXIE_R::new(((self.bits >> 10) & 0x01) != 0)
268    }
269    #[doc = "Bit 11 - Transmit Interrupt Enable"]
270    #[inline(always)]
271    pub fn txie(&self) -> TXIE_R {
272        TXIE_R::new(((self.bits >> 11) & 0x01) != 0)
273    }
274    #[doc = "Bit 12 - Use Acceptance Mask"]
275    #[inline(always)]
276    pub fn umask(&self) -> UMASK_R {
277        UMASK_R::new(((self.bits >> 12) & 0x01) != 0)
278    }
279    #[doc = "Bit 13 - Interrupt Pending"]
280    #[inline(always)]
281    pub fn intpnd(&self) -> INTPND_R {
282        INTPND_R::new(((self.bits >> 13) & 0x01) != 0)
283    }
284    #[doc = "Bit 14 - Message Lost (only Valid for Message Objects With Direction = Receive)"]
285    #[inline(always)]
286    pub fn messageof(&self) -> MESSAGEOF_R {
287        MESSAGEOF_R::new(((self.bits >> 14) & 0x01) != 0)
288    }
289    #[doc = "Bit 15 - New Data"]
290    #[inline(always)]
291    pub fn datavalid(&self) -> DATAVALID_R {
292        DATAVALID_R::new(((self.bits >> 15) & 0x01) != 0)
293    }
294}
295impl W {
296    #[doc = "Bits 0:3 - Data Length Code"]
297    #[inline(always)]
298    pub fn dlc(&mut self) -> DLC_W {
299        DLC_W { w: self }
300    }
301    #[doc = "Bit 7 - End of Buffer"]
302    #[inline(always)]
303    pub fn eob(&mut self) -> EOB_W {
304        EOB_W { w: self }
305    }
306    #[doc = "Bit 8 - Transmit Request"]
307    #[inline(always)]
308    pub fn txrqst(&mut self) -> TXRQST_W {
309        TXRQST_W { w: self }
310    }
311    #[doc = "Bit 9 - Remote Enable"]
312    #[inline(always)]
313    pub fn rmten(&mut self) -> RMTEN_W {
314        RMTEN_W { w: self }
315    }
316    #[doc = "Bit 10 - Receive Interrupt Enable"]
317    #[inline(always)]
318    pub fn rxie(&mut self) -> RXIE_W {
319        RXIE_W { w: self }
320    }
321    #[doc = "Bit 11 - Transmit Interrupt Enable"]
322    #[inline(always)]
323    pub fn txie(&mut self) -> TXIE_W {
324        TXIE_W { w: self }
325    }
326    #[doc = "Bit 12 - Use Acceptance Mask"]
327    #[inline(always)]
328    pub fn umask(&mut self) -> UMASK_W {
329        UMASK_W { w: self }
330    }
331    #[doc = "Bit 13 - Interrupt Pending"]
332    #[inline(always)]
333    pub fn intpnd(&mut self) -> INTPND_W {
334        INTPND_W { w: self }
335    }
336    #[doc = "Bit 14 - Message Lost (only Valid for Message Objects With Direction = Receive)"]
337    #[inline(always)]
338    pub fn messageof(&mut self) -> MESSAGEOF_W {
339        MESSAGEOF_W { w: self }
340    }
341    #[doc = "Bit 15 - New Data"]
342    #[inline(always)]
343    pub fn datavalid(&mut self) -> DATAVALID_W {
344        DATAVALID_W { w: self }
345    }
346}
efm32gg12b810/can1/mir1_ctrl.rs

efm32gg12b810/can1/
mir1_ctrl.rs
