efm32gg12b510_pac/emu/
vmonio0ctrl.rs

1#[doc = "Register `VMONIO0CTRL` reader"]
2pub struct R(crate::R<VMONIO0CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<VMONIO0CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<VMONIO0CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<VMONIO0CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `VMONIO0CTRL` writer"]
17pub struct W(crate::W<VMONIO0CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<VMONIO0CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<VMONIO0CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<VMONIO0CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `EN` reader - Enable"]
38pub type EN_R = crate::BitReader<bool>;
39#[doc = "Field `EN` writer - Enable"]
40pub type EN_W<'a> = crate::BitWriter<'a, u32, VMONIO0CTRL_SPEC, bool, 0>;
41#[doc = "Field `RISEWU` reader - Rise Wakeup"]
42pub type RISEWU_R = crate::BitReader<bool>;
43#[doc = "Field `RISEWU` writer - Rise Wakeup"]
44pub type RISEWU_W<'a> = crate::BitWriter<'a, u32, VMONIO0CTRL_SPEC, bool, 2>;
45#[doc = "Field `FALLWU` reader - Fall Wakeup"]
46pub type FALLWU_R = crate::BitReader<bool>;
47#[doc = "Field `FALLWU` writer - Fall Wakeup"]
48pub type FALLWU_W<'a> = crate::BitWriter<'a, u32, VMONIO0CTRL_SPEC, bool, 3>;
49#[doc = "Field `RETDIS` reader - EM4 IO0 Retention Disable"]
50pub type RETDIS_R = crate::BitReader<bool>;
51#[doc = "Field `RETDIS` writer - EM4 IO0 Retention Disable"]
52pub type RETDIS_W<'a> = crate::BitWriter<'a, u32, VMONIO0CTRL_SPEC, bool, 4>;
53#[doc = "Field `THRESFINE` reader - Threshold Fine Adjust"]
54pub type THRESFINE_R = crate::FieldReader<u8, u8>;
55#[doc = "Field `THRESFINE` writer - Threshold Fine Adjust"]
56pub type THRESFINE_W<'a> = crate::FieldWriter<'a, u32, VMONIO0CTRL_SPEC, u8, u8, 4, 8>;
57#[doc = "Field `THRESCOARSE` reader - Threshold Coarse Adjust"]
58pub type THRESCOARSE_R = crate::FieldReader<u8, u8>;
59#[doc = "Field `THRESCOARSE` writer - Threshold Coarse Adjust"]
60pub type THRESCOARSE_W<'a> = crate::FieldWriter<'a, u32, VMONIO0CTRL_SPEC, u8, u8, 4, 12>;
61impl R {
62    #[doc = "Bit 0 - Enable"]
63    #[inline(always)]
64    pub fn en(&self) -> EN_R {
65        EN_R::new((self.bits & 1) != 0)
66    }
67    #[doc = "Bit 2 - Rise Wakeup"]
68    #[inline(always)]
69    pub fn risewu(&self) -> RISEWU_R {
70        RISEWU_R::new(((self.bits >> 2) & 1) != 0)
71    }
72    #[doc = "Bit 3 - Fall Wakeup"]
73    #[inline(always)]
74    pub fn fallwu(&self) -> FALLWU_R {
75        FALLWU_R::new(((self.bits >> 3) & 1) != 0)
76    }
77    #[doc = "Bit 4 - EM4 IO0 Retention Disable"]
78    #[inline(always)]
79    pub fn retdis(&self) -> RETDIS_R {
80        RETDIS_R::new(((self.bits >> 4) & 1) != 0)
81    }
82    #[doc = "Bits 8:11 - Threshold Fine Adjust"]
83    #[inline(always)]
84    pub fn thresfine(&self) -> THRESFINE_R {
85        THRESFINE_R::new(((self.bits >> 8) & 0x0f) as u8)
86    }
87    #[doc = "Bits 12:15 - Threshold Coarse Adjust"]
88    #[inline(always)]
89    pub fn threscoarse(&self) -> THRESCOARSE_R {
90        THRESCOARSE_R::new(((self.bits >> 12) & 0x0f) as u8)
91    }
92}
93impl W {
94    #[doc = "Bit 0 - Enable"]
95    #[inline(always)]
96    pub fn en(&mut self) -> EN_W {
97        EN_W::new(self)
98    }
99    #[doc = "Bit 2 - Rise Wakeup"]
100    #[inline(always)]
101    pub fn risewu(&mut self) -> RISEWU_W {
102        RISEWU_W::new(self)
103    }
104    #[doc = "Bit 3 - Fall Wakeup"]
105    #[inline(always)]
106    pub fn fallwu(&mut self) -> FALLWU_W {
107        FALLWU_W::new(self)
108    }
109    #[doc = "Bit 4 - EM4 IO0 Retention Disable"]
110    #[inline(always)]
111    pub fn retdis(&mut self) -> RETDIS_W {
112        RETDIS_W::new(self)
113    }
114    #[doc = "Bits 8:11 - Threshold Fine Adjust"]
115    #[inline(always)]
116    pub fn thresfine(&mut self) -> THRESFINE_W {
117        THRESFINE_W::new(self)
118    }
119    #[doc = "Bits 12:15 - Threshold Coarse Adjust"]
120    #[inline(always)]
121    pub fn threscoarse(&mut self) -> THRESCOARSE_W {
122        THRESCOARSE_W::new(self)
123    }
124    #[doc = "Writes raw bits to the register."]
125    #[inline(always)]
126    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
127        self.0.bits(bits);
128        self
129    }
130}
131#[doc = "VMON IOVDD0 Channel Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [vmonio0ctrl](index.html) module"]
132pub struct VMONIO0CTRL_SPEC;
133impl crate::RegisterSpec for VMONIO0CTRL_SPEC {
134    type Ux = u32;
135}
136#[doc = "`read()` method returns [vmonio0ctrl::R](R) reader structure"]
137impl crate::Readable for VMONIO0CTRL_SPEC {
138    type Reader = R;
139}
140#[doc = "`write(|w| ..)` method takes [vmonio0ctrl::W](W) writer structure"]
141impl crate::Writable for VMONIO0CTRL_SPEC {
142    type Writer = W;
143}
144#[doc = "`reset()` method sets VMONIO0CTRL to value 0"]
145impl crate::Resettable for VMONIO0CTRL_SPEC {
146    #[inline(always)]
147    fn reset_value() -> Self::Ux {
148        0
149    }
150}
efm32gg12b510_pac/emu/vmonio0ctrl.rs

efm32gg12b510_pac/emu/
vmonio0ctrl.rs
