efm32gg12b410_pac/qspi0/
flashcommandctrlmem.rs

1#[doc = "Register `FLASHCOMMANDCTRLMEM` reader"]
2pub struct R(crate::R<FLASHCOMMANDCTRLMEM_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<FLASHCOMMANDCTRLMEM_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<FLASHCOMMANDCTRLMEM_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<FLASHCOMMANDCTRLMEM_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `FLASHCOMMANDCTRLMEM` writer"]
17pub struct W(crate::W<FLASHCOMMANDCTRLMEM_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<FLASHCOMMANDCTRLMEM_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<FLASHCOMMANDCTRLMEM_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<FLASHCOMMANDCTRLMEM_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `TRIGGERMEMBANKREQ` writer - Trigger the Memory Bank Data Request"]
38pub type TRIGGERMEMBANKREQ_W<'a> = crate::BitWriter<'a, u32, FLASHCOMMANDCTRLMEM_SPEC, bool, 0>;
39#[doc = "Field `MEMBANKREQINPROGRESS` reader - Memory Bank Data Request in Progress"]
40pub type MEMBANKREQINPROGRESS_R = crate::BitReader<bool>;
41#[doc = "Field `MEMBANKREADDATA` reader - Last Requested Data From the STIG Memory Bank"]
42pub type MEMBANKREADDATA_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `NBOFSTIGREADBYTES` reader - Number of Read Bytes for the Extended STIG"]
44pub type NBOFSTIGREADBYTES_R = crate::FieldReader<u8, u8>;
45#[doc = "Field `NBOFSTIGREADBYTES` writer - Number of Read Bytes for the Extended STIG"]
46pub type NBOFSTIGREADBYTES_W<'a> =
47    crate::FieldWriter<'a, u32, FLASHCOMMANDCTRLMEM_SPEC, u8, u8, 3, 16>;
48#[doc = "Field `MEMBANKADDR` reader - Memory Bank Address"]
49pub type MEMBANKADDR_R = crate::FieldReader<u16, u16>;
50#[doc = "Field `MEMBANKADDR` writer - Memory Bank Address"]
51pub type MEMBANKADDR_W<'a> = crate::FieldWriter<'a, u32, FLASHCOMMANDCTRLMEM_SPEC, u16, u16, 9, 20>;
52impl R {
53    #[doc = "Bit 1 - Memory Bank Data Request in Progress"]
54    #[inline(always)]
55    pub fn membankreqinprogress(&self) -> MEMBANKREQINPROGRESS_R {
56        MEMBANKREQINPROGRESS_R::new(((self.bits >> 1) & 1) != 0)
57    }
58    #[doc = "Bits 8:15 - Last Requested Data From the STIG Memory Bank"]
59    #[inline(always)]
60    pub fn membankreaddata(&self) -> MEMBANKREADDATA_R {
61        MEMBANKREADDATA_R::new(((self.bits >> 8) & 0xff) as u8)
62    }
63    #[doc = "Bits 16:18 - Number of Read Bytes for the Extended STIG"]
64    #[inline(always)]
65    pub fn nbofstigreadbytes(&self) -> NBOFSTIGREADBYTES_R {
66        NBOFSTIGREADBYTES_R::new(((self.bits >> 16) & 7) as u8)
67    }
68    #[doc = "Bits 20:28 - Memory Bank Address"]
69    #[inline(always)]
70    pub fn membankaddr(&self) -> MEMBANKADDR_R {
71        MEMBANKADDR_R::new(((self.bits >> 20) & 0x01ff) as u16)
72    }
73}
74impl W {
75    #[doc = "Bit 0 - Trigger the Memory Bank Data Request"]
76    #[inline(always)]
77    pub fn triggermembankreq(&mut self) -> TRIGGERMEMBANKREQ_W {
78        TRIGGERMEMBANKREQ_W::new(self)
79    }
80    #[doc = "Bits 16:18 - Number of Read Bytes for the Extended STIG"]
81    #[inline(always)]
82    pub fn nbofstigreadbytes(&mut self) -> NBOFSTIGREADBYTES_W {
83        NBOFSTIGREADBYTES_W::new(self)
84    }
85    #[doc = "Bits 20:28 - Memory Bank Address"]
86    #[inline(always)]
87    pub fn membankaddr(&mut self) -> MEMBANKADDR_W {
88        MEMBANKADDR_W::new(self)
89    }
90    #[doc = "Writes raw bits to the register."]
91    #[inline(always)]
92    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
93        self.0.bits(bits);
94        self
95    }
96}
97#[doc = "Flash Command Control Memory Register (STIG)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [flashcommandctrlmem](index.html) module"]
98pub struct FLASHCOMMANDCTRLMEM_SPEC;
99impl crate::RegisterSpec for FLASHCOMMANDCTRLMEM_SPEC {
100    type Ux = u32;
101}
102#[doc = "`read()` method returns [flashcommandctrlmem::R](R) reader structure"]
103impl crate::Readable for FLASHCOMMANDCTRLMEM_SPEC {
104    type Reader = R;
105}
106#[doc = "`write(|w| ..)` method takes [flashcommandctrlmem::W](W) writer structure"]
107impl crate::Writable for FLASHCOMMANDCTRLMEM_SPEC {
108    type Writer = W;
109}
110#[doc = "`reset()` method sets FLASHCOMMANDCTRLMEM to value 0"]
111impl crate::Resettable for FLASHCOMMANDCTRLMEM_SPEC {
112    #[inline(always)]
113    fn reset_value() -> Self::Ux {
114        0
115    }
116}
efm32gg12b410_pac/qspi0/flashcommandctrlmem.rs

efm32gg12b410_pac/qspi0/
flashcommandctrlmem.rs
