efm32gg12b390_pac/cmu/
lfxoctrl.rs

1#[doc = "Register `LFXOCTRL` reader"]
2pub struct R(crate::R<LFXOCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<LFXOCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<LFXOCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<LFXOCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `LFXOCTRL` writer"]
17pub struct W(crate::W<LFXOCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<LFXOCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<LFXOCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<LFXOCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `TUNING` reader - LFXO Internal Capacitor Array Tuning Value"]
38pub type TUNING_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `TUNING` writer - LFXO Internal Capacitor Array Tuning Value"]
40pub type TUNING_W<'a> = crate::FieldWriter<'a, u32, LFXOCTRL_SPEC, u8, u8, 7, 0>;
41#[doc = "LFXO Mode\n\nValue on reset: 0"]
42#[derive(Clone, Copy, Debug, PartialEq)]
43#[repr(u8)]
44pub enum MODE_A {
45    #[doc = "0: 32768 Hz crystal oscillator"]
46    XTAL = 0,
47    #[doc = "1: An AC coupled buffer is coupled in series with LFXTAL_N pin, suitable for external sinus wave (32768 Hz)."]
48    BUFEXTCLK = 1,
49    #[doc = "2: Digital external clock on LFXTAL_N pin. Oscillator is effectively bypassed."]
50    DIGEXTCLK = 2,
51}
52impl From<MODE_A> for u8 {
53    #[inline(always)]
54    fn from(variant: MODE_A) -> Self {
55        variant as _
56    }
57}
58#[doc = "Field `MODE` reader - LFXO Mode"]
59pub type MODE_R = crate::FieldReader<u8, MODE_A>;
60impl MODE_R {
61    #[doc = "Get enumerated values variant"]
62    #[inline(always)]
63    pub fn variant(&self) -> Option<MODE_A> {
64        match self.bits {
65            0 => Some(MODE_A::XTAL),
66            1 => Some(MODE_A::BUFEXTCLK),
67            2 => Some(MODE_A::DIGEXTCLK),
68            _ => None,
69        }
70    }
71    #[doc = "Checks if the value of the field is `XTAL`"]
72    #[inline(always)]
73    pub fn is_xtal(&self) -> bool {
74        *self == MODE_A::XTAL
75    }
76    #[doc = "Checks if the value of the field is `BUFEXTCLK`"]
77    #[inline(always)]
78    pub fn is_bufextclk(&self) -> bool {
79        *self == MODE_A::BUFEXTCLK
80    }
81    #[doc = "Checks if the value of the field is `DIGEXTCLK`"]
82    #[inline(always)]
83    pub fn is_digextclk(&self) -> bool {
84        *self == MODE_A::DIGEXTCLK
85    }
86}
87#[doc = "Field `MODE` writer - LFXO Mode"]
88pub type MODE_W<'a> = crate::FieldWriter<'a, u32, LFXOCTRL_SPEC, u8, MODE_A, 2, 8>;
89impl<'a> MODE_W<'a> {
90    #[doc = "32768 Hz crystal oscillator"]
91    #[inline(always)]
92    pub fn xtal(self) -> &'a mut W {
93        self.variant(MODE_A::XTAL)
94    }
95    #[doc = "An AC coupled buffer is coupled in series with LFXTAL_N pin, suitable for external sinus wave (32768 Hz)."]
96    #[inline(always)]
97    pub fn bufextclk(self) -> &'a mut W {
98        self.variant(MODE_A::BUFEXTCLK)
99    }
100    #[doc = "Digital external clock on LFXTAL_N pin. Oscillator is effectively bypassed."]
101    #[inline(always)]
102    pub fn digextclk(self) -> &'a mut W {
103        self.variant(MODE_A::DIGEXTCLK)
104    }
105}
106#[doc = "Field `GAIN` reader - LFXO Startup Gain"]
107pub type GAIN_R = crate::FieldReader<u8, u8>;
108#[doc = "Field `GAIN` writer - LFXO Startup Gain"]
109pub type GAIN_W<'a> = crate::FieldWriter<'a, u32, LFXOCTRL_SPEC, u8, u8, 2, 11>;
110#[doc = "Field `HIGHAMPL` reader - LFXO High XTAL Oscillation Amplitude Enable"]
111pub type HIGHAMPL_R = crate::BitReader<bool>;
112#[doc = "Field `HIGHAMPL` writer - LFXO High XTAL Oscillation Amplitude Enable"]
113pub type HIGHAMPL_W<'a> = crate::BitWriter<'a, u32, LFXOCTRL_SPEC, bool, 14>;
114#[doc = "Field `AGC` reader - LFXO AGC Enable"]
115pub type AGC_R = crate::BitReader<bool>;
116#[doc = "Field `AGC` writer - LFXO AGC Enable"]
117pub type AGC_W<'a> = crate::BitWriter<'a, u32, LFXOCTRL_SPEC, bool, 15>;
118#[doc = "Field `CUR` reader - LFXO Current Trim"]
119pub type CUR_R = crate::FieldReader<u8, u8>;
120#[doc = "Field `CUR` writer - LFXO Current Trim"]
121pub type CUR_W<'a> = crate::FieldWriter<'a, u32, LFXOCTRL_SPEC, u8, u8, 2, 16>;
122#[doc = "Field `BUFCUR` reader - LFXO Buffer Bias Current"]
123pub type BUFCUR_R = crate::BitReader<bool>;
124#[doc = "Field `BUFCUR` writer - LFXO Buffer Bias Current"]
125pub type BUFCUR_W<'a> = crate::BitWriter<'a, u32, LFXOCTRL_SPEC, bool, 20>;
126#[doc = "LFXO Timeout\n\nValue on reset: 7"]
127#[derive(Clone, Copy, Debug, PartialEq)]
128#[repr(u8)]
129pub enum TIMEOUT_A {
130    #[doc = "0: Timeout period of 2 cycles"]
131    _2CYCLES = 0,
132    #[doc = "1: Timeout period of 256 cycles"]
133    _256CYCLES = 1,
134    #[doc = "2: Timeout period of 1024 cycles"]
135    _1KCYCLES = 2,
136    #[doc = "3: Timeout period of 2048 cycles"]
137    _2KCYCLES = 3,
138    #[doc = "4: Timeout period of 4096 cycles"]
139    _4KCYCLES = 4,
140    #[doc = "5: Timeout period of 8192 cycles"]
141    _8KCYCLES = 5,
142    #[doc = "6: Timeout period of 16384 cycles"]
143    _16KCYCLES = 6,
144    #[doc = "7: Timeout period of 32768 cycles"]
145    _32KCYCLES = 7,
146}
147impl From<TIMEOUT_A> for u8 {
148    #[inline(always)]
149    fn from(variant: TIMEOUT_A) -> Self {
150        variant as _
151    }
152}
153#[doc = "Field `TIMEOUT` reader - LFXO Timeout"]
154pub type TIMEOUT_R = crate::FieldReader<u8, TIMEOUT_A>;
155impl TIMEOUT_R {
156    #[doc = "Get enumerated values variant"]
157    #[inline(always)]
158    pub fn variant(&self) -> TIMEOUT_A {
159        match self.bits {
160            0 => TIMEOUT_A::_2CYCLES,
161            1 => TIMEOUT_A::_256CYCLES,
162            2 => TIMEOUT_A::_1KCYCLES,
163            3 => TIMEOUT_A::_2KCYCLES,
164            4 => TIMEOUT_A::_4KCYCLES,
165            5 => TIMEOUT_A::_8KCYCLES,
166            6 => TIMEOUT_A::_16KCYCLES,
167            7 => TIMEOUT_A::_32KCYCLES,
168            _ => unreachable!(),
169        }
170    }
171    #[doc = "Checks if the value of the field is `_2CYCLES`"]
172    #[inline(always)]
173    pub fn is_2cycles(&self) -> bool {
174        *self == TIMEOUT_A::_2CYCLES
175    }
176    #[doc = "Checks if the value of the field is `_256CYCLES`"]
177    #[inline(always)]
178    pub fn is_256cycles(&self) -> bool {
179        *self == TIMEOUT_A::_256CYCLES
180    }
181    #[doc = "Checks if the value of the field is `_1KCYCLES`"]
182    #[inline(always)]
183    pub fn is_1kcycles(&self) -> bool {
184        *self == TIMEOUT_A::_1KCYCLES
185    }
186    #[doc = "Checks if the value of the field is `_2KCYCLES`"]
187    #[inline(always)]
188    pub fn is_2kcycles(&self) -> bool {
189        *self == TIMEOUT_A::_2KCYCLES
190    }
191    #[doc = "Checks if the value of the field is `_4KCYCLES`"]
192    #[inline(always)]
193    pub fn is_4kcycles(&self) -> bool {
194        *self == TIMEOUT_A::_4KCYCLES
195    }
196    #[doc = "Checks if the value of the field is `_8KCYCLES`"]
197    #[inline(always)]
198    pub fn is_8kcycles(&self) -> bool {
199        *self == TIMEOUT_A::_8KCYCLES
200    }
201    #[doc = "Checks if the value of the field is `_16KCYCLES`"]
202    #[inline(always)]
203    pub fn is_16kcycles(&self) -> bool {
204        *self == TIMEOUT_A::_16KCYCLES
205    }
206    #[doc = "Checks if the value of the field is `_32KCYCLES`"]
207    #[inline(always)]
208    pub fn is_32kcycles(&self) -> bool {
209        *self == TIMEOUT_A::_32KCYCLES
210    }
211}
212#[doc = "Field `TIMEOUT` writer - LFXO Timeout"]
213pub type TIMEOUT_W<'a> = crate::FieldWriterSafe<'a, u32, LFXOCTRL_SPEC, u8, TIMEOUT_A, 3, 24>;
214impl<'a> TIMEOUT_W<'a> {
215    #[doc = "Timeout period of 2 cycles"]
216    #[inline(always)]
217    pub fn _2cycles(self) -> &'a mut W {
218        self.variant(TIMEOUT_A::_2CYCLES)
219    }
220    #[doc = "Timeout period of 256 cycles"]
221    #[inline(always)]
222    pub fn _256cycles(self) -> &'a mut W {
223        self.variant(TIMEOUT_A::_256CYCLES)
224    }
225    #[doc = "Timeout period of 1024 cycles"]
226    #[inline(always)]
227    pub fn _1kcycles(self) -> &'a mut W {
228        self.variant(TIMEOUT_A::_1KCYCLES)
229    }
230    #[doc = "Timeout period of 2048 cycles"]
231    #[inline(always)]
232    pub fn _2kcycles(self) -> &'a mut W {
233        self.variant(TIMEOUT_A::_2KCYCLES)
234    }
235    #[doc = "Timeout period of 4096 cycles"]
236    #[inline(always)]
237    pub fn _4kcycles(self) -> &'a mut W {
238        self.variant(TIMEOUT_A::_4KCYCLES)
239    }
240    #[doc = "Timeout period of 8192 cycles"]
241    #[inline(always)]
242    pub fn _8kcycles(self) -> &'a mut W {
243        self.variant(TIMEOUT_A::_8KCYCLES)
244    }
245    #[doc = "Timeout period of 16384 cycles"]
246    #[inline(always)]
247    pub fn _16kcycles(self) -> &'a mut W {
248        self.variant(TIMEOUT_A::_16KCYCLES)
249    }
250    #[doc = "Timeout period of 32768 cycles"]
251    #[inline(always)]
252    pub fn _32kcycles(self) -> &'a mut W {
253        self.variant(TIMEOUT_A::_32KCYCLES)
254    }
255}
256impl R {
257    #[doc = "Bits 0:6 - LFXO Internal Capacitor Array Tuning Value"]
258    #[inline(always)]
259    pub fn tuning(&self) -> TUNING_R {
260        TUNING_R::new((self.bits & 0x7f) as u8)
261    }
262    #[doc = "Bits 8:9 - LFXO Mode"]
263    #[inline(always)]
264    pub fn mode(&self) -> MODE_R {
265        MODE_R::new(((self.bits >> 8) & 3) as u8)
266    }
267    #[doc = "Bits 11:12 - LFXO Startup Gain"]
268    #[inline(always)]
269    pub fn gain(&self) -> GAIN_R {
270        GAIN_R::new(((self.bits >> 11) & 3) as u8)
271    }
272    #[doc = "Bit 14 - LFXO High XTAL Oscillation Amplitude Enable"]
273    #[inline(always)]
274    pub fn highampl(&self) -> HIGHAMPL_R {
275        HIGHAMPL_R::new(((self.bits >> 14) & 1) != 0)
276    }
277    #[doc = "Bit 15 - LFXO AGC Enable"]
278    #[inline(always)]
279    pub fn agc(&self) -> AGC_R {
280        AGC_R::new(((self.bits >> 15) & 1) != 0)
281    }
282    #[doc = "Bits 16:17 - LFXO Current Trim"]
283    #[inline(always)]
284    pub fn cur(&self) -> CUR_R {
285        CUR_R::new(((self.bits >> 16) & 3) as u8)
286    }
287    #[doc = "Bit 20 - LFXO Buffer Bias Current"]
288    #[inline(always)]
289    pub fn bufcur(&self) -> BUFCUR_R {
290        BUFCUR_R::new(((self.bits >> 20) & 1) != 0)
291    }
292    #[doc = "Bits 24:26 - LFXO Timeout"]
293    #[inline(always)]
294    pub fn timeout(&self) -> TIMEOUT_R {
295        TIMEOUT_R::new(((self.bits >> 24) & 7) as u8)
296    }
297}
298impl W {
299    #[doc = "Bits 0:6 - LFXO Internal Capacitor Array Tuning Value"]
300    #[inline(always)]
301    pub fn tuning(&mut self) -> TUNING_W {
302        TUNING_W::new(self)
303    }
304    #[doc = "Bits 8:9 - LFXO Mode"]
305    #[inline(always)]
306    pub fn mode(&mut self) -> MODE_W {
307        MODE_W::new(self)
308    }
309    #[doc = "Bits 11:12 - LFXO Startup Gain"]
310    #[inline(always)]
311    pub fn gain(&mut self) -> GAIN_W {
312        GAIN_W::new(self)
313    }
314    #[doc = "Bit 14 - LFXO High XTAL Oscillation Amplitude Enable"]
315    #[inline(always)]
316    pub fn highampl(&mut self) -> HIGHAMPL_W {
317        HIGHAMPL_W::new(self)
318    }
319    #[doc = "Bit 15 - LFXO AGC Enable"]
320    #[inline(always)]
321    pub fn agc(&mut self) -> AGC_W {
322        AGC_W::new(self)
323    }
324    #[doc = "Bits 16:17 - LFXO Current Trim"]
325    #[inline(always)]
326    pub fn cur(&mut self) -> CUR_W {
327        CUR_W::new(self)
328    }
329    #[doc = "Bit 20 - LFXO Buffer Bias Current"]
330    #[inline(always)]
331    pub fn bufcur(&mut self) -> BUFCUR_W {
332        BUFCUR_W::new(self)
333    }
334    #[doc = "Bits 24:26 - LFXO Timeout"]
335    #[inline(always)]
336    pub fn timeout(&mut self) -> TIMEOUT_W {
337        TIMEOUT_W::new(self)
338    }
339    #[doc = "Writes raw bits to the register."]
340    #[inline(always)]
341    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
342        self.0.bits(bits);
343        self
344    }
345}
346#[doc = "LFXO Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfxoctrl](index.html) module"]
347pub struct LFXOCTRL_SPEC;
348impl crate::RegisterSpec for LFXOCTRL_SPEC {
349    type Ux = u32;
350}
351#[doc = "`read()` method returns [lfxoctrl::R](R) reader structure"]
352impl crate::Readable for LFXOCTRL_SPEC {
353    type Reader = R;
354}
355#[doc = "`write(|w| ..)` method takes [lfxoctrl::W](W) writer structure"]
356impl crate::Writable for LFXOCTRL_SPEC {
357    type Writer = W;
358}
359#[doc = "`reset()` method sets LFXOCTRL to value 0x0700_9000"]
360impl crate::Resettable for LFXOCTRL_SPEC {
361    #[inline(always)]
362    fn reset_value() -> Self::Ux {
363        0x0700_9000
364    }
365}
efm32gg12b390_pac/cmu/lfxoctrl.rs

efm32gg12b390_pac/cmu/
lfxoctrl.rs
