efm32gg12b330_pac/lesense/
prsctrl.rs

1#[doc = "Register `PRSCTRL` reader"]
2pub struct R(crate::R<PRSCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<PRSCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<PRSCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<PRSCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `PRSCTRL` writer"]
17pub struct W(crate::W<PRSCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<PRSCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<PRSCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<PRSCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `DECCMPVAL` reader - Decoder State Compare Value"]
38pub type DECCMPVAL_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `DECCMPVAL` writer - Decoder State Compare Value"]
40pub type DECCMPVAL_W<'a> = crate::FieldWriter<'a, u32, PRSCTRL_SPEC, u8, u8, 5, 0>;
41#[doc = "Field `DECCMPMASK` reader - Decoder State Compare Value Mask"]
42pub type DECCMPMASK_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `DECCMPMASK` writer - Decoder State Compare Value Mask"]
44pub type DECCMPMASK_W<'a> = crate::FieldWriter<'a, u32, PRSCTRL_SPEC, u8, u8, 5, 8>;
45#[doc = "Field `DECCMPEN` reader - Enable PRS Output DECCMP"]
46pub type DECCMPEN_R = crate::BitReader<bool>;
47#[doc = "Field `DECCMPEN` writer - Enable PRS Output DECCMP"]
48pub type DECCMPEN_W<'a> = crate::BitWriter<'a, u32, PRSCTRL_SPEC, bool, 16>;
49impl R {
50    #[doc = "Bits 0:4 - Decoder State Compare Value"]
51    #[inline(always)]
52    pub fn deccmpval(&self) -> DECCMPVAL_R {
53        DECCMPVAL_R::new((self.bits & 0x1f) as u8)
54    }
55    #[doc = "Bits 8:12 - Decoder State Compare Value Mask"]
56    #[inline(always)]
57    pub fn deccmpmask(&self) -> DECCMPMASK_R {
58        DECCMPMASK_R::new(((self.bits >> 8) & 0x1f) as u8)
59    }
60    #[doc = "Bit 16 - Enable PRS Output DECCMP"]
61    #[inline(always)]
62    pub fn deccmpen(&self) -> DECCMPEN_R {
63        DECCMPEN_R::new(((self.bits >> 16) & 1) != 0)
64    }
65}
66impl W {
67    #[doc = "Bits 0:4 - Decoder State Compare Value"]
68    #[inline(always)]
69    pub fn deccmpval(&mut self) -> DECCMPVAL_W {
70        DECCMPVAL_W::new(self)
71    }
72    #[doc = "Bits 8:12 - Decoder State Compare Value Mask"]
73    #[inline(always)]
74    pub fn deccmpmask(&mut self) -> DECCMPMASK_W {
75        DECCMPMASK_W::new(self)
76    }
77    #[doc = "Bit 16 - Enable PRS Output DECCMP"]
78    #[inline(always)]
79    pub fn deccmpen(&mut self) -> DECCMPEN_W {
80        DECCMPEN_W::new(self)
81    }
82    #[doc = "Writes raw bits to the register."]
83    #[inline(always)]
84    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
85        self.0.bits(bits);
86        self
87    }
88}
89#[doc = "PRS Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prsctrl](index.html) module"]
90pub struct PRSCTRL_SPEC;
91impl crate::RegisterSpec for PRSCTRL_SPEC {
92    type Ux = u32;
93}
94#[doc = "`read()` method returns [prsctrl::R](R) reader structure"]
95impl crate::Readable for PRSCTRL_SPEC {
96    type Reader = R;
97}
98#[doc = "`write(|w| ..)` method takes [prsctrl::W](W) writer structure"]
99impl crate::Writable for PRSCTRL_SPEC {
100    type Writer = W;
101}
102#[doc = "`reset()` method sets PRSCTRL to value 0"]
103impl crate::Resettable for PRSCTRL_SPEC {
104    #[inline(always)]
105    fn reset_value() -> Self::Ux {
106        0
107    }
108}
efm32gg12b330_pac/lesense/prsctrl.rs

efm32gg12b330_pac/lesense/
prsctrl.rs
