efm32gg12b330_pac/cmu/
status.rs

1#[doc = "Register `STATUS` reader"]
2pub struct R(crate::R<STATUS_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<STATUS_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<STATUS_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<STATUS_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `HFRCOENS` reader - HFRCO Enable Status"]
17pub type HFRCOENS_R = crate::BitReader<bool>;
18#[doc = "Field `HFRCORDY` reader - HFRCO Ready"]
19pub type HFRCORDY_R = crate::BitReader<bool>;
20#[doc = "Field `HFXOENS` reader - HFXO Enable Status"]
21pub type HFXOENS_R = crate::BitReader<bool>;
22#[doc = "Field `HFXORDY` reader - HFXO Ready"]
23pub type HFXORDY_R = crate::BitReader<bool>;
24#[doc = "Field `AUXHFRCOENS` reader - AUXHFRCO Enable Status"]
25pub type AUXHFRCOENS_R = crate::BitReader<bool>;
26#[doc = "Field `AUXHFRCORDY` reader - AUXHFRCO Ready"]
27pub type AUXHFRCORDY_R = crate::BitReader<bool>;
28#[doc = "Field `LFRCOENS` reader - LFRCO Enable Status"]
29pub type LFRCOENS_R = crate::BitReader<bool>;
30#[doc = "Field `LFRCORDY` reader - LFRCO Ready"]
31pub type LFRCORDY_R = crate::BitReader<bool>;
32#[doc = "Field `LFXOENS` reader - LFXO Enable Status"]
33pub type LFXOENS_R = crate::BitReader<bool>;
34#[doc = "Field `LFXORDY` reader - LFXO Ready"]
35pub type LFXORDY_R = crate::BitReader<bool>;
36#[doc = "Field `USHFRCOENS` reader - USHFRCO Enable Status"]
37pub type USHFRCOENS_R = crate::BitReader<bool>;
38#[doc = "Field `USHFRCORDY` reader - USHFRCO Ready"]
39pub type USHFRCORDY_R = crate::BitReader<bool>;
40#[doc = "Field `DPLLENS` reader - DPLL Enable Status"]
41pub type DPLLENS_R = crate::BitReader<bool>;
42#[doc = "Field `DPLLRDY` reader - DPLL Ready"]
43pub type DPLLRDY_R = crate::BitReader<bool>;
44#[doc = "Field `CALRDY` reader - Calibration Ready"]
45pub type CALRDY_R = crate::BitReader<bool>;
46#[doc = "Field `PDMCLKENS` reader - PDM Clock Enabled Status"]
47pub type PDMCLKENS_R = crate::BitReader<bool>;
48#[doc = "Field `HFXOPEAKDETRDY` reader - HFXO Peak Detection Ready"]
49pub type HFXOPEAKDETRDY_R = crate::BitReader<bool>;
50#[doc = "Field `HFXOAMPLOW` reader - HFXO Amplitude Tuning Value Too Low"]
51pub type HFXOAMPLOW_R = crate::BitReader<bool>;
52#[doc = "Field `LFXOPHASE` reader - LFXO Clock Phase"]
53pub type LFXOPHASE_R = crate::BitReader<bool>;
54#[doc = "Field `LFRCOPHASE` reader - LFRCO Clock Phase"]
55pub type LFRCOPHASE_R = crate::BitReader<bool>;
56#[doc = "Field `ULFRCOPHASE` reader - ULFRCO Clock Phase"]
57pub type ULFRCOPHASE_R = crate::BitReader<bool>;
58impl R {
59    #[doc = "Bit 0 - HFRCO Enable Status"]
60    #[inline(always)]
61    pub fn hfrcoens(&self) -> HFRCOENS_R {
62        HFRCOENS_R::new((self.bits & 1) != 0)
63    }
64    #[doc = "Bit 1 - HFRCO Ready"]
65    #[inline(always)]
66    pub fn hfrcordy(&self) -> HFRCORDY_R {
67        HFRCORDY_R::new(((self.bits >> 1) & 1) != 0)
68    }
69    #[doc = "Bit 2 - HFXO Enable Status"]
70    #[inline(always)]
71    pub fn hfxoens(&self) -> HFXOENS_R {
72        HFXOENS_R::new(((self.bits >> 2) & 1) != 0)
73    }
74    #[doc = "Bit 3 - HFXO Ready"]
75    #[inline(always)]
76    pub fn hfxordy(&self) -> HFXORDY_R {
77        HFXORDY_R::new(((self.bits >> 3) & 1) != 0)
78    }
79    #[doc = "Bit 4 - AUXHFRCO Enable Status"]
80    #[inline(always)]
81    pub fn auxhfrcoens(&self) -> AUXHFRCOENS_R {
82        AUXHFRCOENS_R::new(((self.bits >> 4) & 1) != 0)
83    }
84    #[doc = "Bit 5 - AUXHFRCO Ready"]
85    #[inline(always)]
86    pub fn auxhfrcordy(&self) -> AUXHFRCORDY_R {
87        AUXHFRCORDY_R::new(((self.bits >> 5) & 1) != 0)
88    }
89    #[doc = "Bit 6 - LFRCO Enable Status"]
90    #[inline(always)]
91    pub fn lfrcoens(&self) -> LFRCOENS_R {
92        LFRCOENS_R::new(((self.bits >> 6) & 1) != 0)
93    }
94    #[doc = "Bit 7 - LFRCO Ready"]
95    #[inline(always)]
96    pub fn lfrcordy(&self) -> LFRCORDY_R {
97        LFRCORDY_R::new(((self.bits >> 7) & 1) != 0)
98    }
99    #[doc = "Bit 8 - LFXO Enable Status"]
100    #[inline(always)]
101    pub fn lfxoens(&self) -> LFXOENS_R {
102        LFXOENS_R::new(((self.bits >> 8) & 1) != 0)
103    }
104    #[doc = "Bit 9 - LFXO Ready"]
105    #[inline(always)]
106    pub fn lfxordy(&self) -> LFXORDY_R {
107        LFXORDY_R::new(((self.bits >> 9) & 1) != 0)
108    }
109    #[doc = "Bit 10 - USHFRCO Enable Status"]
110    #[inline(always)]
111    pub fn ushfrcoens(&self) -> USHFRCOENS_R {
112        USHFRCOENS_R::new(((self.bits >> 10) & 1) != 0)
113    }
114    #[doc = "Bit 11 - USHFRCO Ready"]
115    #[inline(always)]
116    pub fn ushfrcordy(&self) -> USHFRCORDY_R {
117        USHFRCORDY_R::new(((self.bits >> 11) & 1) != 0)
118    }
119    #[doc = "Bit 12 - DPLL Enable Status"]
120    #[inline(always)]
121    pub fn dpllens(&self) -> DPLLENS_R {
122        DPLLENS_R::new(((self.bits >> 12) & 1) != 0)
123    }
124    #[doc = "Bit 13 - DPLL Ready"]
125    #[inline(always)]
126    pub fn dpllrdy(&self) -> DPLLRDY_R {
127        DPLLRDY_R::new(((self.bits >> 13) & 1) != 0)
128    }
129    #[doc = "Bit 16 - Calibration Ready"]
130    #[inline(always)]
131    pub fn calrdy(&self) -> CALRDY_R {
132        CALRDY_R::new(((self.bits >> 16) & 1) != 0)
133    }
134    #[doc = "Bit 19 - PDM Clock Enabled Status"]
135    #[inline(always)]
136    pub fn pdmclkens(&self) -> PDMCLKENS_R {
137        PDMCLKENS_R::new(((self.bits >> 19) & 1) != 0)
138    }
139    #[doc = "Bit 22 - HFXO Peak Detection Ready"]
140    #[inline(always)]
141    pub fn hfxopeakdetrdy(&self) -> HFXOPEAKDETRDY_R {
142        HFXOPEAKDETRDY_R::new(((self.bits >> 22) & 1) != 0)
143    }
144    #[doc = "Bit 25 - HFXO Amplitude Tuning Value Too Low"]
145    #[inline(always)]
146    pub fn hfxoamplow(&self) -> HFXOAMPLOW_R {
147        HFXOAMPLOW_R::new(((self.bits >> 25) & 1) != 0)
148    }
149    #[doc = "Bit 27 - LFXO Clock Phase"]
150    #[inline(always)]
151    pub fn lfxophase(&self) -> LFXOPHASE_R {
152        LFXOPHASE_R::new(((self.bits >> 27) & 1) != 0)
153    }
154    #[doc = "Bit 28 - LFRCO Clock Phase"]
155    #[inline(always)]
156    pub fn lfrcophase(&self) -> LFRCOPHASE_R {
157        LFRCOPHASE_R::new(((self.bits >> 28) & 1) != 0)
158    }
159    #[doc = "Bit 29 - ULFRCO Clock Phase"]
160    #[inline(always)]
161    pub fn ulfrcophase(&self) -> ULFRCOPHASE_R {
162        ULFRCOPHASE_R::new(((self.bits >> 29) & 1) != 0)
163    }
164}
165#[doc = "Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"]
166pub struct STATUS_SPEC;
167impl crate::RegisterSpec for STATUS_SPEC {
168    type Ux = u32;
169}
170#[doc = "`read()` method returns [status::R](R) reader structure"]
171impl crate::Readable for STATUS_SPEC {
172    type Reader = R;
173}
174#[doc = "`reset()` method sets STATUS to value 0x0001_0003"]
175impl crate::Resettable for STATUS_SPEC {
176    #[inline(always)]
177    fn reset_value() -> Self::Ux {
178        0x0001_0003
179    }
180}
efm32gg12b330_pac/cmu/status.rs

efm32gg12b330_pac/cmu/
status.rs
