efm32gg12b130_pac/cmu/
ien.rs

1#[doc = "Register `IEN` reader"]
2pub struct R(crate::R<IEN_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<IEN_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<IEN_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<IEN_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `IEN` writer"]
17pub struct W(crate::W<IEN_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<IEN_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<IEN_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<IEN_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `HFRCORDY` reader - HFRCORDY Interrupt Enable"]
38pub type HFRCORDY_R = crate::BitReader<bool>;
39#[doc = "Field `HFRCORDY` writer - HFRCORDY Interrupt Enable"]
40pub type HFRCORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 0>;
41#[doc = "Field `HFXORDY` reader - HFXORDY Interrupt Enable"]
42pub type HFXORDY_R = crate::BitReader<bool>;
43#[doc = "Field `HFXORDY` writer - HFXORDY Interrupt Enable"]
44pub type HFXORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 1>;
45#[doc = "Field `LFRCORDY` reader - LFRCORDY Interrupt Enable"]
46pub type LFRCORDY_R = crate::BitReader<bool>;
47#[doc = "Field `LFRCORDY` writer - LFRCORDY Interrupt Enable"]
48pub type LFRCORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 2>;
49#[doc = "Field `LFXORDY` reader - LFXORDY Interrupt Enable"]
50pub type LFXORDY_R = crate::BitReader<bool>;
51#[doc = "Field `LFXORDY` writer - LFXORDY Interrupt Enable"]
52pub type LFXORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 3>;
53#[doc = "Field `AUXHFRCORDY` reader - AUXHFRCORDY Interrupt Enable"]
54pub type AUXHFRCORDY_R = crate::BitReader<bool>;
55#[doc = "Field `AUXHFRCORDY` writer - AUXHFRCORDY Interrupt Enable"]
56pub type AUXHFRCORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 4>;
57#[doc = "Field `CALRDY` reader - CALRDY Interrupt Enable"]
58pub type CALRDY_R = crate::BitReader<bool>;
59#[doc = "Field `CALRDY` writer - CALRDY Interrupt Enable"]
60pub type CALRDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 5>;
61#[doc = "Field `CALOF` reader - CALOF Interrupt Enable"]
62pub type CALOF_R = crate::BitReader<bool>;
63#[doc = "Field `CALOF` writer - CALOF Interrupt Enable"]
64pub type CALOF_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 6>;
65#[doc = "Field `USHFRCORDY` reader - USHFRCORDY Interrupt Enable"]
66pub type USHFRCORDY_R = crate::BitReader<bool>;
67#[doc = "Field `USHFRCORDY` writer - USHFRCORDY Interrupt Enable"]
68pub type USHFRCORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 7>;
69#[doc = "Field `HFXODISERR` reader - HFXODISERR Interrupt Enable"]
70pub type HFXODISERR_R = crate::BitReader<bool>;
71#[doc = "Field `HFXODISERR` writer - HFXODISERR Interrupt Enable"]
72pub type HFXODISERR_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 8>;
73#[doc = "Field `HFXOAUTOSW` reader - HFXOAUTOSW Interrupt Enable"]
74pub type HFXOAUTOSW_R = crate::BitReader<bool>;
75#[doc = "Field `HFXOAUTOSW` writer - HFXOAUTOSW Interrupt Enable"]
76pub type HFXOAUTOSW_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 9>;
77#[doc = "Field `HFXOPEAKDETRDY` reader - HFXOPEAKDETRDY Interrupt Enable"]
78pub type HFXOPEAKDETRDY_R = crate::BitReader<bool>;
79#[doc = "Field `HFXOPEAKDETRDY` writer - HFXOPEAKDETRDY Interrupt Enable"]
80pub type HFXOPEAKDETRDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 11>;
81#[doc = "Field `HFRCODIS` reader - HFRCODIS Interrupt Enable"]
82pub type HFRCODIS_R = crate::BitReader<bool>;
83#[doc = "Field `HFRCODIS` writer - HFRCODIS Interrupt Enable"]
84pub type HFRCODIS_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 13>;
85#[doc = "Field `LFTIMEOUTERR` reader - LFTIMEOUTERR Interrupt Enable"]
86pub type LFTIMEOUTERR_R = crate::BitReader<bool>;
87#[doc = "Field `LFTIMEOUTERR` writer - LFTIMEOUTERR Interrupt Enable"]
88pub type LFTIMEOUTERR_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 14>;
89#[doc = "Field `DPLLRDY` reader - DPLLRDY Interrupt Enable"]
90pub type DPLLRDY_R = crate::BitReader<bool>;
91#[doc = "Field `DPLLRDY` writer - DPLLRDY Interrupt Enable"]
92pub type DPLLRDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 15>;
93#[doc = "Field `DPLLLOCKFAILLOW` reader - DPLLLOCKFAILLOW Interrupt Enable"]
94pub type DPLLLOCKFAILLOW_R = crate::BitReader<bool>;
95#[doc = "Field `DPLLLOCKFAILLOW` writer - DPLLLOCKFAILLOW Interrupt Enable"]
96pub type DPLLLOCKFAILLOW_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 16>;
97#[doc = "Field `DPLLLOCKFAILHIGH` reader - DPLLLOCKFAILHIGH Interrupt Enable"]
98pub type DPLLLOCKFAILHIGH_R = crate::BitReader<bool>;
99#[doc = "Field `DPLLLOCKFAILHIGH` writer - DPLLLOCKFAILHIGH Interrupt Enable"]
100pub type DPLLLOCKFAILHIGH_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 17>;
101#[doc = "Field `LFXOEDGE` reader - LFXOEDGE Interrupt Enable"]
102pub type LFXOEDGE_R = crate::BitReader<bool>;
103#[doc = "Field `LFXOEDGE` writer - LFXOEDGE Interrupt Enable"]
104pub type LFXOEDGE_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 27>;
105#[doc = "Field `LFRCOEDGE` reader - LFRCOEDGE Interrupt Enable"]
106pub type LFRCOEDGE_R = crate::BitReader<bool>;
107#[doc = "Field `LFRCOEDGE` writer - LFRCOEDGE Interrupt Enable"]
108pub type LFRCOEDGE_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 28>;
109#[doc = "Field `ULFRCOEDGE` reader - ULFRCOEDGE Interrupt Enable"]
110pub type ULFRCOEDGE_R = crate::BitReader<bool>;
111#[doc = "Field `ULFRCOEDGE` writer - ULFRCOEDGE Interrupt Enable"]
112pub type ULFRCOEDGE_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 29>;
113#[doc = "Field `CMUERR` reader - CMUERR Interrupt Enable"]
114pub type CMUERR_R = crate::BitReader<bool>;
115#[doc = "Field `CMUERR` writer - CMUERR Interrupt Enable"]
116pub type CMUERR_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 31>;
117impl R {
118    #[doc = "Bit 0 - HFRCORDY Interrupt Enable"]
119    #[inline(always)]
120    pub fn hfrcordy(&self) -> HFRCORDY_R {
121        HFRCORDY_R::new((self.bits & 1) != 0)
122    }
123    #[doc = "Bit 1 - HFXORDY Interrupt Enable"]
124    #[inline(always)]
125    pub fn hfxordy(&self) -> HFXORDY_R {
126        HFXORDY_R::new(((self.bits >> 1) & 1) != 0)
127    }
128    #[doc = "Bit 2 - LFRCORDY Interrupt Enable"]
129    #[inline(always)]
130    pub fn lfrcordy(&self) -> LFRCORDY_R {
131        LFRCORDY_R::new(((self.bits >> 2) & 1) != 0)
132    }
133    #[doc = "Bit 3 - LFXORDY Interrupt Enable"]
134    #[inline(always)]
135    pub fn lfxordy(&self) -> LFXORDY_R {
136        LFXORDY_R::new(((self.bits >> 3) & 1) != 0)
137    }
138    #[doc = "Bit 4 - AUXHFRCORDY Interrupt Enable"]
139    #[inline(always)]
140    pub fn auxhfrcordy(&self) -> AUXHFRCORDY_R {
141        AUXHFRCORDY_R::new(((self.bits >> 4) & 1) != 0)
142    }
143    #[doc = "Bit 5 - CALRDY Interrupt Enable"]
144    #[inline(always)]
145    pub fn calrdy(&self) -> CALRDY_R {
146        CALRDY_R::new(((self.bits >> 5) & 1) != 0)
147    }
148    #[doc = "Bit 6 - CALOF Interrupt Enable"]
149    #[inline(always)]
150    pub fn calof(&self) -> CALOF_R {
151        CALOF_R::new(((self.bits >> 6) & 1) != 0)
152    }
153    #[doc = "Bit 7 - USHFRCORDY Interrupt Enable"]
154    #[inline(always)]
155    pub fn ushfrcordy(&self) -> USHFRCORDY_R {
156        USHFRCORDY_R::new(((self.bits >> 7) & 1) != 0)
157    }
158    #[doc = "Bit 8 - HFXODISERR Interrupt Enable"]
159    #[inline(always)]
160    pub fn hfxodiserr(&self) -> HFXODISERR_R {
161        HFXODISERR_R::new(((self.bits >> 8) & 1) != 0)
162    }
163    #[doc = "Bit 9 - HFXOAUTOSW Interrupt Enable"]
164    #[inline(always)]
165    pub fn hfxoautosw(&self) -> HFXOAUTOSW_R {
166        HFXOAUTOSW_R::new(((self.bits >> 9) & 1) != 0)
167    }
168    #[doc = "Bit 11 - HFXOPEAKDETRDY Interrupt Enable"]
169    #[inline(always)]
170    pub fn hfxopeakdetrdy(&self) -> HFXOPEAKDETRDY_R {
171        HFXOPEAKDETRDY_R::new(((self.bits >> 11) & 1) != 0)
172    }
173    #[doc = "Bit 13 - HFRCODIS Interrupt Enable"]
174    #[inline(always)]
175    pub fn hfrcodis(&self) -> HFRCODIS_R {
176        HFRCODIS_R::new(((self.bits >> 13) & 1) != 0)
177    }
178    #[doc = "Bit 14 - LFTIMEOUTERR Interrupt Enable"]
179    #[inline(always)]
180    pub fn lftimeouterr(&self) -> LFTIMEOUTERR_R {
181        LFTIMEOUTERR_R::new(((self.bits >> 14) & 1) != 0)
182    }
183    #[doc = "Bit 15 - DPLLRDY Interrupt Enable"]
184    #[inline(always)]
185    pub fn dpllrdy(&self) -> DPLLRDY_R {
186        DPLLRDY_R::new(((self.bits >> 15) & 1) != 0)
187    }
188    #[doc = "Bit 16 - DPLLLOCKFAILLOW Interrupt Enable"]
189    #[inline(always)]
190    pub fn dplllockfaillow(&self) -> DPLLLOCKFAILLOW_R {
191        DPLLLOCKFAILLOW_R::new(((self.bits >> 16) & 1) != 0)
192    }
193    #[doc = "Bit 17 - DPLLLOCKFAILHIGH Interrupt Enable"]
194    #[inline(always)]
195    pub fn dplllockfailhigh(&self) -> DPLLLOCKFAILHIGH_R {
196        DPLLLOCKFAILHIGH_R::new(((self.bits >> 17) & 1) != 0)
197    }
198    #[doc = "Bit 27 - LFXOEDGE Interrupt Enable"]
199    #[inline(always)]
200    pub fn lfxoedge(&self) -> LFXOEDGE_R {
201        LFXOEDGE_R::new(((self.bits >> 27) & 1) != 0)
202    }
203    #[doc = "Bit 28 - LFRCOEDGE Interrupt Enable"]
204    #[inline(always)]
205    pub fn lfrcoedge(&self) -> LFRCOEDGE_R {
206        LFRCOEDGE_R::new(((self.bits >> 28) & 1) != 0)
207    }
208    #[doc = "Bit 29 - ULFRCOEDGE Interrupt Enable"]
209    #[inline(always)]
210    pub fn ulfrcoedge(&self) -> ULFRCOEDGE_R {
211        ULFRCOEDGE_R::new(((self.bits >> 29) & 1) != 0)
212    }
213    #[doc = "Bit 31 - CMUERR Interrupt Enable"]
214    #[inline(always)]
215    pub fn cmuerr(&self) -> CMUERR_R {
216        CMUERR_R::new(((self.bits >> 31) & 1) != 0)
217    }
218}
219impl W {
220    #[doc = "Bit 0 - HFRCORDY Interrupt Enable"]
221    #[inline(always)]
222    pub fn hfrcordy(&mut self) -> HFRCORDY_W {
223        HFRCORDY_W::new(self)
224    }
225    #[doc = "Bit 1 - HFXORDY Interrupt Enable"]
226    #[inline(always)]
227    pub fn hfxordy(&mut self) -> HFXORDY_W {
228        HFXORDY_W::new(self)
229    }
230    #[doc = "Bit 2 - LFRCORDY Interrupt Enable"]
231    #[inline(always)]
232    pub fn lfrcordy(&mut self) -> LFRCORDY_W {
233        LFRCORDY_W::new(self)
234    }
235    #[doc = "Bit 3 - LFXORDY Interrupt Enable"]
236    #[inline(always)]
237    pub fn lfxordy(&mut self) -> LFXORDY_W {
238        LFXORDY_W::new(self)
239    }
240    #[doc = "Bit 4 - AUXHFRCORDY Interrupt Enable"]
241    #[inline(always)]
242    pub fn auxhfrcordy(&mut self) -> AUXHFRCORDY_W {
243        AUXHFRCORDY_W::new(self)
244    }
245    #[doc = "Bit 5 - CALRDY Interrupt Enable"]
246    #[inline(always)]
247    pub fn calrdy(&mut self) -> CALRDY_W {
248        CALRDY_W::new(self)
249    }
250    #[doc = "Bit 6 - CALOF Interrupt Enable"]
251    #[inline(always)]
252    pub fn calof(&mut self) -> CALOF_W {
253        CALOF_W::new(self)
254    }
255    #[doc = "Bit 7 - USHFRCORDY Interrupt Enable"]
256    #[inline(always)]
257    pub fn ushfrcordy(&mut self) -> USHFRCORDY_W {
258        USHFRCORDY_W::new(self)
259    }
260    #[doc = "Bit 8 - HFXODISERR Interrupt Enable"]
261    #[inline(always)]
262    pub fn hfxodiserr(&mut self) -> HFXODISERR_W {
263        HFXODISERR_W::new(self)
264    }
265    #[doc = "Bit 9 - HFXOAUTOSW Interrupt Enable"]
266    #[inline(always)]
267    pub fn hfxoautosw(&mut self) -> HFXOAUTOSW_W {
268        HFXOAUTOSW_W::new(self)
269    }
270    #[doc = "Bit 11 - HFXOPEAKDETRDY Interrupt Enable"]
271    #[inline(always)]
272    pub fn hfxopeakdetrdy(&mut self) -> HFXOPEAKDETRDY_W {
273        HFXOPEAKDETRDY_W::new(self)
274    }
275    #[doc = "Bit 13 - HFRCODIS Interrupt Enable"]
276    #[inline(always)]
277    pub fn hfrcodis(&mut self) -> HFRCODIS_W {
278        HFRCODIS_W::new(self)
279    }
280    #[doc = "Bit 14 - LFTIMEOUTERR Interrupt Enable"]
281    #[inline(always)]
282    pub fn lftimeouterr(&mut self) -> LFTIMEOUTERR_W {
283        LFTIMEOUTERR_W::new(self)
284    }
285    #[doc = "Bit 15 - DPLLRDY Interrupt Enable"]
286    #[inline(always)]
287    pub fn dpllrdy(&mut self) -> DPLLRDY_W {
288        DPLLRDY_W::new(self)
289    }
290    #[doc = "Bit 16 - DPLLLOCKFAILLOW Interrupt Enable"]
291    #[inline(always)]
292    pub fn dplllockfaillow(&mut self) -> DPLLLOCKFAILLOW_W {
293        DPLLLOCKFAILLOW_W::new(self)
294    }
295    #[doc = "Bit 17 - DPLLLOCKFAILHIGH Interrupt Enable"]
296    #[inline(always)]
297    pub fn dplllockfailhigh(&mut self) -> DPLLLOCKFAILHIGH_W {
298        DPLLLOCKFAILHIGH_W::new(self)
299    }
300    #[doc = "Bit 27 - LFXOEDGE Interrupt Enable"]
301    #[inline(always)]
302    pub fn lfxoedge(&mut self) -> LFXOEDGE_W {
303        LFXOEDGE_W::new(self)
304    }
305    #[doc = "Bit 28 - LFRCOEDGE Interrupt Enable"]
306    #[inline(always)]
307    pub fn lfrcoedge(&mut self) -> LFRCOEDGE_W {
308        LFRCOEDGE_W::new(self)
309    }
310    #[doc = "Bit 29 - ULFRCOEDGE Interrupt Enable"]
311    #[inline(always)]
312    pub fn ulfrcoedge(&mut self) -> ULFRCOEDGE_W {
313        ULFRCOEDGE_W::new(self)
314    }
315    #[doc = "Bit 31 - CMUERR Interrupt Enable"]
316    #[inline(always)]
317    pub fn cmuerr(&mut self) -> CMUERR_W {
318        CMUERR_W::new(self)
319    }
320    #[doc = "Writes raw bits to the register."]
321    #[inline(always)]
322    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
323        self.0.bits(bits);
324        self
325    }
326}
327#[doc = "Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"]
328pub struct IEN_SPEC;
329impl crate::RegisterSpec for IEN_SPEC {
330    type Ux = u32;
331}
332#[doc = "`read()` method returns [ien::R](R) reader structure"]
333impl crate::Readable for IEN_SPEC {
334    type Reader = R;
335}
336#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"]
337impl crate::Writable for IEN_SPEC {
338    type Writer = W;
339}
340#[doc = "`reset()` method sets IEN to value 0"]
341impl crate::Resettable for IEN_SPEC {
342    #[inline(always)]
343    fn reset_value() -> Self::Ux {
344        0
345    }
346}
efm32gg12b130_pac/cmu/ien.rs

efm32gg12b130_pac/cmu/
ien.rs
