efm32gg11b820/wdog0/
ctrl.rs1#[doc = "Reader of register CTRL"]
2pub type R = crate::R<u32, super::CTRL>;
3#[doc = "Writer for register CTRL"]
4pub type W = crate::W<u32, super::CTRL>;
5#[doc = "Register CTRL `reset()`'s with value 0x0f00"]
6impl crate::ResetValue for super::CTRL {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0x0f00
11 }
12}
13#[doc = "Reader of field `EN`"]
14pub type EN_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `EN`"]
16pub struct EN_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> EN_W<'a> {
20 #[doc = r"Sets the field bit"]
21 #[inline(always)]
22 pub fn set_bit(self) -> &'a mut W {
23 self.bit(true)
24 }
25 #[doc = r"Clears the field bit"]
26 #[inline(always)]
27 pub fn clear_bit(self) -> &'a mut W {
28 self.bit(false)
29 }
30 #[doc = r"Writes raw bits to the field"]
31 #[inline(always)]
32 pub fn bit(self, value: bool) -> &'a mut W {
33 self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
34 self.w
35 }
36}
37#[doc = "Reader of field `DEBUGRUN`"]
38pub type DEBUGRUN_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `DEBUGRUN`"]
40pub struct DEBUGRUN_W<'a> {
41 w: &'a mut W,
42}
43impl<'a> DEBUGRUN_W<'a> {
44 #[doc = r"Sets the field bit"]
45 #[inline(always)]
46 pub fn set_bit(self) -> &'a mut W {
47 self.bit(true)
48 }
49 #[doc = r"Clears the field bit"]
50 #[inline(always)]
51 pub fn clear_bit(self) -> &'a mut W {
52 self.bit(false)
53 }
54 #[doc = r"Writes raw bits to the field"]
55 #[inline(always)]
56 pub fn bit(self, value: bool) -> &'a mut W {
57 self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
58 self.w
59 }
60}
61#[doc = "Reader of field `EM2RUN`"]
62pub type EM2RUN_R = crate::R<bool, bool>;
63#[doc = "Write proxy for field `EM2RUN`"]
64pub struct EM2RUN_W<'a> {
65 w: &'a mut W,
66}
67impl<'a> EM2RUN_W<'a> {
68 #[doc = r"Sets the field bit"]
69 #[inline(always)]
70 pub fn set_bit(self) -> &'a mut W {
71 self.bit(true)
72 }
73 #[doc = r"Clears the field bit"]
74 #[inline(always)]
75 pub fn clear_bit(self) -> &'a mut W {
76 self.bit(false)
77 }
78 #[doc = r"Writes raw bits to the field"]
79 #[inline(always)]
80 pub fn bit(self, value: bool) -> &'a mut W {
81 self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
82 self.w
83 }
84}
85#[doc = "Reader of field `EM3RUN`"]
86pub type EM3RUN_R = crate::R<bool, bool>;
87#[doc = "Write proxy for field `EM3RUN`"]
88pub struct EM3RUN_W<'a> {
89 w: &'a mut W,
90}
91impl<'a> EM3RUN_W<'a> {
92 #[doc = r"Sets the field bit"]
93 #[inline(always)]
94 pub fn set_bit(self) -> &'a mut W {
95 self.bit(true)
96 }
97 #[doc = r"Clears the field bit"]
98 #[inline(always)]
99 pub fn clear_bit(self) -> &'a mut W {
100 self.bit(false)
101 }
102 #[doc = r"Writes raw bits to the field"]
103 #[inline(always)]
104 pub fn bit(self, value: bool) -> &'a mut W {
105 self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
106 self.w
107 }
108}
109#[doc = "Reader of field `LOCK`"]
110pub type LOCK_R = crate::R<bool, bool>;
111#[doc = "Write proxy for field `LOCK`"]
112pub struct LOCK_W<'a> {
113 w: &'a mut W,
114}
115impl<'a> LOCK_W<'a> {
116 #[doc = r"Sets the field bit"]
117 #[inline(always)]
118 pub fn set_bit(self) -> &'a mut W {
119 self.bit(true)
120 }
121 #[doc = r"Clears the field bit"]
122 #[inline(always)]
123 pub fn clear_bit(self) -> &'a mut W {
124 self.bit(false)
125 }
126 #[doc = r"Writes raw bits to the field"]
127 #[inline(always)]
128 pub fn bit(self, value: bool) -> &'a mut W {
129 self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
130 self.w
131 }
132}
133#[doc = "Reader of field `EM4BLOCK`"]
134pub type EM4BLOCK_R = crate::R<bool, bool>;
135#[doc = "Write proxy for field `EM4BLOCK`"]
136pub struct EM4BLOCK_W<'a> {
137 w: &'a mut W,
138}
139impl<'a> EM4BLOCK_W<'a> {
140 #[doc = r"Sets the field bit"]
141 #[inline(always)]
142 pub fn set_bit(self) -> &'a mut W {
143 self.bit(true)
144 }
145 #[doc = r"Clears the field bit"]
146 #[inline(always)]
147 pub fn clear_bit(self) -> &'a mut W {
148 self.bit(false)
149 }
150 #[doc = r"Writes raw bits to the field"]
151 #[inline(always)]
152 pub fn bit(self, value: bool) -> &'a mut W {
153 self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
154 self.w
155 }
156}
157#[doc = "Reader of field `SWOSCBLOCK`"]
158pub type SWOSCBLOCK_R = crate::R<bool, bool>;
159#[doc = "Write proxy for field `SWOSCBLOCK`"]
160pub struct SWOSCBLOCK_W<'a> {
161 w: &'a mut W,
162}
163impl<'a> SWOSCBLOCK_W<'a> {
164 #[doc = r"Sets the field bit"]
165 #[inline(always)]
166 pub fn set_bit(self) -> &'a mut W {
167 self.bit(true)
168 }
169 #[doc = r"Clears the field bit"]
170 #[inline(always)]
171 pub fn clear_bit(self) -> &'a mut W {
172 self.bit(false)
173 }
174 #[doc = r"Writes raw bits to the field"]
175 #[inline(always)]
176 pub fn bit(self, value: bool) -> &'a mut W {
177 self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6);
178 self.w
179 }
180}
181#[doc = "Reader of field `PERSEL`"]
182pub type PERSEL_R = crate::R<u8, u8>;
183#[doc = "Write proxy for field `PERSEL`"]
184pub struct PERSEL_W<'a> {
185 w: &'a mut W,
186}
187impl<'a> PERSEL_W<'a> {
188 #[doc = r"Writes raw bits to the field"]
189 #[inline(always)]
190 pub unsafe fn bits(self, value: u8) -> &'a mut W {
191 self.w.bits = (self.w.bits & !(0x0f << 8)) | (((value as u32) & 0x0f) << 8);
192 self.w
193 }
194}
195#[doc = "Watchdog Clock Select\n\nValue on reset: 0"]
196#[derive(Clone, Copy, Debug, PartialEq)]
197#[repr(u8)]
198pub enum CLKSEL_A {
199 #[doc = "0: ULFRCO"]
200 ULFRCO = 0,
201 #[doc = "1: LFRCO"]
202 LFRCO = 1,
203 #[doc = "2: LFXO"]
204 LFXO = 2,
205 #[doc = "3: HFCORECLK"]
206 HFCORECLK = 3,
207}
208impl From<CLKSEL_A> for u8 {
209 #[inline(always)]
210 fn from(variant: CLKSEL_A) -> Self {
211 variant as _
212 }
213}
214#[doc = "Reader of field `CLKSEL`"]
215pub type CLKSEL_R = crate::R<u8, CLKSEL_A>;
216impl CLKSEL_R {
217 #[doc = r"Get enumerated values variant"]
218 #[inline(always)]
219 pub fn variant(&self) -> CLKSEL_A {
220 match self.bits {
221 0 => CLKSEL_A::ULFRCO,
222 1 => CLKSEL_A::LFRCO,
223 2 => CLKSEL_A::LFXO,
224 3 => CLKSEL_A::HFCORECLK,
225 _ => unreachable!(),
226 }
227 }
228 #[doc = "Checks if the value of the field is `ULFRCO`"]
229 #[inline(always)]
230 pub fn is_ulfrco(&self) -> bool {
231 *self == CLKSEL_A::ULFRCO
232 }
233 #[doc = "Checks if the value of the field is `LFRCO`"]
234 #[inline(always)]
235 pub fn is_lfrco(&self) -> bool {
236 *self == CLKSEL_A::LFRCO
237 }
238 #[doc = "Checks if the value of the field is `LFXO`"]
239 #[inline(always)]
240 pub fn is_lfxo(&self) -> bool {
241 *self == CLKSEL_A::LFXO
242 }
243 #[doc = "Checks if the value of the field is `HFCORECLK`"]
244 #[inline(always)]
245 pub fn is_hfcoreclk(&self) -> bool {
246 *self == CLKSEL_A::HFCORECLK
247 }
248}
249#[doc = "Write proxy for field `CLKSEL`"]
250pub struct CLKSEL_W<'a> {
251 w: &'a mut W,
252}
253impl<'a> CLKSEL_W<'a> {
254 #[doc = r"Writes `variant` to the field"]
255 #[inline(always)]
256 pub fn variant(self, variant: CLKSEL_A) -> &'a mut W {
257 {
258 self.bits(variant.into())
259 }
260 }
261 #[doc = "ULFRCO"]
262 #[inline(always)]
263 pub fn ulfrco(self) -> &'a mut W {
264 self.variant(CLKSEL_A::ULFRCO)
265 }
266 #[doc = "LFRCO"]
267 #[inline(always)]
268 pub fn lfrco(self) -> &'a mut W {
269 self.variant(CLKSEL_A::LFRCO)
270 }
271 #[doc = "LFXO"]
272 #[inline(always)]
273 pub fn lfxo(self) -> &'a mut W {
274 self.variant(CLKSEL_A::LFXO)
275 }
276 #[doc = "HFCORECLK"]
277 #[inline(always)]
278 pub fn hfcoreclk(self) -> &'a mut W {
279 self.variant(CLKSEL_A::HFCORECLK)
280 }
281 #[doc = r"Writes raw bits to the field"]
282 #[inline(always)]
283 pub fn bits(self, value: u8) -> &'a mut W {
284 self.w.bits = (self.w.bits & !(0x03 << 12)) | (((value as u32) & 0x03) << 12);
285 self.w
286 }
287}
288#[doc = "Reader of field `WARNSEL`"]
289pub type WARNSEL_R = crate::R<u8, u8>;
290#[doc = "Write proxy for field `WARNSEL`"]
291pub struct WARNSEL_W<'a> {
292 w: &'a mut W,
293}
294impl<'a> WARNSEL_W<'a> {
295 #[doc = r"Writes raw bits to the field"]
296 #[inline(always)]
297 pub unsafe fn bits(self, value: u8) -> &'a mut W {
298 self.w.bits = (self.w.bits & !(0x03 << 16)) | (((value as u32) & 0x03) << 16);
299 self.w
300 }
301}
302#[doc = "Reader of field `WINSEL`"]
303pub type WINSEL_R = crate::R<u8, u8>;
304#[doc = "Write proxy for field `WINSEL`"]
305pub struct WINSEL_W<'a> {
306 w: &'a mut W,
307}
308impl<'a> WINSEL_W<'a> {
309 #[doc = r"Writes raw bits to the field"]
310 #[inline(always)]
311 pub unsafe fn bits(self, value: u8) -> &'a mut W {
312 self.w.bits = (self.w.bits & !(0x07 << 24)) | (((value as u32) & 0x07) << 24);
313 self.w
314 }
315}
316#[doc = "Reader of field `CLRSRC`"]
317pub type CLRSRC_R = crate::R<bool, bool>;
318#[doc = "Write proxy for field `CLRSRC`"]
319pub struct CLRSRC_W<'a> {
320 w: &'a mut W,
321}
322impl<'a> CLRSRC_W<'a> {
323 #[doc = r"Sets the field bit"]
324 #[inline(always)]
325 pub fn set_bit(self) -> &'a mut W {
326 self.bit(true)
327 }
328 #[doc = r"Clears the field bit"]
329 #[inline(always)]
330 pub fn clear_bit(self) -> &'a mut W {
331 self.bit(false)
332 }
333 #[doc = r"Writes raw bits to the field"]
334 #[inline(always)]
335 pub fn bit(self, value: bool) -> &'a mut W {
336 self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30);
337 self.w
338 }
339}
340#[doc = "Reader of field `WDOGRSTDIS`"]
341pub type WDOGRSTDIS_R = crate::R<bool, bool>;
342#[doc = "Write proxy for field `WDOGRSTDIS`"]
343pub struct WDOGRSTDIS_W<'a> {
344 w: &'a mut W,
345}
346impl<'a> WDOGRSTDIS_W<'a> {
347 #[doc = r"Sets the field bit"]
348 #[inline(always)]
349 pub fn set_bit(self) -> &'a mut W {
350 self.bit(true)
351 }
352 #[doc = r"Clears the field bit"]
353 #[inline(always)]
354 pub fn clear_bit(self) -> &'a mut W {
355 self.bit(false)
356 }
357 #[doc = r"Writes raw bits to the field"]
358 #[inline(always)]
359 pub fn bit(self, value: bool) -> &'a mut W {
360 self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31);
361 self.w
362 }
363}
364impl R {
365 #[doc = "Bit 0 - Watchdog Timer Enable"]
366 #[inline(always)]
367 pub fn en(&self) -> EN_R {
368 EN_R::new((self.bits & 0x01) != 0)
369 }
370 #[doc = "Bit 1 - Debug Mode Run Enable"]
371 #[inline(always)]
372 pub fn debugrun(&self) -> DEBUGRUN_R {
373 DEBUGRUN_R::new(((self.bits >> 1) & 0x01) != 0)
374 }
375 #[doc = "Bit 2 - Energy Mode 2 Run Enable"]
376 #[inline(always)]
377 pub fn em2run(&self) -> EM2RUN_R {
378 EM2RUN_R::new(((self.bits >> 2) & 0x01) != 0)
379 }
380 #[doc = "Bit 3 - Energy Mode 3 Run Enable"]
381 #[inline(always)]
382 pub fn em3run(&self) -> EM3RUN_R {
383 EM3RUN_R::new(((self.bits >> 3) & 0x01) != 0)
384 }
385 #[doc = "Bit 4 - Configuration Lock"]
386 #[inline(always)]
387 pub fn lock(&self) -> LOCK_R {
388 LOCK_R::new(((self.bits >> 4) & 0x01) != 0)
389 }
390 #[doc = "Bit 5 - Energy Mode 4 Block"]
391 #[inline(always)]
392 pub fn em4block(&self) -> EM4BLOCK_R {
393 EM4BLOCK_R::new(((self.bits >> 5) & 0x01) != 0)
394 }
395 #[doc = "Bit 6 - Software Oscillator Disable Block"]
396 #[inline(always)]
397 pub fn swoscblock(&self) -> SWOSCBLOCK_R {
398 SWOSCBLOCK_R::new(((self.bits >> 6) & 0x01) != 0)
399 }
400 #[doc = "Bits 8:11 - Watchdog Timeout Period Select"]
401 #[inline(always)]
402 pub fn persel(&self) -> PERSEL_R {
403 PERSEL_R::new(((self.bits >> 8) & 0x0f) as u8)
404 }
405 #[doc = "Bits 12:13 - Watchdog Clock Select"]
406 #[inline(always)]
407 pub fn clksel(&self) -> CLKSEL_R {
408 CLKSEL_R::new(((self.bits >> 12) & 0x03) as u8)
409 }
410 #[doc = "Bits 16:17 - Watchdog Timeout Period Select"]
411 #[inline(always)]
412 pub fn warnsel(&self) -> WARNSEL_R {
413 WARNSEL_R::new(((self.bits >> 16) & 0x03) as u8)
414 }
415 #[doc = "Bits 24:26 - Watchdog Illegal Window Select"]
416 #[inline(always)]
417 pub fn winsel(&self) -> WINSEL_R {
418 WINSEL_R::new(((self.bits >> 24) & 0x07) as u8)
419 }
420 #[doc = "Bit 30 - Watchdog Clear Source"]
421 #[inline(always)]
422 pub fn clrsrc(&self) -> CLRSRC_R {
423 CLRSRC_R::new(((self.bits >> 30) & 0x01) != 0)
424 }
425 #[doc = "Bit 31 - Watchdog Reset Disable"]
426 #[inline(always)]
427 pub fn wdogrstdis(&self) -> WDOGRSTDIS_R {
428 WDOGRSTDIS_R::new(((self.bits >> 31) & 0x01) != 0)
429 }
430}
431impl W {
432 #[doc = "Bit 0 - Watchdog Timer Enable"]
433 #[inline(always)]
434 pub fn en(&mut self) -> EN_W {
435 EN_W { w: self }
436 }
437 #[doc = "Bit 1 - Debug Mode Run Enable"]
438 #[inline(always)]
439 pub fn debugrun(&mut self) -> DEBUGRUN_W {
440 DEBUGRUN_W { w: self }
441 }
442 #[doc = "Bit 2 - Energy Mode 2 Run Enable"]
443 #[inline(always)]
444 pub fn em2run(&mut self) -> EM2RUN_W {
445 EM2RUN_W { w: self }
446 }
447 #[doc = "Bit 3 - Energy Mode 3 Run Enable"]
448 #[inline(always)]
449 pub fn em3run(&mut self) -> EM3RUN_W {
450 EM3RUN_W { w: self }
451 }
452 #[doc = "Bit 4 - Configuration Lock"]
453 #[inline(always)]
454 pub fn lock(&mut self) -> LOCK_W {
455 LOCK_W { w: self }
456 }
457 #[doc = "Bit 5 - Energy Mode 4 Block"]
458 #[inline(always)]
459 pub fn em4block(&mut self) -> EM4BLOCK_W {
460 EM4BLOCK_W { w: self }
461 }
462 #[doc = "Bit 6 - Software Oscillator Disable Block"]
463 #[inline(always)]
464 pub fn swoscblock(&mut self) -> SWOSCBLOCK_W {
465 SWOSCBLOCK_W { w: self }
466 }
467 #[doc = "Bits 8:11 - Watchdog Timeout Period Select"]
468 #[inline(always)]
469 pub fn persel(&mut self) -> PERSEL_W {
470 PERSEL_W { w: self }
471 }
472 #[doc = "Bits 12:13 - Watchdog Clock Select"]
473 #[inline(always)]
474 pub fn clksel(&mut self) -> CLKSEL_W {
475 CLKSEL_W { w: self }
476 }
477 #[doc = "Bits 16:17 - Watchdog Timeout Period Select"]
478 #[inline(always)]
479 pub fn warnsel(&mut self) -> WARNSEL_W {
480 WARNSEL_W { w: self }
481 }
482 #[doc = "Bits 24:26 - Watchdog Illegal Window Select"]
483 #[inline(always)]
484 pub fn winsel(&mut self) -> WINSEL_W {
485 WINSEL_W { w: self }
486 }
487 #[doc = "Bit 30 - Watchdog Clear Source"]
488 #[inline(always)]
489 pub fn clrsrc(&mut self) -> CLRSRC_W {
490 CLRSRC_W { w: self }
491 }
492 #[doc = "Bit 31 - Watchdog Reset Disable"]
493 #[inline(always)]
494 pub fn wdogrstdis(&mut self) -> WDOGRSTDIS_W {
495 WDOGRSTDIS_W { w: self }
496 }
497}