1#[doc = "Reader of register CTRL"]
2pub type R = crate::R<u32, super::CTRL>;
3#[doc = "Writer for register CTRL"]
4pub type W = crate::W<u32, super::CTRL>;
5#[doc = "Register CTRL `reset()`'s with value 0"]
6impl crate::ResetValue for super::CTRL {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Mode\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15#[repr(u8)]
16pub enum MODE_A {
17 #[doc = "0: EBI_AD drives 8 bit data, 8 bit address, ALE not used. Extended address bits can be enabled."]
18 D8A8 = 0,
19 #[doc = "1: EBI_AD drives 16 bit data, 16 bit address, ALE is used for address latching. Extended address bits can be enabled."]
20 D16A16ALE = 1,
21 #[doc = "2: EBI_AD drives 8 bit data, 24 bit address, ALE is used for address latching. Extended address bits can be enabled."]
22 D8A24ALE = 2,
23 #[doc = "3: EBI_AD drives 16 bit data, ALE not used. Extended address bits can be enabled."]
24 D16 = 3,
25}
26impl From<MODE_A> for u8 {
27 #[inline(always)]
28 fn from(variant: MODE_A) -> Self {
29 variant as _
30 }
31}
32#[doc = "Reader of field `MODE`"]
33pub type MODE_R = crate::R<u8, MODE_A>;
34impl MODE_R {
35 #[doc = r"Get enumerated values variant"]
36 #[inline(always)]
37 pub fn variant(&self) -> MODE_A {
38 match self.bits {
39 0 => MODE_A::D8A8,
40 1 => MODE_A::D16A16ALE,
41 2 => MODE_A::D8A24ALE,
42 3 => MODE_A::D16,
43 _ => unreachable!(),
44 }
45 }
46 #[doc = "Checks if the value of the field is `D8A8`"]
47 #[inline(always)]
48 pub fn is_d8a8(&self) -> bool {
49 *self == MODE_A::D8A8
50 }
51 #[doc = "Checks if the value of the field is `D16A16ALE`"]
52 #[inline(always)]
53 pub fn is_d16a16ale(&self) -> bool {
54 *self == MODE_A::D16A16ALE
55 }
56 #[doc = "Checks if the value of the field is `D8A24ALE`"]
57 #[inline(always)]
58 pub fn is_d8a24ale(&self) -> bool {
59 *self == MODE_A::D8A24ALE
60 }
61 #[doc = "Checks if the value of the field is `D16`"]
62 #[inline(always)]
63 pub fn is_d16(&self) -> bool {
64 *self == MODE_A::D16
65 }
66}
67#[doc = "Write proxy for field `MODE`"]
68pub struct MODE_W<'a> {
69 w: &'a mut W,
70}
71impl<'a> MODE_W<'a> {
72 #[doc = r"Writes `variant` to the field"]
73 #[inline(always)]
74 pub fn variant(self, variant: MODE_A) -> &'a mut W {
75 {
76 self.bits(variant.into())
77 }
78 }
79 #[doc = "EBI_AD drives 8 bit data, 8 bit address, ALE not used. Extended address bits can be enabled."]
80 #[inline(always)]
81 pub fn d8a8(self) -> &'a mut W {
82 self.variant(MODE_A::D8A8)
83 }
84 #[doc = "EBI_AD drives 16 bit data, 16 bit address, ALE is used for address latching. Extended address bits can be enabled."]
85 #[inline(always)]
86 pub fn d16a16ale(self) -> &'a mut W {
87 self.variant(MODE_A::D16A16ALE)
88 }
89 #[doc = "EBI_AD drives 8 bit data, 24 bit address, ALE is used for address latching. Extended address bits can be enabled."]
90 #[inline(always)]
91 pub fn d8a24ale(self) -> &'a mut W {
92 self.variant(MODE_A::D8A24ALE)
93 }
94 #[doc = "EBI_AD drives 16 bit data, ALE not used. Extended address bits can be enabled."]
95 #[inline(always)]
96 pub fn d16(self) -> &'a mut W {
97 self.variant(MODE_A::D16)
98 }
99 #[doc = r"Writes raw bits to the field"]
100 #[inline(always)]
101 pub fn bits(self, value: u8) -> &'a mut W {
102 self.w.bits = (self.w.bits & !0x03) | ((value as u32) & 0x03);
103 self.w
104 }
105}
106#[doc = "Mode 1\n\nValue on reset: 0"]
107#[derive(Clone, Copy, Debug, PartialEq)]
108#[repr(u8)]
109pub enum MODE1_A {
110 #[doc = "0: EBI_AD drives 8 bit data, 8 bit address, ALE not used. Extended address bits can be enabled."]
111 D8A8 = 0,
112 #[doc = "1: EBI_AD drives 16 bit data, 16 bit address, ALE is used for address latching. Extended address bits can be enabled."]
113 D16A16ALE = 1,
114 #[doc = "2: EBI_AD drives 8 bit data, 24 bit address, ALE is used for address latching. Extended address bits can be enabled."]
115 D8A24ALE = 2,
116 #[doc = "3: EBI_AD drives 16 bit data, ALE not used. Extended address bits can be enabled."]
117 D16 = 3,
118}
119impl From<MODE1_A> for u8 {
120 #[inline(always)]
121 fn from(variant: MODE1_A) -> Self {
122 variant as _
123 }
124}
125#[doc = "Reader of field `MODE1`"]
126pub type MODE1_R = crate::R<u8, MODE1_A>;
127impl MODE1_R {
128 #[doc = r"Get enumerated values variant"]
129 #[inline(always)]
130 pub fn variant(&self) -> MODE1_A {
131 match self.bits {
132 0 => MODE1_A::D8A8,
133 1 => MODE1_A::D16A16ALE,
134 2 => MODE1_A::D8A24ALE,
135 3 => MODE1_A::D16,
136 _ => unreachable!(),
137 }
138 }
139 #[doc = "Checks if the value of the field is `D8A8`"]
140 #[inline(always)]
141 pub fn is_d8a8(&self) -> bool {
142 *self == MODE1_A::D8A8
143 }
144 #[doc = "Checks if the value of the field is `D16A16ALE`"]
145 #[inline(always)]
146 pub fn is_d16a16ale(&self) -> bool {
147 *self == MODE1_A::D16A16ALE
148 }
149 #[doc = "Checks if the value of the field is `D8A24ALE`"]
150 #[inline(always)]
151 pub fn is_d8a24ale(&self) -> bool {
152 *self == MODE1_A::D8A24ALE
153 }
154 #[doc = "Checks if the value of the field is `D16`"]
155 #[inline(always)]
156 pub fn is_d16(&self) -> bool {
157 *self == MODE1_A::D16
158 }
159}
160#[doc = "Write proxy for field `MODE1`"]
161pub struct MODE1_W<'a> {
162 w: &'a mut W,
163}
164impl<'a> MODE1_W<'a> {
165 #[doc = r"Writes `variant` to the field"]
166 #[inline(always)]
167 pub fn variant(self, variant: MODE1_A) -> &'a mut W {
168 {
169 self.bits(variant.into())
170 }
171 }
172 #[doc = "EBI_AD drives 8 bit data, 8 bit address, ALE not used. Extended address bits can be enabled."]
173 #[inline(always)]
174 pub fn d8a8(self) -> &'a mut W {
175 self.variant(MODE1_A::D8A8)
176 }
177 #[doc = "EBI_AD drives 16 bit data, 16 bit address, ALE is used for address latching. Extended address bits can be enabled."]
178 #[inline(always)]
179 pub fn d16a16ale(self) -> &'a mut W {
180 self.variant(MODE1_A::D16A16ALE)
181 }
182 #[doc = "EBI_AD drives 8 bit data, 24 bit address, ALE is used for address latching. Extended address bits can be enabled."]
183 #[inline(always)]
184 pub fn d8a24ale(self) -> &'a mut W {
185 self.variant(MODE1_A::D8A24ALE)
186 }
187 #[doc = "EBI_AD drives 16 bit data, ALE not used. Extended address bits can be enabled."]
188 #[inline(always)]
189 pub fn d16(self) -> &'a mut W {
190 self.variant(MODE1_A::D16)
191 }
192 #[doc = r"Writes raw bits to the field"]
193 #[inline(always)]
194 pub fn bits(self, value: u8) -> &'a mut W {
195 self.w.bits = (self.w.bits & !(0x03 << 2)) | (((value as u32) & 0x03) << 2);
196 self.w
197 }
198}
199#[doc = "Mode 2\n\nValue on reset: 0"]
200#[derive(Clone, Copy, Debug, PartialEq)]
201#[repr(u8)]
202pub enum MODE2_A {
203 #[doc = "0: EBI_AD drives 8 bit data, 8 bit address, ALE not used. Extended address bits can be enabled."]
204 D8A8 = 0,
205 #[doc = "1: EBI_AD drives 16 bit data, 16 bit address, ALE is used for address latching. Extended address bits can be enabled."]
206 D16A16ALE = 1,
207 #[doc = "2: EBI_AD drives 8 bit data, 24 bit address, ALE is used for address latching. Extended address bits can be enabled."]
208 D8A24ALE = 2,
209 #[doc = "3: EBI_AD drives 16 bit data, ALE not used. Extended address bits can be enabled."]
210 D16 = 3,
211}
212impl From<MODE2_A> for u8 {
213 #[inline(always)]
214 fn from(variant: MODE2_A) -> Self {
215 variant as _
216 }
217}
218#[doc = "Reader of field `MODE2`"]
219pub type MODE2_R = crate::R<u8, MODE2_A>;
220impl MODE2_R {
221 #[doc = r"Get enumerated values variant"]
222 #[inline(always)]
223 pub fn variant(&self) -> MODE2_A {
224 match self.bits {
225 0 => MODE2_A::D8A8,
226 1 => MODE2_A::D16A16ALE,
227 2 => MODE2_A::D8A24ALE,
228 3 => MODE2_A::D16,
229 _ => unreachable!(),
230 }
231 }
232 #[doc = "Checks if the value of the field is `D8A8`"]
233 #[inline(always)]
234 pub fn is_d8a8(&self) -> bool {
235 *self == MODE2_A::D8A8
236 }
237 #[doc = "Checks if the value of the field is `D16A16ALE`"]
238 #[inline(always)]
239 pub fn is_d16a16ale(&self) -> bool {
240 *self == MODE2_A::D16A16ALE
241 }
242 #[doc = "Checks if the value of the field is `D8A24ALE`"]
243 #[inline(always)]
244 pub fn is_d8a24ale(&self) -> bool {
245 *self == MODE2_A::D8A24ALE
246 }
247 #[doc = "Checks if the value of the field is `D16`"]
248 #[inline(always)]
249 pub fn is_d16(&self) -> bool {
250 *self == MODE2_A::D16
251 }
252}
253#[doc = "Write proxy for field `MODE2`"]
254pub struct MODE2_W<'a> {
255 w: &'a mut W,
256}
257impl<'a> MODE2_W<'a> {
258 #[doc = r"Writes `variant` to the field"]
259 #[inline(always)]
260 pub fn variant(self, variant: MODE2_A) -> &'a mut W {
261 {
262 self.bits(variant.into())
263 }
264 }
265 #[doc = "EBI_AD drives 8 bit data, 8 bit address, ALE not used. Extended address bits can be enabled."]
266 #[inline(always)]
267 pub fn d8a8(self) -> &'a mut W {
268 self.variant(MODE2_A::D8A8)
269 }
270 #[doc = "EBI_AD drives 16 bit data, 16 bit address, ALE is used for address latching. Extended address bits can be enabled."]
271 #[inline(always)]
272 pub fn d16a16ale(self) -> &'a mut W {
273 self.variant(MODE2_A::D16A16ALE)
274 }
275 #[doc = "EBI_AD drives 8 bit data, 24 bit address, ALE is used for address latching. Extended address bits can be enabled."]
276 #[inline(always)]
277 pub fn d8a24ale(self) -> &'a mut W {
278 self.variant(MODE2_A::D8A24ALE)
279 }
280 #[doc = "EBI_AD drives 16 bit data, ALE not used. Extended address bits can be enabled."]
281 #[inline(always)]
282 pub fn d16(self) -> &'a mut W {
283 self.variant(MODE2_A::D16)
284 }
285 #[doc = r"Writes raw bits to the field"]
286 #[inline(always)]
287 pub fn bits(self, value: u8) -> &'a mut W {
288 self.w.bits = (self.w.bits & !(0x03 << 4)) | (((value as u32) & 0x03) << 4);
289 self.w
290 }
291}
292#[doc = "Mode 3\n\nValue on reset: 0"]
293#[derive(Clone, Copy, Debug, PartialEq)]
294#[repr(u8)]
295pub enum MODE3_A {
296 #[doc = "0: EBI_AD drives 8 bit data, 8 bit address, ALE not used. Extended address bits can be enabled."]
297 D8A8 = 0,
298 #[doc = "1: EBI_AD drives 16 bit data, 16 bit address, ALE is used for address latching. Extended address bits can be enabled."]
299 D16A16ALE = 1,
300 #[doc = "2: EBI_AD drives 8 bit data, 24 bit address, ALE is used for address latching. Extended address bits can be enabled."]
301 D8A24ALE = 2,
302 #[doc = "3: EBI_AD drives 16 bit data, ALE not used. Extended address bits can be enabled."]
303 D16 = 3,
304}
305impl From<MODE3_A> for u8 {
306 #[inline(always)]
307 fn from(variant: MODE3_A) -> Self {
308 variant as _
309 }
310}
311#[doc = "Reader of field `MODE3`"]
312pub type MODE3_R = crate::R<u8, MODE3_A>;
313impl MODE3_R {
314 #[doc = r"Get enumerated values variant"]
315 #[inline(always)]
316 pub fn variant(&self) -> MODE3_A {
317 match self.bits {
318 0 => MODE3_A::D8A8,
319 1 => MODE3_A::D16A16ALE,
320 2 => MODE3_A::D8A24ALE,
321 3 => MODE3_A::D16,
322 _ => unreachable!(),
323 }
324 }
325 #[doc = "Checks if the value of the field is `D8A8`"]
326 #[inline(always)]
327 pub fn is_d8a8(&self) -> bool {
328 *self == MODE3_A::D8A8
329 }
330 #[doc = "Checks if the value of the field is `D16A16ALE`"]
331 #[inline(always)]
332 pub fn is_d16a16ale(&self) -> bool {
333 *self == MODE3_A::D16A16ALE
334 }
335 #[doc = "Checks if the value of the field is `D8A24ALE`"]
336 #[inline(always)]
337 pub fn is_d8a24ale(&self) -> bool {
338 *self == MODE3_A::D8A24ALE
339 }
340 #[doc = "Checks if the value of the field is `D16`"]
341 #[inline(always)]
342 pub fn is_d16(&self) -> bool {
343 *self == MODE3_A::D16
344 }
345}
346#[doc = "Write proxy for field `MODE3`"]
347pub struct MODE3_W<'a> {
348 w: &'a mut W,
349}
350impl<'a> MODE3_W<'a> {
351 #[doc = r"Writes `variant` to the field"]
352 #[inline(always)]
353 pub fn variant(self, variant: MODE3_A) -> &'a mut W {
354 {
355 self.bits(variant.into())
356 }
357 }
358 #[doc = "EBI_AD drives 8 bit data, 8 bit address, ALE not used. Extended address bits can be enabled."]
359 #[inline(always)]
360 pub fn d8a8(self) -> &'a mut W {
361 self.variant(MODE3_A::D8A8)
362 }
363 #[doc = "EBI_AD drives 16 bit data, 16 bit address, ALE is used for address latching. Extended address bits can be enabled."]
364 #[inline(always)]
365 pub fn d16a16ale(self) -> &'a mut W {
366 self.variant(MODE3_A::D16A16ALE)
367 }
368 #[doc = "EBI_AD drives 8 bit data, 24 bit address, ALE is used for address latching. Extended address bits can be enabled."]
369 #[inline(always)]
370 pub fn d8a24ale(self) -> &'a mut W {
371 self.variant(MODE3_A::D8A24ALE)
372 }
373 #[doc = "EBI_AD drives 16 bit data, ALE not used. Extended address bits can be enabled."]
374 #[inline(always)]
375 pub fn d16(self) -> &'a mut W {
376 self.variant(MODE3_A::D16)
377 }
378 #[doc = r"Writes raw bits to the field"]
379 #[inline(always)]
380 pub fn bits(self, value: u8) -> &'a mut W {
381 self.w.bits = (self.w.bits & !(0x03 << 6)) | (((value as u32) & 0x03) << 6);
382 self.w
383 }
384}
385#[doc = "Reader of field `BANK0EN`"]
386pub type BANK0EN_R = crate::R<bool, bool>;
387#[doc = "Write proxy for field `BANK0EN`"]
388pub struct BANK0EN_W<'a> {
389 w: &'a mut W,
390}
391impl<'a> BANK0EN_W<'a> {
392 #[doc = r"Sets the field bit"]
393 #[inline(always)]
394 pub fn set_bit(self) -> &'a mut W {
395 self.bit(true)
396 }
397 #[doc = r"Clears the field bit"]
398 #[inline(always)]
399 pub fn clear_bit(self) -> &'a mut W {
400 self.bit(false)
401 }
402 #[doc = r"Writes raw bits to the field"]
403 #[inline(always)]
404 pub fn bit(self, value: bool) -> &'a mut W {
405 self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
406 self.w
407 }
408}
409#[doc = "Reader of field `BANK1EN`"]
410pub type BANK1EN_R = crate::R<bool, bool>;
411#[doc = "Write proxy for field `BANK1EN`"]
412pub struct BANK1EN_W<'a> {
413 w: &'a mut W,
414}
415impl<'a> BANK1EN_W<'a> {
416 #[doc = r"Sets the field bit"]
417 #[inline(always)]
418 pub fn set_bit(self) -> &'a mut W {
419 self.bit(true)
420 }
421 #[doc = r"Clears the field bit"]
422 #[inline(always)]
423 pub fn clear_bit(self) -> &'a mut W {
424 self.bit(false)
425 }
426 #[doc = r"Writes raw bits to the field"]
427 #[inline(always)]
428 pub fn bit(self, value: bool) -> &'a mut W {
429 self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
430 self.w
431 }
432}
433#[doc = "Reader of field `BANK2EN`"]
434pub type BANK2EN_R = crate::R<bool, bool>;
435#[doc = "Write proxy for field `BANK2EN`"]
436pub struct BANK2EN_W<'a> {
437 w: &'a mut W,
438}
439impl<'a> BANK2EN_W<'a> {
440 #[doc = r"Sets the field bit"]
441 #[inline(always)]
442 pub fn set_bit(self) -> &'a mut W {
443 self.bit(true)
444 }
445 #[doc = r"Clears the field bit"]
446 #[inline(always)]
447 pub fn clear_bit(self) -> &'a mut W {
448 self.bit(false)
449 }
450 #[doc = r"Writes raw bits to the field"]
451 #[inline(always)]
452 pub fn bit(self, value: bool) -> &'a mut W {
453 self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
454 self.w
455 }
456}
457#[doc = "Reader of field `BANK3EN`"]
458pub type BANK3EN_R = crate::R<bool, bool>;
459#[doc = "Write proxy for field `BANK3EN`"]
460pub struct BANK3EN_W<'a> {
461 w: &'a mut W,
462}
463impl<'a> BANK3EN_W<'a> {
464 #[doc = r"Sets the field bit"]
465 #[inline(always)]
466 pub fn set_bit(self) -> &'a mut W {
467 self.bit(true)
468 }
469 #[doc = r"Clears the field bit"]
470 #[inline(always)]
471 pub fn clear_bit(self) -> &'a mut W {
472 self.bit(false)
473 }
474 #[doc = r"Writes raw bits to the field"]
475 #[inline(always)]
476 pub fn bit(self, value: bool) -> &'a mut W {
477 self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
478 self.w
479 }
480}
481#[doc = "Reader of field `NOIDLE`"]
482pub type NOIDLE_R = crate::R<bool, bool>;
483#[doc = "Write proxy for field `NOIDLE`"]
484pub struct NOIDLE_W<'a> {
485 w: &'a mut W,
486}
487impl<'a> NOIDLE_W<'a> {
488 #[doc = r"Sets the field bit"]
489 #[inline(always)]
490 pub fn set_bit(self) -> &'a mut W {
491 self.bit(true)
492 }
493 #[doc = r"Clears the field bit"]
494 #[inline(always)]
495 pub fn clear_bit(self) -> &'a mut W {
496 self.bit(false)
497 }
498 #[doc = r"Writes raw bits to the field"]
499 #[inline(always)]
500 pub fn bit(self, value: bool) -> &'a mut W {
501 self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12);
502 self.w
503 }
504}
505#[doc = "Reader of field `NOIDLE1`"]
506pub type NOIDLE1_R = crate::R<bool, bool>;
507#[doc = "Write proxy for field `NOIDLE1`"]
508pub struct NOIDLE1_W<'a> {
509 w: &'a mut W,
510}
511impl<'a> NOIDLE1_W<'a> {
512 #[doc = r"Sets the field bit"]
513 #[inline(always)]
514 pub fn set_bit(self) -> &'a mut W {
515 self.bit(true)
516 }
517 #[doc = r"Clears the field bit"]
518 #[inline(always)]
519 pub fn clear_bit(self) -> &'a mut W {
520 self.bit(false)
521 }
522 #[doc = r"Writes raw bits to the field"]
523 #[inline(always)]
524 pub fn bit(self, value: bool) -> &'a mut W {
525 self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13);
526 self.w
527 }
528}
529#[doc = "Reader of field `NOIDLE2`"]
530pub type NOIDLE2_R = crate::R<bool, bool>;
531#[doc = "Write proxy for field `NOIDLE2`"]
532pub struct NOIDLE2_W<'a> {
533 w: &'a mut W,
534}
535impl<'a> NOIDLE2_W<'a> {
536 #[doc = r"Sets the field bit"]
537 #[inline(always)]
538 pub fn set_bit(self) -> &'a mut W {
539 self.bit(true)
540 }
541 #[doc = r"Clears the field bit"]
542 #[inline(always)]
543 pub fn clear_bit(self) -> &'a mut W {
544 self.bit(false)
545 }
546 #[doc = r"Writes raw bits to the field"]
547 #[inline(always)]
548 pub fn bit(self, value: bool) -> &'a mut W {
549 self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
550 self.w
551 }
552}
553#[doc = "Reader of field `NOIDLE3`"]
554pub type NOIDLE3_R = crate::R<bool, bool>;
555#[doc = "Write proxy for field `NOIDLE3`"]
556pub struct NOIDLE3_W<'a> {
557 w: &'a mut W,
558}
559impl<'a> NOIDLE3_W<'a> {
560 #[doc = r"Sets the field bit"]
561 #[inline(always)]
562 pub fn set_bit(self) -> &'a mut W {
563 self.bit(true)
564 }
565 #[doc = r"Clears the field bit"]
566 #[inline(always)]
567 pub fn clear_bit(self) -> &'a mut W {
568 self.bit(false)
569 }
570 #[doc = r"Writes raw bits to the field"]
571 #[inline(always)]
572 pub fn bit(self, value: bool) -> &'a mut W {
573 self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
574 self.w
575 }
576}
577#[doc = "Reader of field `ARDYEN`"]
578pub type ARDYEN_R = crate::R<bool, bool>;
579#[doc = "Write proxy for field `ARDYEN`"]
580pub struct ARDYEN_W<'a> {
581 w: &'a mut W,
582}
583impl<'a> ARDYEN_W<'a> {
584 #[doc = r"Sets the field bit"]
585 #[inline(always)]
586 pub fn set_bit(self) -> &'a mut W {
587 self.bit(true)
588 }
589 #[doc = r"Clears the field bit"]
590 #[inline(always)]
591 pub fn clear_bit(self) -> &'a mut W {
592 self.bit(false)
593 }
594 #[doc = r"Writes raw bits to the field"]
595 #[inline(always)]
596 pub fn bit(self, value: bool) -> &'a mut W {
597 self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
598 self.w
599 }
600}
601#[doc = "Reader of field `ARDYTODIS`"]
602pub type ARDYTODIS_R = crate::R<bool, bool>;
603#[doc = "Write proxy for field `ARDYTODIS`"]
604pub struct ARDYTODIS_W<'a> {
605 w: &'a mut W,
606}
607impl<'a> ARDYTODIS_W<'a> {
608 #[doc = r"Sets the field bit"]
609 #[inline(always)]
610 pub fn set_bit(self) -> &'a mut W {
611 self.bit(true)
612 }
613 #[doc = r"Clears the field bit"]
614 #[inline(always)]
615 pub fn clear_bit(self) -> &'a mut W {
616 self.bit(false)
617 }
618 #[doc = r"Writes raw bits to the field"]
619 #[inline(always)]
620 pub fn bit(self, value: bool) -> &'a mut W {
621 self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17);
622 self.w
623 }
624}
625#[doc = "Reader of field `ARDY1EN`"]
626pub type ARDY1EN_R = crate::R<bool, bool>;
627#[doc = "Write proxy for field `ARDY1EN`"]
628pub struct ARDY1EN_W<'a> {
629 w: &'a mut W,
630}
631impl<'a> ARDY1EN_W<'a> {
632 #[doc = r"Sets the field bit"]
633 #[inline(always)]
634 pub fn set_bit(self) -> &'a mut W {
635 self.bit(true)
636 }
637 #[doc = r"Clears the field bit"]
638 #[inline(always)]
639 pub fn clear_bit(self) -> &'a mut W {
640 self.bit(false)
641 }
642 #[doc = r"Writes raw bits to the field"]
643 #[inline(always)]
644 pub fn bit(self, value: bool) -> &'a mut W {
645 self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18);
646 self.w
647 }
648}
649#[doc = "Reader of field `ARDYTO1DIS`"]
650pub type ARDYTO1DIS_R = crate::R<bool, bool>;
651#[doc = "Write proxy for field `ARDYTO1DIS`"]
652pub struct ARDYTO1DIS_W<'a> {
653 w: &'a mut W,
654}
655impl<'a> ARDYTO1DIS_W<'a> {
656 #[doc = r"Sets the field bit"]
657 #[inline(always)]
658 pub fn set_bit(self) -> &'a mut W {
659 self.bit(true)
660 }
661 #[doc = r"Clears the field bit"]
662 #[inline(always)]
663 pub fn clear_bit(self) -> &'a mut W {
664 self.bit(false)
665 }
666 #[doc = r"Writes raw bits to the field"]
667 #[inline(always)]
668 pub fn bit(self, value: bool) -> &'a mut W {
669 self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19);
670 self.w
671 }
672}
673#[doc = "Reader of field `ARDY2EN`"]
674pub type ARDY2EN_R = crate::R<bool, bool>;
675#[doc = "Write proxy for field `ARDY2EN`"]
676pub struct ARDY2EN_W<'a> {
677 w: &'a mut W,
678}
679impl<'a> ARDY2EN_W<'a> {
680 #[doc = r"Sets the field bit"]
681 #[inline(always)]
682 pub fn set_bit(self) -> &'a mut W {
683 self.bit(true)
684 }
685 #[doc = r"Clears the field bit"]
686 #[inline(always)]
687 pub fn clear_bit(self) -> &'a mut W {
688 self.bit(false)
689 }
690 #[doc = r"Writes raw bits to the field"]
691 #[inline(always)]
692 pub fn bit(self, value: bool) -> &'a mut W {
693 self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20);
694 self.w
695 }
696}
697#[doc = "Reader of field `ARDYTO2DIS`"]
698pub type ARDYTO2DIS_R = crate::R<bool, bool>;
699#[doc = "Write proxy for field `ARDYTO2DIS`"]
700pub struct ARDYTO2DIS_W<'a> {
701 w: &'a mut W,
702}
703impl<'a> ARDYTO2DIS_W<'a> {
704 #[doc = r"Sets the field bit"]
705 #[inline(always)]
706 pub fn set_bit(self) -> &'a mut W {
707 self.bit(true)
708 }
709 #[doc = r"Clears the field bit"]
710 #[inline(always)]
711 pub fn clear_bit(self) -> &'a mut W {
712 self.bit(false)
713 }
714 #[doc = r"Writes raw bits to the field"]
715 #[inline(always)]
716 pub fn bit(self, value: bool) -> &'a mut W {
717 self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21);
718 self.w
719 }
720}
721#[doc = "Reader of field `ARDY3EN`"]
722pub type ARDY3EN_R = crate::R<bool, bool>;
723#[doc = "Write proxy for field `ARDY3EN`"]
724pub struct ARDY3EN_W<'a> {
725 w: &'a mut W,
726}
727impl<'a> ARDY3EN_W<'a> {
728 #[doc = r"Sets the field bit"]
729 #[inline(always)]
730 pub fn set_bit(self) -> &'a mut W {
731 self.bit(true)
732 }
733 #[doc = r"Clears the field bit"]
734 #[inline(always)]
735 pub fn clear_bit(self) -> &'a mut W {
736 self.bit(false)
737 }
738 #[doc = r"Writes raw bits to the field"]
739 #[inline(always)]
740 pub fn bit(self, value: bool) -> &'a mut W {
741 self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22);
742 self.w
743 }
744}
745#[doc = "Reader of field `ARDYTO3DIS`"]
746pub type ARDYTO3DIS_R = crate::R<bool, bool>;
747#[doc = "Write proxy for field `ARDYTO3DIS`"]
748pub struct ARDYTO3DIS_W<'a> {
749 w: &'a mut W,
750}
751impl<'a> ARDYTO3DIS_W<'a> {
752 #[doc = r"Sets the field bit"]
753 #[inline(always)]
754 pub fn set_bit(self) -> &'a mut W {
755 self.bit(true)
756 }
757 #[doc = r"Clears the field bit"]
758 #[inline(always)]
759 pub fn clear_bit(self) -> &'a mut W {
760 self.bit(false)
761 }
762 #[doc = r"Writes raw bits to the field"]
763 #[inline(always)]
764 pub fn bit(self, value: bool) -> &'a mut W {
765 self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23);
766 self.w
767 }
768}
769#[doc = "Reader of field `BL`"]
770pub type BL_R = crate::R<bool, bool>;
771#[doc = "Write proxy for field `BL`"]
772pub struct BL_W<'a> {
773 w: &'a mut W,
774}
775impl<'a> BL_W<'a> {
776 #[doc = r"Sets the field bit"]
777 #[inline(always)]
778 pub fn set_bit(self) -> &'a mut W {
779 self.bit(true)
780 }
781 #[doc = r"Clears the field bit"]
782 #[inline(always)]
783 pub fn clear_bit(self) -> &'a mut W {
784 self.bit(false)
785 }
786 #[doc = r"Writes raw bits to the field"]
787 #[inline(always)]
788 pub fn bit(self, value: bool) -> &'a mut W {
789 self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
790 self.w
791 }
792}
793#[doc = "Reader of field `BL1`"]
794pub type BL1_R = crate::R<bool, bool>;
795#[doc = "Write proxy for field `BL1`"]
796pub struct BL1_W<'a> {
797 w: &'a mut W,
798}
799impl<'a> BL1_W<'a> {
800 #[doc = r"Sets the field bit"]
801 #[inline(always)]
802 pub fn set_bit(self) -> &'a mut W {
803 self.bit(true)
804 }
805 #[doc = r"Clears the field bit"]
806 #[inline(always)]
807 pub fn clear_bit(self) -> &'a mut W {
808 self.bit(false)
809 }
810 #[doc = r"Writes raw bits to the field"]
811 #[inline(always)]
812 pub fn bit(self, value: bool) -> &'a mut W {
813 self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25);
814 self.w
815 }
816}
817#[doc = "Reader of field `BL2`"]
818pub type BL2_R = crate::R<bool, bool>;
819#[doc = "Write proxy for field `BL2`"]
820pub struct BL2_W<'a> {
821 w: &'a mut W,
822}
823impl<'a> BL2_W<'a> {
824 #[doc = r"Sets the field bit"]
825 #[inline(always)]
826 pub fn set_bit(self) -> &'a mut W {
827 self.bit(true)
828 }
829 #[doc = r"Clears the field bit"]
830 #[inline(always)]
831 pub fn clear_bit(self) -> &'a mut W {
832 self.bit(false)
833 }
834 #[doc = r"Writes raw bits to the field"]
835 #[inline(always)]
836 pub fn bit(self, value: bool) -> &'a mut W {
837 self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26);
838 self.w
839 }
840}
841#[doc = "Reader of field `BL3`"]
842pub type BL3_R = crate::R<bool, bool>;
843#[doc = "Write proxy for field `BL3`"]
844pub struct BL3_W<'a> {
845 w: &'a mut W,
846}
847impl<'a> BL3_W<'a> {
848 #[doc = r"Sets the field bit"]
849 #[inline(always)]
850 pub fn set_bit(self) -> &'a mut W {
851 self.bit(true)
852 }
853 #[doc = r"Clears the field bit"]
854 #[inline(always)]
855 pub fn clear_bit(self) -> &'a mut W {
856 self.bit(false)
857 }
858 #[doc = r"Writes raw bits to the field"]
859 #[inline(always)]
860 pub fn bit(self, value: bool) -> &'a mut W {
861 self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27);
862 self.w
863 }
864}
865#[doc = "Reader of field `ITS`"]
866pub type ITS_R = crate::R<bool, bool>;
867#[doc = "Write proxy for field `ITS`"]
868pub struct ITS_W<'a> {
869 w: &'a mut W,
870}
871impl<'a> ITS_W<'a> {
872 #[doc = r"Sets the field bit"]
873 #[inline(always)]
874 pub fn set_bit(self) -> &'a mut W {
875 self.bit(true)
876 }
877 #[doc = r"Clears the field bit"]
878 #[inline(always)]
879 pub fn clear_bit(self) -> &'a mut W {
880 self.bit(false)
881 }
882 #[doc = r"Writes raw bits to the field"]
883 #[inline(always)]
884 pub fn bit(self, value: bool) -> &'a mut W {
885 self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30);
886 self.w
887 }
888}
889#[doc = "Reader of field `ALTMAP`"]
890pub type ALTMAP_R = crate::R<bool, bool>;
891#[doc = "Write proxy for field `ALTMAP`"]
892pub struct ALTMAP_W<'a> {
893 w: &'a mut W,
894}
895impl<'a> ALTMAP_W<'a> {
896 #[doc = r"Sets the field bit"]
897 #[inline(always)]
898 pub fn set_bit(self) -> &'a mut W {
899 self.bit(true)
900 }
901 #[doc = r"Clears the field bit"]
902 #[inline(always)]
903 pub fn clear_bit(self) -> &'a mut W {
904 self.bit(false)
905 }
906 #[doc = r"Writes raw bits to the field"]
907 #[inline(always)]
908 pub fn bit(self, value: bool) -> &'a mut W {
909 self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31);
910 self.w
911 }
912}
913impl R {
914 #[doc = "Bits 0:1 - Mode"]
915 #[inline(always)]
916 pub fn mode(&self) -> MODE_R {
917 MODE_R::new((self.bits & 0x03) as u8)
918 }
919 #[doc = "Bits 2:3 - Mode 1"]
920 #[inline(always)]
921 pub fn mode1(&self) -> MODE1_R {
922 MODE1_R::new(((self.bits >> 2) & 0x03) as u8)
923 }
924 #[doc = "Bits 4:5 - Mode 2"]
925 #[inline(always)]
926 pub fn mode2(&self) -> MODE2_R {
927 MODE2_R::new(((self.bits >> 4) & 0x03) as u8)
928 }
929 #[doc = "Bits 6:7 - Mode 3"]
930 #[inline(always)]
931 pub fn mode3(&self) -> MODE3_R {
932 MODE3_R::new(((self.bits >> 6) & 0x03) as u8)
933 }
934 #[doc = "Bit 8 - Bank 0 Enable"]
935 #[inline(always)]
936 pub fn bank0en(&self) -> BANK0EN_R {
937 BANK0EN_R::new(((self.bits >> 8) & 0x01) != 0)
938 }
939 #[doc = "Bit 9 - Bank 1 Enable"]
940 #[inline(always)]
941 pub fn bank1en(&self) -> BANK1EN_R {
942 BANK1EN_R::new(((self.bits >> 9) & 0x01) != 0)
943 }
944 #[doc = "Bit 10 - Bank 2 Enable"]
945 #[inline(always)]
946 pub fn bank2en(&self) -> BANK2EN_R {
947 BANK2EN_R::new(((self.bits >> 10) & 0x01) != 0)
948 }
949 #[doc = "Bit 11 - Bank 3 Enable"]
950 #[inline(always)]
951 pub fn bank3en(&self) -> BANK3EN_R {
952 BANK3EN_R::new(((self.bits >> 11) & 0x01) != 0)
953 }
954 #[doc = "Bit 12 - No Idle Cycle Insertion on Bank 0"]
955 #[inline(always)]
956 pub fn noidle(&self) -> NOIDLE_R {
957 NOIDLE_R::new(((self.bits >> 12) & 0x01) != 0)
958 }
959 #[doc = "Bit 13 - No Idle Cycle Insertion on Bank 1"]
960 #[inline(always)]
961 pub fn noidle1(&self) -> NOIDLE1_R {
962 NOIDLE1_R::new(((self.bits >> 13) & 0x01) != 0)
963 }
964 #[doc = "Bit 14 - No Idle Cycle Insertion on Bank 2"]
965 #[inline(always)]
966 pub fn noidle2(&self) -> NOIDLE2_R {
967 NOIDLE2_R::new(((self.bits >> 14) & 0x01) != 0)
968 }
969 #[doc = "Bit 15 - No Idle Cycle Insertion on Bank 3"]
970 #[inline(always)]
971 pub fn noidle3(&self) -> NOIDLE3_R {
972 NOIDLE3_R::new(((self.bits >> 15) & 0x01) != 0)
973 }
974 #[doc = "Bit 16 - ARDY Enable"]
975 #[inline(always)]
976 pub fn ardyen(&self) -> ARDYEN_R {
977 ARDYEN_R::new(((self.bits >> 16) & 0x01) != 0)
978 }
979 #[doc = "Bit 17 - ARDY Timeout Disable"]
980 #[inline(always)]
981 pub fn ardytodis(&self) -> ARDYTODIS_R {
982 ARDYTODIS_R::new(((self.bits >> 17) & 0x01) != 0)
983 }
984 #[doc = "Bit 18 - ARDY Enable for Bank 1"]
985 #[inline(always)]
986 pub fn ardy1en(&self) -> ARDY1EN_R {
987 ARDY1EN_R::new(((self.bits >> 18) & 0x01) != 0)
988 }
989 #[doc = "Bit 19 - ARDY Timeout Disable for Bank 1"]
990 #[inline(always)]
991 pub fn ardyto1dis(&self) -> ARDYTO1DIS_R {
992 ARDYTO1DIS_R::new(((self.bits >> 19) & 0x01) != 0)
993 }
994 #[doc = "Bit 20 - ARDY Enable for Bank 2"]
995 #[inline(always)]
996 pub fn ardy2en(&self) -> ARDY2EN_R {
997 ARDY2EN_R::new(((self.bits >> 20) & 0x01) != 0)
998 }
999 #[doc = "Bit 21 - ARDY Timeout Disable for Bank 2"]
1000 #[inline(always)]
1001 pub fn ardyto2dis(&self) -> ARDYTO2DIS_R {
1002 ARDYTO2DIS_R::new(((self.bits >> 21) & 0x01) != 0)
1003 }
1004 #[doc = "Bit 22 - ARDY Enable for Bank 3"]
1005 #[inline(always)]
1006 pub fn ardy3en(&self) -> ARDY3EN_R {
1007 ARDY3EN_R::new(((self.bits >> 22) & 0x01) != 0)
1008 }
1009 #[doc = "Bit 23 - ARDY Timeout Disable for Bank 3"]
1010 #[inline(always)]
1011 pub fn ardyto3dis(&self) -> ARDYTO3DIS_R {
1012 ARDYTO3DIS_R::new(((self.bits >> 23) & 0x01) != 0)
1013 }
1014 #[doc = "Bit 24 - Byte Lane Enable for Bank 0"]
1015 #[inline(always)]
1016 pub fn bl(&self) -> BL_R {
1017 BL_R::new(((self.bits >> 24) & 0x01) != 0)
1018 }
1019 #[doc = "Bit 25 - Byte Lane Enable for Bank 1"]
1020 #[inline(always)]
1021 pub fn bl1(&self) -> BL1_R {
1022 BL1_R::new(((self.bits >> 25) & 0x01) != 0)
1023 }
1024 #[doc = "Bit 26 - Byte Lane Enable for Bank 2"]
1025 #[inline(always)]
1026 pub fn bl2(&self) -> BL2_R {
1027 BL2_R::new(((self.bits >> 26) & 0x01) != 0)
1028 }
1029 #[doc = "Bit 27 - Byte Lane Enable for Bank 3"]
1030 #[inline(always)]
1031 pub fn bl3(&self) -> BL3_R {
1032 BL3_R::new(((self.bits >> 27) & 0x01) != 0)
1033 }
1034 #[doc = "Bit 30 - Individual Timing Set, Line Polarity and Mode Definition Enable"]
1035 #[inline(always)]
1036 pub fn its(&self) -> ITS_R {
1037 ITS_R::new(((self.bits >> 30) & 0x01) != 0)
1038 }
1039 #[doc = "Bit 31 - Alternative Address Map Enable"]
1040 #[inline(always)]
1041 pub fn altmap(&self) -> ALTMAP_R {
1042 ALTMAP_R::new(((self.bits >> 31) & 0x01) != 0)
1043 }
1044}
1045impl W {
1046 #[doc = "Bits 0:1 - Mode"]
1047 #[inline(always)]
1048 pub fn mode(&mut self) -> MODE_W {
1049 MODE_W { w: self }
1050 }
1051 #[doc = "Bits 2:3 - Mode 1"]
1052 #[inline(always)]
1053 pub fn mode1(&mut self) -> MODE1_W {
1054 MODE1_W { w: self }
1055 }
1056 #[doc = "Bits 4:5 - Mode 2"]
1057 #[inline(always)]
1058 pub fn mode2(&mut self) -> MODE2_W {
1059 MODE2_W { w: self }
1060 }
1061 #[doc = "Bits 6:7 - Mode 3"]
1062 #[inline(always)]
1063 pub fn mode3(&mut self) -> MODE3_W {
1064 MODE3_W { w: self }
1065 }
1066 #[doc = "Bit 8 - Bank 0 Enable"]
1067 #[inline(always)]
1068 pub fn bank0en(&mut self) -> BANK0EN_W {
1069 BANK0EN_W { w: self }
1070 }
1071 #[doc = "Bit 9 - Bank 1 Enable"]
1072 #[inline(always)]
1073 pub fn bank1en(&mut self) -> BANK1EN_W {
1074 BANK1EN_W { w: self }
1075 }
1076 #[doc = "Bit 10 - Bank 2 Enable"]
1077 #[inline(always)]
1078 pub fn bank2en(&mut self) -> BANK2EN_W {
1079 BANK2EN_W { w: self }
1080 }
1081 #[doc = "Bit 11 - Bank 3 Enable"]
1082 #[inline(always)]
1083 pub fn bank3en(&mut self) -> BANK3EN_W {
1084 BANK3EN_W { w: self }
1085 }
1086 #[doc = "Bit 12 - No Idle Cycle Insertion on Bank 0"]
1087 #[inline(always)]
1088 pub fn noidle(&mut self) -> NOIDLE_W {
1089 NOIDLE_W { w: self }
1090 }
1091 #[doc = "Bit 13 - No Idle Cycle Insertion on Bank 1"]
1092 #[inline(always)]
1093 pub fn noidle1(&mut self) -> NOIDLE1_W {
1094 NOIDLE1_W { w: self }
1095 }
1096 #[doc = "Bit 14 - No Idle Cycle Insertion on Bank 2"]
1097 #[inline(always)]
1098 pub fn noidle2(&mut self) -> NOIDLE2_W {
1099 NOIDLE2_W { w: self }
1100 }
1101 #[doc = "Bit 15 - No Idle Cycle Insertion on Bank 3"]
1102 #[inline(always)]
1103 pub fn noidle3(&mut self) -> NOIDLE3_W {
1104 NOIDLE3_W { w: self }
1105 }
1106 #[doc = "Bit 16 - ARDY Enable"]
1107 #[inline(always)]
1108 pub fn ardyen(&mut self) -> ARDYEN_W {
1109 ARDYEN_W { w: self }
1110 }
1111 #[doc = "Bit 17 - ARDY Timeout Disable"]
1112 #[inline(always)]
1113 pub fn ardytodis(&mut self) -> ARDYTODIS_W {
1114 ARDYTODIS_W { w: self }
1115 }
1116 #[doc = "Bit 18 - ARDY Enable for Bank 1"]
1117 #[inline(always)]
1118 pub fn ardy1en(&mut self) -> ARDY1EN_W {
1119 ARDY1EN_W { w: self }
1120 }
1121 #[doc = "Bit 19 - ARDY Timeout Disable for Bank 1"]
1122 #[inline(always)]
1123 pub fn ardyto1dis(&mut self) -> ARDYTO1DIS_W {
1124 ARDYTO1DIS_W { w: self }
1125 }
1126 #[doc = "Bit 20 - ARDY Enable for Bank 2"]
1127 #[inline(always)]
1128 pub fn ardy2en(&mut self) -> ARDY2EN_W {
1129 ARDY2EN_W { w: self }
1130 }
1131 #[doc = "Bit 21 - ARDY Timeout Disable for Bank 2"]
1132 #[inline(always)]
1133 pub fn ardyto2dis(&mut self) -> ARDYTO2DIS_W {
1134 ARDYTO2DIS_W { w: self }
1135 }
1136 #[doc = "Bit 22 - ARDY Enable for Bank 3"]
1137 #[inline(always)]
1138 pub fn ardy3en(&mut self) -> ARDY3EN_W {
1139 ARDY3EN_W { w: self }
1140 }
1141 #[doc = "Bit 23 - ARDY Timeout Disable for Bank 3"]
1142 #[inline(always)]
1143 pub fn ardyto3dis(&mut self) -> ARDYTO3DIS_W {
1144 ARDYTO3DIS_W { w: self }
1145 }
1146 #[doc = "Bit 24 - Byte Lane Enable for Bank 0"]
1147 #[inline(always)]
1148 pub fn bl(&mut self) -> BL_W {
1149 BL_W { w: self }
1150 }
1151 #[doc = "Bit 25 - Byte Lane Enable for Bank 1"]
1152 #[inline(always)]
1153 pub fn bl1(&mut self) -> BL1_W {
1154 BL1_W { w: self }
1155 }
1156 #[doc = "Bit 26 - Byte Lane Enable for Bank 2"]
1157 #[inline(always)]
1158 pub fn bl2(&mut self) -> BL2_W {
1159 BL2_W { w: self }
1160 }
1161 #[doc = "Bit 27 - Byte Lane Enable for Bank 3"]
1162 #[inline(always)]
1163 pub fn bl3(&mut self) -> BL3_W {
1164 BL3_W { w: self }
1165 }
1166 #[doc = "Bit 30 - Individual Timing Set, Line Polarity and Mode Definition Enable"]
1167 #[inline(always)]
1168 pub fn its(&mut self) -> ITS_W {
1169 ITS_W { w: self }
1170 }
1171 #[doc = "Bit 31 - Alternative Address Map Enable"]
1172 #[inline(always)]
1173 pub fn altmap(&mut self) -> ALTMAP_W {
1174 ALTMAP_W { w: self }
1175 }
1176}