efm32gg11b820/acmp2/
ctrl.rs

1#[doc = "Reader of register CTRL"]
2pub type R = crate::R<u32, super::CTRL>;
3#[doc = "Writer for register CTRL"]
4pub type W = crate::W<u32, super::CTRL>;
5#[doc = "Register CTRL `reset()`'s with value 0x0700_0000"]
6impl crate::ResetValue for super::CTRL {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0x0700_0000
11    }
12}
13#[doc = "Reader of field `EN`"]
14pub type EN_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `EN`"]
16pub struct EN_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> EN_W<'a> {
20    #[doc = r"Sets the field bit"]
21    #[inline(always)]
22    pub fn set_bit(self) -> &'a mut W {
23        self.bit(true)
24    }
25    #[doc = r"Clears the field bit"]
26    #[inline(always)]
27    pub fn clear_bit(self) -> &'a mut W {
28        self.bit(false)
29    }
30    #[doc = r"Writes raw bits to the field"]
31    #[inline(always)]
32    pub fn bit(self, value: bool) -> &'a mut W {
33        self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
34        self.w
35    }
36}
37#[doc = "Reader of field `INACTVAL`"]
38pub type INACTVAL_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `INACTVAL`"]
40pub struct INACTVAL_W<'a> {
41    w: &'a mut W,
42}
43impl<'a> INACTVAL_W<'a> {
44    #[doc = r"Sets the field bit"]
45    #[inline(always)]
46    pub fn set_bit(self) -> &'a mut W {
47        self.bit(true)
48    }
49    #[doc = r"Clears the field bit"]
50    #[inline(always)]
51    pub fn clear_bit(self) -> &'a mut W {
52        self.bit(false)
53    }
54    #[doc = r"Writes raw bits to the field"]
55    #[inline(always)]
56    pub fn bit(self, value: bool) -> &'a mut W {
57        self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
58        self.w
59    }
60}
61#[doc = "Reader of field `GPIOINV`"]
62pub type GPIOINV_R = crate::R<bool, bool>;
63#[doc = "Write proxy for field `GPIOINV`"]
64pub struct GPIOINV_W<'a> {
65    w: &'a mut W,
66}
67impl<'a> GPIOINV_W<'a> {
68    #[doc = r"Sets the field bit"]
69    #[inline(always)]
70    pub fn set_bit(self) -> &'a mut W {
71        self.bit(true)
72    }
73    #[doc = r"Clears the field bit"]
74    #[inline(always)]
75    pub fn clear_bit(self) -> &'a mut W {
76        self.bit(false)
77    }
78    #[doc = r"Writes raw bits to the field"]
79    #[inline(always)]
80    pub fn bit(self, value: bool) -> &'a mut W {
81        self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
82        self.w
83    }
84}
85#[doc = "Reader of field `APORTXMASTERDIS`"]
86pub type APORTXMASTERDIS_R = crate::R<bool, bool>;
87#[doc = "Write proxy for field `APORTXMASTERDIS`"]
88pub struct APORTXMASTERDIS_W<'a> {
89    w: &'a mut W,
90}
91impl<'a> APORTXMASTERDIS_W<'a> {
92    #[doc = r"Sets the field bit"]
93    #[inline(always)]
94    pub fn set_bit(self) -> &'a mut W {
95        self.bit(true)
96    }
97    #[doc = r"Clears the field bit"]
98    #[inline(always)]
99    pub fn clear_bit(self) -> &'a mut W {
100        self.bit(false)
101    }
102    #[doc = r"Writes raw bits to the field"]
103    #[inline(always)]
104    pub fn bit(self, value: bool) -> &'a mut W {
105        self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
106        self.w
107    }
108}
109#[doc = "Reader of field `APORTYMASTERDIS`"]
110pub type APORTYMASTERDIS_R = crate::R<bool, bool>;
111#[doc = "Write proxy for field `APORTYMASTERDIS`"]
112pub struct APORTYMASTERDIS_W<'a> {
113    w: &'a mut W,
114}
115impl<'a> APORTYMASTERDIS_W<'a> {
116    #[doc = r"Sets the field bit"]
117    #[inline(always)]
118    pub fn set_bit(self) -> &'a mut W {
119        self.bit(true)
120    }
121    #[doc = r"Clears the field bit"]
122    #[inline(always)]
123    pub fn clear_bit(self) -> &'a mut W {
124        self.bit(false)
125    }
126    #[doc = r"Writes raw bits to the field"]
127    #[inline(always)]
128    pub fn bit(self, value: bool) -> &'a mut W {
129        self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
130        self.w
131    }
132}
133#[doc = "Reader of field `APORTVMASTERDIS`"]
134pub type APORTVMASTERDIS_R = crate::R<bool, bool>;
135#[doc = "Write proxy for field `APORTVMASTERDIS`"]
136pub struct APORTVMASTERDIS_W<'a> {
137    w: &'a mut W,
138}
139impl<'a> APORTVMASTERDIS_W<'a> {
140    #[doc = r"Sets the field bit"]
141    #[inline(always)]
142    pub fn set_bit(self) -> &'a mut W {
143        self.bit(true)
144    }
145    #[doc = r"Clears the field bit"]
146    #[inline(always)]
147    pub fn clear_bit(self) -> &'a mut W {
148        self.bit(false)
149    }
150    #[doc = r"Writes raw bits to the field"]
151    #[inline(always)]
152    pub fn bit(self, value: bool) -> &'a mut W {
153        self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
154        self.w
155    }
156}
157#[doc = "Power Select\n\nValue on reset: 0"]
158#[derive(Clone, Copy, Debug, PartialEq)]
159#[repr(u8)]
160pub enum PWRSEL_A {
161    #[doc = "0: AVDD supply"]
162    AVDD = 0,
163    #[doc = "1: DVDD supply"]
164    DVDD = 1,
165    #[doc = "2: IOVDD/IOVDD0 supply"]
166    IOVDD0 = 2,
167    #[doc = "4: IOVDD1 supply (if part has two I/O voltages)"]
168    IOVDD1 = 4,
169}
170impl From<PWRSEL_A> for u8 {
171    #[inline(always)]
172    fn from(variant: PWRSEL_A) -> Self {
173        variant as _
174    }
175}
176#[doc = "Reader of field `PWRSEL`"]
177pub type PWRSEL_R = crate::R<u8, PWRSEL_A>;
178impl PWRSEL_R {
179    #[doc = r"Get enumerated values variant"]
180    #[inline(always)]
181    pub fn variant(&self) -> crate::Variant<u8, PWRSEL_A> {
182        use crate::Variant::*;
183        match self.bits {
184            0 => Val(PWRSEL_A::AVDD),
185            1 => Val(PWRSEL_A::DVDD),
186            2 => Val(PWRSEL_A::IOVDD0),
187            4 => Val(PWRSEL_A::IOVDD1),
188            i => Res(i),
189        }
190    }
191    #[doc = "Checks if the value of the field is `AVDD`"]
192    #[inline(always)]
193    pub fn is_avdd(&self) -> bool {
194        *self == PWRSEL_A::AVDD
195    }
196    #[doc = "Checks if the value of the field is `DVDD`"]
197    #[inline(always)]
198    pub fn is_dvdd(&self) -> bool {
199        *self == PWRSEL_A::DVDD
200    }
201    #[doc = "Checks if the value of the field is `IOVDD0`"]
202    #[inline(always)]
203    pub fn is_iovdd0(&self) -> bool {
204        *self == PWRSEL_A::IOVDD0
205    }
206    #[doc = "Checks if the value of the field is `IOVDD1`"]
207    #[inline(always)]
208    pub fn is_iovdd1(&self) -> bool {
209        *self == PWRSEL_A::IOVDD1
210    }
211}
212#[doc = "Write proxy for field `PWRSEL`"]
213pub struct PWRSEL_W<'a> {
214    w: &'a mut W,
215}
216impl<'a> PWRSEL_W<'a> {
217    #[doc = r"Writes `variant` to the field"]
218    #[inline(always)]
219    pub fn variant(self, variant: PWRSEL_A) -> &'a mut W {
220        unsafe { self.bits(variant.into()) }
221    }
222    #[doc = "AVDD supply"]
223    #[inline(always)]
224    pub fn avdd(self) -> &'a mut W {
225        self.variant(PWRSEL_A::AVDD)
226    }
227    #[doc = "DVDD supply"]
228    #[inline(always)]
229    pub fn dvdd(self) -> &'a mut W {
230        self.variant(PWRSEL_A::DVDD)
231    }
232    #[doc = "IOVDD/IOVDD0 supply"]
233    #[inline(always)]
234    pub fn iovdd0(self) -> &'a mut W {
235        self.variant(PWRSEL_A::IOVDD0)
236    }
237    #[doc = "IOVDD1 supply (if part has two I/O voltages)"]
238    #[inline(always)]
239    pub fn iovdd1(self) -> &'a mut W {
240        self.variant(PWRSEL_A::IOVDD1)
241    }
242    #[doc = r"Writes raw bits to the field"]
243    #[inline(always)]
244    pub unsafe fn bits(self, value: u8) -> &'a mut W {
245        self.w.bits = (self.w.bits & !(0x07 << 12)) | (((value as u32) & 0x07) << 12);
246        self.w
247    }
248}
249#[doc = "Reader of field `ACCURACY`"]
250pub type ACCURACY_R = crate::R<bool, bool>;
251#[doc = "Write proxy for field `ACCURACY`"]
252pub struct ACCURACY_W<'a> {
253    w: &'a mut W,
254}
255impl<'a> ACCURACY_W<'a> {
256    #[doc = r"Sets the field bit"]
257    #[inline(always)]
258    pub fn set_bit(self) -> &'a mut W {
259        self.bit(true)
260    }
261    #[doc = r"Clears the field bit"]
262    #[inline(always)]
263    pub fn clear_bit(self) -> &'a mut W {
264        self.bit(false)
265    }
266    #[doc = r"Writes raw bits to the field"]
267    #[inline(always)]
268    pub fn bit(self, value: bool) -> &'a mut W {
269        self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
270        self.w
271    }
272}
273#[doc = "Input Range\n\nValue on reset: 0"]
274#[derive(Clone, Copy, Debug, PartialEq)]
275#[repr(u8)]
276pub enum INPUTRANGE_A {
277    #[doc = "0: Setting when the input can be from 0 to ACMPVDD."]
278    FULL = 0,
279    #[doc = "1: Setting when the input will always be greater than ACMPVDD/2."]
280    GTVDDDIV2 = 1,
281    #[doc = "2: Setting when the input will always be less than ACMPVDD/2."]
282    LTVDDDIV2 = 2,
283}
284impl From<INPUTRANGE_A> for u8 {
285    #[inline(always)]
286    fn from(variant: INPUTRANGE_A) -> Self {
287        variant as _
288    }
289}
290#[doc = "Reader of field `INPUTRANGE`"]
291pub type INPUTRANGE_R = crate::R<u8, INPUTRANGE_A>;
292impl INPUTRANGE_R {
293    #[doc = r"Get enumerated values variant"]
294    #[inline(always)]
295    pub fn variant(&self) -> crate::Variant<u8, INPUTRANGE_A> {
296        use crate::Variant::*;
297        match self.bits {
298            0 => Val(INPUTRANGE_A::FULL),
299            1 => Val(INPUTRANGE_A::GTVDDDIV2),
300            2 => Val(INPUTRANGE_A::LTVDDDIV2),
301            i => Res(i),
302        }
303    }
304    #[doc = "Checks if the value of the field is `FULL`"]
305    #[inline(always)]
306    pub fn is_full(&self) -> bool {
307        *self == INPUTRANGE_A::FULL
308    }
309    #[doc = "Checks if the value of the field is `GTVDDDIV2`"]
310    #[inline(always)]
311    pub fn is_gtvdddiv2(&self) -> bool {
312        *self == INPUTRANGE_A::GTVDDDIV2
313    }
314    #[doc = "Checks if the value of the field is `LTVDDDIV2`"]
315    #[inline(always)]
316    pub fn is_ltvdddiv2(&self) -> bool {
317        *self == INPUTRANGE_A::LTVDDDIV2
318    }
319}
320#[doc = "Write proxy for field `INPUTRANGE`"]
321pub struct INPUTRANGE_W<'a> {
322    w: &'a mut W,
323}
324impl<'a> INPUTRANGE_W<'a> {
325    #[doc = r"Writes `variant` to the field"]
326    #[inline(always)]
327    pub fn variant(self, variant: INPUTRANGE_A) -> &'a mut W {
328        unsafe { self.bits(variant.into()) }
329    }
330    #[doc = "Setting when the input can be from 0 to ACMPVDD."]
331    #[inline(always)]
332    pub fn full(self) -> &'a mut W {
333        self.variant(INPUTRANGE_A::FULL)
334    }
335    #[doc = "Setting when the input will always be greater than ACMPVDD/2."]
336    #[inline(always)]
337    pub fn gtvdddiv2(self) -> &'a mut W {
338        self.variant(INPUTRANGE_A::GTVDDDIV2)
339    }
340    #[doc = "Setting when the input will always be less than ACMPVDD/2."]
341    #[inline(always)]
342    pub fn ltvdddiv2(self) -> &'a mut W {
343        self.variant(INPUTRANGE_A::LTVDDDIV2)
344    }
345    #[doc = r"Writes raw bits to the field"]
346    #[inline(always)]
347    pub unsafe fn bits(self, value: u8) -> &'a mut W {
348        self.w.bits = (self.w.bits & !(0x03 << 18)) | (((value as u32) & 0x03) << 18);
349        self.w
350    }
351}
352#[doc = "Reader of field `IRISE`"]
353pub type IRISE_R = crate::R<bool, bool>;
354#[doc = "Write proxy for field `IRISE`"]
355pub struct IRISE_W<'a> {
356    w: &'a mut W,
357}
358impl<'a> IRISE_W<'a> {
359    #[doc = r"Sets the field bit"]
360    #[inline(always)]
361    pub fn set_bit(self) -> &'a mut W {
362        self.bit(true)
363    }
364    #[doc = r"Clears the field bit"]
365    #[inline(always)]
366    pub fn clear_bit(self) -> &'a mut W {
367        self.bit(false)
368    }
369    #[doc = r"Writes raw bits to the field"]
370    #[inline(always)]
371    pub fn bit(self, value: bool) -> &'a mut W {
372        self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20);
373        self.w
374    }
375}
376#[doc = "Reader of field `IFALL`"]
377pub type IFALL_R = crate::R<bool, bool>;
378#[doc = "Write proxy for field `IFALL`"]
379pub struct IFALL_W<'a> {
380    w: &'a mut W,
381}
382impl<'a> IFALL_W<'a> {
383    #[doc = r"Sets the field bit"]
384    #[inline(always)]
385    pub fn set_bit(self) -> &'a mut W {
386        self.bit(true)
387    }
388    #[doc = r"Clears the field bit"]
389    #[inline(always)]
390    pub fn clear_bit(self) -> &'a mut W {
391        self.bit(false)
392    }
393    #[doc = r"Writes raw bits to the field"]
394    #[inline(always)]
395    pub fn bit(self, value: bool) -> &'a mut W {
396        self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21);
397        self.w
398    }
399}
400#[doc = "Reader of field `BIASPROG`"]
401pub type BIASPROG_R = crate::R<u8, u8>;
402#[doc = "Write proxy for field `BIASPROG`"]
403pub struct BIASPROG_W<'a> {
404    w: &'a mut W,
405}
406impl<'a> BIASPROG_W<'a> {
407    #[doc = r"Writes raw bits to the field"]
408    #[inline(always)]
409    pub unsafe fn bits(self, value: u8) -> &'a mut W {
410        self.w.bits = (self.w.bits & !(0x3f << 24)) | (((value as u32) & 0x3f) << 24);
411        self.w
412    }
413}
414#[doc = "Reader of field `FULLBIAS`"]
415pub type FULLBIAS_R = crate::R<bool, bool>;
416#[doc = "Write proxy for field `FULLBIAS`"]
417pub struct FULLBIAS_W<'a> {
418    w: &'a mut W,
419}
420impl<'a> FULLBIAS_W<'a> {
421    #[doc = r"Sets the field bit"]
422    #[inline(always)]
423    pub fn set_bit(self) -> &'a mut W {
424        self.bit(true)
425    }
426    #[doc = r"Clears the field bit"]
427    #[inline(always)]
428    pub fn clear_bit(self) -> &'a mut W {
429        self.bit(false)
430    }
431    #[doc = r"Writes raw bits to the field"]
432    #[inline(always)]
433    pub fn bit(self, value: bool) -> &'a mut W {
434        self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31);
435        self.w
436    }
437}
438impl R {
439    #[doc = "Bit 0 - Analog Comparator Enable"]
440    #[inline(always)]
441    pub fn en(&self) -> EN_R {
442        EN_R::new((self.bits & 0x01) != 0)
443    }
444    #[doc = "Bit 2 - Inactive Value"]
445    #[inline(always)]
446    pub fn inactval(&self) -> INACTVAL_R {
447        INACTVAL_R::new(((self.bits >> 2) & 0x01) != 0)
448    }
449    #[doc = "Bit 3 - Comparator GPIO Output Invert"]
450    #[inline(always)]
451    pub fn gpioinv(&self) -> GPIOINV_R {
452        GPIOINV_R::new(((self.bits >> 3) & 0x01) != 0)
453    }
454    #[doc = "Bit 8 - APORT Bus X Master Disable"]
455    #[inline(always)]
456    pub fn aportxmasterdis(&self) -> APORTXMASTERDIS_R {
457        APORTXMASTERDIS_R::new(((self.bits >> 8) & 0x01) != 0)
458    }
459    #[doc = "Bit 9 - APORT Bus Y Master Disable"]
460    #[inline(always)]
461    pub fn aportymasterdis(&self) -> APORTYMASTERDIS_R {
462        APORTYMASTERDIS_R::new(((self.bits >> 9) & 0x01) != 0)
463    }
464    #[doc = "Bit 10 - APORT Bus Master Disable for Bus Selected By VASEL"]
465    #[inline(always)]
466    pub fn aportvmasterdis(&self) -> APORTVMASTERDIS_R {
467        APORTVMASTERDIS_R::new(((self.bits >> 10) & 0x01) != 0)
468    }
469    #[doc = "Bits 12:14 - Power Select"]
470    #[inline(always)]
471    pub fn pwrsel(&self) -> PWRSEL_R {
472        PWRSEL_R::new(((self.bits >> 12) & 0x07) as u8)
473    }
474    #[doc = "Bit 15 - ACMP Accuracy Mode"]
475    #[inline(always)]
476    pub fn accuracy(&self) -> ACCURACY_R {
477        ACCURACY_R::new(((self.bits >> 15) & 0x01) != 0)
478    }
479    #[doc = "Bits 18:19 - Input Range"]
480    #[inline(always)]
481    pub fn inputrange(&self) -> INPUTRANGE_R {
482        INPUTRANGE_R::new(((self.bits >> 18) & 0x03) as u8)
483    }
484    #[doc = "Bit 20 - Rising Edge Interrupt Sense"]
485    #[inline(always)]
486    pub fn irise(&self) -> IRISE_R {
487        IRISE_R::new(((self.bits >> 20) & 0x01) != 0)
488    }
489    #[doc = "Bit 21 - Falling Edge Interrupt Sense"]
490    #[inline(always)]
491    pub fn ifall(&self) -> IFALL_R {
492        IFALL_R::new(((self.bits >> 21) & 0x01) != 0)
493    }
494    #[doc = "Bits 24:29 - Bias Configuration"]
495    #[inline(always)]
496    pub fn biasprog(&self) -> BIASPROG_R {
497        BIASPROG_R::new(((self.bits >> 24) & 0x3f) as u8)
498    }
499    #[doc = "Bit 31 - Full Bias Current"]
500    #[inline(always)]
501    pub fn fullbias(&self) -> FULLBIAS_R {
502        FULLBIAS_R::new(((self.bits >> 31) & 0x01) != 0)
503    }
504}
505impl W {
506    #[doc = "Bit 0 - Analog Comparator Enable"]
507    #[inline(always)]
508    pub fn en(&mut self) -> EN_W {
509        EN_W { w: self }
510    }
511    #[doc = "Bit 2 - Inactive Value"]
512    #[inline(always)]
513    pub fn inactval(&mut self) -> INACTVAL_W {
514        INACTVAL_W { w: self }
515    }
516    #[doc = "Bit 3 - Comparator GPIO Output Invert"]
517    #[inline(always)]
518    pub fn gpioinv(&mut self) -> GPIOINV_W {
519        GPIOINV_W { w: self }
520    }
521    #[doc = "Bit 8 - APORT Bus X Master Disable"]
522    #[inline(always)]
523    pub fn aportxmasterdis(&mut self) -> APORTXMASTERDIS_W {
524        APORTXMASTERDIS_W { w: self }
525    }
526    #[doc = "Bit 9 - APORT Bus Y Master Disable"]
527    #[inline(always)]
528    pub fn aportymasterdis(&mut self) -> APORTYMASTERDIS_W {
529        APORTYMASTERDIS_W { w: self }
530    }
531    #[doc = "Bit 10 - APORT Bus Master Disable for Bus Selected By VASEL"]
532    #[inline(always)]
533    pub fn aportvmasterdis(&mut self) -> APORTVMASTERDIS_W {
534        APORTVMASTERDIS_W { w: self }
535    }
536    #[doc = "Bits 12:14 - Power Select"]
537    #[inline(always)]
538    pub fn pwrsel(&mut self) -> PWRSEL_W {
539        PWRSEL_W { w: self }
540    }
541    #[doc = "Bit 15 - ACMP Accuracy Mode"]
542    #[inline(always)]
543    pub fn accuracy(&mut self) -> ACCURACY_W {
544        ACCURACY_W { w: self }
545    }
546    #[doc = "Bits 18:19 - Input Range"]
547    #[inline(always)]
548    pub fn inputrange(&mut self) -> INPUTRANGE_W {
549        INPUTRANGE_W { w: self }
550    }
551    #[doc = "Bit 20 - Rising Edge Interrupt Sense"]
552    #[inline(always)]
553    pub fn irise(&mut self) -> IRISE_W {
554        IRISE_W { w: self }
555    }
556    #[doc = "Bit 21 - Falling Edge Interrupt Sense"]
557    #[inline(always)]
558    pub fn ifall(&mut self) -> IFALL_W {
559        IFALL_W { w: self }
560    }
561    #[doc = "Bits 24:29 - Bias Configuration"]
562    #[inline(always)]
563    pub fn biasprog(&mut self) -> BIASPROG_W {
564        BIASPROG_W { w: self }
565    }
566    #[doc = "Bit 31 - Full Bias Current"]
567    #[inline(always)]
568    pub fn fullbias(&mut self) -> FULLBIAS_W {
569        FULLBIAS_W { w: self }
570    }
571}
efm32gg11b820/acmp2/ctrl.rs

efm32gg11b820/acmp2/
ctrl.rs
