efm32gg11b820_pac/leuart0/
status.rs

1#[doc = "Register `STATUS` reader"]
2pub struct R(crate::R<STATUS_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<STATUS_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<STATUS_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<STATUS_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `RXENS` reader - Receiver Enable Status"]
17pub type RXENS_R = crate::BitReader<bool>;
18#[doc = "Field `TXENS` reader - Transmitter Enable Status"]
19pub type TXENS_R = crate::BitReader<bool>;
20#[doc = "Field `RXBLOCK` reader - Block Incoming Data"]
21pub type RXBLOCK_R = crate::BitReader<bool>;
22#[doc = "Field `TXC` reader - TX Complete"]
23pub type TXC_R = crate::BitReader<bool>;
24#[doc = "Field `TXBL` reader - TX Buffer Level"]
25pub type TXBL_R = crate::BitReader<bool>;
26#[doc = "Field `RXDATAV` reader - RX Data Valid"]
27pub type RXDATAV_R = crate::BitReader<bool>;
28#[doc = "Field `TXIDLE` reader - TX Idle"]
29pub type TXIDLE_R = crate::BitReader<bool>;
30impl R {
31    #[doc = "Bit 0 - Receiver Enable Status"]
32    #[inline(always)]
33    pub fn rxens(&self) -> RXENS_R {
34        RXENS_R::new((self.bits & 1) != 0)
35    }
36    #[doc = "Bit 1 - Transmitter Enable Status"]
37    #[inline(always)]
38    pub fn txens(&self) -> TXENS_R {
39        TXENS_R::new(((self.bits >> 1) & 1) != 0)
40    }
41    #[doc = "Bit 2 - Block Incoming Data"]
42    #[inline(always)]
43    pub fn rxblock(&self) -> RXBLOCK_R {
44        RXBLOCK_R::new(((self.bits >> 2) & 1) != 0)
45    }
46    #[doc = "Bit 3 - TX Complete"]
47    #[inline(always)]
48    pub fn txc(&self) -> TXC_R {
49        TXC_R::new(((self.bits >> 3) & 1) != 0)
50    }
51    #[doc = "Bit 4 - TX Buffer Level"]
52    #[inline(always)]
53    pub fn txbl(&self) -> TXBL_R {
54        TXBL_R::new(((self.bits >> 4) & 1) != 0)
55    }
56    #[doc = "Bit 5 - RX Data Valid"]
57    #[inline(always)]
58    pub fn rxdatav(&self) -> RXDATAV_R {
59        RXDATAV_R::new(((self.bits >> 5) & 1) != 0)
60    }
61    #[doc = "Bit 6 - TX Idle"]
62    #[inline(always)]
63    pub fn txidle(&self) -> TXIDLE_R {
64        TXIDLE_R::new(((self.bits >> 6) & 1) != 0)
65    }
66}
67#[doc = "Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"]
68pub struct STATUS_SPEC;
69impl crate::RegisterSpec for STATUS_SPEC {
70    type Ux = u32;
71}
72#[doc = "`read()` method returns [status::R](R) reader structure"]
73impl crate::Readable for STATUS_SPEC {
74    type Reader = R;
75}
76#[doc = "`reset()` method sets STATUS to value 0x50"]
77impl crate::Resettable for STATUS_SPEC {
78    #[inline(always)]
79    fn reset_value() -> Self::Ux {
80        0x50
81    }
82}
efm32gg11b820_pac/leuart0/status.rs

efm32gg11b820_pac/leuart0/
status.rs
