efm32gg11b320_pac/cmu/
hfxoctrl.rs

1#[doc = "Register `HFXOCTRL` reader"]
2pub struct R(crate::R<HFXOCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<HFXOCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<HFXOCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<HFXOCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `HFXOCTRL` writer"]
17pub struct W(crate::W<HFXOCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<HFXOCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<HFXOCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<HFXOCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "HFXO Mode\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum MODE_A {
41    #[doc = "0: 4 MHz - 50 MHz crystal oscillator"]
42    XTAL = 0,
43    #[doc = "1: An AC coupled buffer is coupled in series with HFXTAL_N pin, suitable for external sinus wave."]
44    ACBUFEXTCLK = 1,
45    #[doc = "2: A DC coupled buffer is coupled in series with HFXTAL_N pin, suitable for external sinus wave."]
46    DCBUFEXTCLK = 2,
47    #[doc = "3: Digital external clock can be supplied on HFXTAL_N pin."]
48    DIGEXTCLK = 3,
49}
50impl From<MODE_A> for u8 {
51    #[inline(always)]
52    fn from(variant: MODE_A) -> Self {
53        variant as _
54    }
55}
56#[doc = "Field `MODE` reader - HFXO Mode"]
57pub type MODE_R = crate::FieldReader<u8, MODE_A>;
58impl MODE_R {
59    #[doc = "Get enumerated values variant"]
60    #[inline(always)]
61    pub fn variant(&self) -> MODE_A {
62        match self.bits {
63            0 => MODE_A::XTAL,
64            1 => MODE_A::ACBUFEXTCLK,
65            2 => MODE_A::DCBUFEXTCLK,
66            3 => MODE_A::DIGEXTCLK,
67            _ => unreachable!(),
68        }
69    }
70    #[doc = "Checks if the value of the field is `XTAL`"]
71    #[inline(always)]
72    pub fn is_xtal(&self) -> bool {
73        *self == MODE_A::XTAL
74    }
75    #[doc = "Checks if the value of the field is `ACBUFEXTCLK`"]
76    #[inline(always)]
77    pub fn is_acbufextclk(&self) -> bool {
78        *self == MODE_A::ACBUFEXTCLK
79    }
80    #[doc = "Checks if the value of the field is `DCBUFEXTCLK`"]
81    #[inline(always)]
82    pub fn is_dcbufextclk(&self) -> bool {
83        *self == MODE_A::DCBUFEXTCLK
84    }
85    #[doc = "Checks if the value of the field is `DIGEXTCLK`"]
86    #[inline(always)]
87    pub fn is_digextclk(&self) -> bool {
88        *self == MODE_A::DIGEXTCLK
89    }
90}
91#[doc = "Field `MODE` writer - HFXO Mode"]
92pub type MODE_W<'a> = crate::FieldWriterSafe<'a, u32, HFXOCTRL_SPEC, u8, MODE_A, 2, 0>;
93impl<'a> MODE_W<'a> {
94    #[doc = "4 MHz - 50 MHz crystal oscillator"]
95    #[inline(always)]
96    pub fn xtal(self) -> &'a mut W {
97        self.variant(MODE_A::XTAL)
98    }
99    #[doc = "An AC coupled buffer is coupled in series with HFXTAL_N pin, suitable for external sinus wave."]
100    #[inline(always)]
101    pub fn acbufextclk(self) -> &'a mut W {
102        self.variant(MODE_A::ACBUFEXTCLK)
103    }
104    #[doc = "A DC coupled buffer is coupled in series with HFXTAL_N pin, suitable for external sinus wave."]
105    #[inline(always)]
106    pub fn dcbufextclk(self) -> &'a mut W {
107        self.variant(MODE_A::DCBUFEXTCLK)
108    }
109    #[doc = "Digital external clock can be supplied on HFXTAL_N pin."]
110    #[inline(always)]
111    pub fn digextclk(self) -> &'a mut W {
112        self.variant(MODE_A::DIGEXTCLK)
113    }
114}
115#[doc = "Field `HFXOX2EN` reader - Enable Double Frequency on HFXOX2 Clock (compared to HFXO Clock)"]
116pub type HFXOX2EN_R = crate::BitReader<bool>;
117#[doc = "Field `HFXOX2EN` writer - Enable Double Frequency on HFXOX2 Clock (compared to HFXO Clock)"]
118pub type HFXOX2EN_W<'a> = crate::BitWriter<'a, u32, HFXOCTRL_SPEC, bool, 3>;
119#[doc = "HFXO Automatic Peak Detection Mode\n\nValue on reset: 0"]
120#[derive(Clone, Copy, Debug, PartialEq)]
121#[repr(u8)]
122pub enum PEAKDETMODE_A {
123    #[doc = "0: Automatic control of HFXO peak detection sequence. Only performs peak detection on initial HFXO startup. CMU_CMD HFXOPEAKDETSTART allowed to be used after HFXORDY=1."]
124    ONCECMD = 0,
125    #[doc = "1: Automatic control of HFXO peak detection sequence. CMU_CMD HFXOPEAKDETSTART allowed to be used after HFXORDY=1."]
126    AUTOCMD = 1,
127    #[doc = "2: CMU_CMD HFXOPEAKDETSTART can be used to trigger the peak detection sequence after HFXORDY=1."]
128    CMD = 2,
129    #[doc = "3: CMU_HFXOSTEADYSTATECTRL IBTRIMXOCORE and PEAKDETEN are under full software control and are allowed to be changed once HFXO is ready."]
130    MANUAL = 3,
131}
132impl From<PEAKDETMODE_A> for u8 {
133    #[inline(always)]
134    fn from(variant: PEAKDETMODE_A) -> Self {
135        variant as _
136    }
137}
138#[doc = "Field `PEAKDETMODE` reader - HFXO Automatic Peak Detection Mode"]
139pub type PEAKDETMODE_R = crate::FieldReader<u8, PEAKDETMODE_A>;
140impl PEAKDETMODE_R {
141    #[doc = "Get enumerated values variant"]
142    #[inline(always)]
143    pub fn variant(&self) -> PEAKDETMODE_A {
144        match self.bits {
145            0 => PEAKDETMODE_A::ONCECMD,
146            1 => PEAKDETMODE_A::AUTOCMD,
147            2 => PEAKDETMODE_A::CMD,
148            3 => PEAKDETMODE_A::MANUAL,
149            _ => unreachable!(),
150        }
151    }
152    #[doc = "Checks if the value of the field is `ONCECMD`"]
153    #[inline(always)]
154    pub fn is_oncecmd(&self) -> bool {
155        *self == PEAKDETMODE_A::ONCECMD
156    }
157    #[doc = "Checks if the value of the field is `AUTOCMD`"]
158    #[inline(always)]
159    pub fn is_autocmd(&self) -> bool {
160        *self == PEAKDETMODE_A::AUTOCMD
161    }
162    #[doc = "Checks if the value of the field is `CMD`"]
163    #[inline(always)]
164    pub fn is_cmd(&self) -> bool {
165        *self == PEAKDETMODE_A::CMD
166    }
167    #[doc = "Checks if the value of the field is `MANUAL`"]
168    #[inline(always)]
169    pub fn is_manual(&self) -> bool {
170        *self == PEAKDETMODE_A::MANUAL
171    }
172}
173#[doc = "Field `PEAKDETMODE` writer - HFXO Automatic Peak Detection Mode"]
174pub type PEAKDETMODE_W<'a> =
175    crate::FieldWriterSafe<'a, u32, HFXOCTRL_SPEC, u8, PEAKDETMODE_A, 2, 4>;
176impl<'a> PEAKDETMODE_W<'a> {
177    #[doc = "Automatic control of HFXO peak detection sequence. Only performs peak detection on initial HFXO startup. CMU_CMD HFXOPEAKDETSTART allowed to be used after HFXORDY=1."]
178    #[inline(always)]
179    pub fn oncecmd(self) -> &'a mut W {
180        self.variant(PEAKDETMODE_A::ONCECMD)
181    }
182    #[doc = "Automatic control of HFXO peak detection sequence. CMU_CMD HFXOPEAKDETSTART allowed to be used after HFXORDY=1."]
183    #[inline(always)]
184    pub fn autocmd(self) -> &'a mut W {
185        self.variant(PEAKDETMODE_A::AUTOCMD)
186    }
187    #[doc = "CMU_CMD HFXOPEAKDETSTART can be used to trigger the peak detection sequence after HFXORDY=1."]
188    #[inline(always)]
189    pub fn cmd(self) -> &'a mut W {
190        self.variant(PEAKDETMODE_A::CMD)
191    }
192    #[doc = "CMU_HFXOSTEADYSTATECTRL IBTRIMXOCORE and PEAKDETEN are under full software control and are allowed to be changed once HFXO is ready."]
193    #[inline(always)]
194    pub fn manual(self) -> &'a mut W {
195        self.variant(PEAKDETMODE_A::MANUAL)
196    }
197}
198#[doc = "HFXO Low Frequency Timeout\n\nValue on reset: 0"]
199#[derive(Clone, Copy, Debug, PartialEq)]
200#[repr(u8)]
201pub enum LFTIMEOUT_A {
202    #[doc = "0: Timeout period of 0 cycles (disabled)"]
203    _0CYCLES = 0,
204    #[doc = "1: Timeout period of 2 cycles"]
205    _2CYCLES = 1,
206    #[doc = "2: Timeout period of 4 cycles"]
207    _4CYCLES = 2,
208    #[doc = "3: Timeout period of 16 cycles"]
209    _16CYCLES = 3,
210    #[doc = "4: Timeout period of 32 cycles"]
211    _32CYCLES = 4,
212    #[doc = "5: Timeout period of 64 cycles"]
213    _64CYCLES = 5,
214    #[doc = "6: Timeout period of 1024 cycles"]
215    _1KCYCLES = 6,
216    #[doc = "7: Timeout period of 4096 cycles"]
217    _4KCYCLES = 7,
218}
219impl From<LFTIMEOUT_A> for u8 {
220    #[inline(always)]
221    fn from(variant: LFTIMEOUT_A) -> Self {
222        variant as _
223    }
224}
225#[doc = "Field `LFTIMEOUT` reader - HFXO Low Frequency Timeout"]
226pub type LFTIMEOUT_R = crate::FieldReader<u8, LFTIMEOUT_A>;
227impl LFTIMEOUT_R {
228    #[doc = "Get enumerated values variant"]
229    #[inline(always)]
230    pub fn variant(&self) -> LFTIMEOUT_A {
231        match self.bits {
232            0 => LFTIMEOUT_A::_0CYCLES,
233            1 => LFTIMEOUT_A::_2CYCLES,
234            2 => LFTIMEOUT_A::_4CYCLES,
235            3 => LFTIMEOUT_A::_16CYCLES,
236            4 => LFTIMEOUT_A::_32CYCLES,
237            5 => LFTIMEOUT_A::_64CYCLES,
238            6 => LFTIMEOUT_A::_1KCYCLES,
239            7 => LFTIMEOUT_A::_4KCYCLES,
240            _ => unreachable!(),
241        }
242    }
243    #[doc = "Checks if the value of the field is `_0CYCLES`"]
244    #[inline(always)]
245    pub fn is_0cycles(&self) -> bool {
246        *self == LFTIMEOUT_A::_0CYCLES
247    }
248    #[doc = "Checks if the value of the field is `_2CYCLES`"]
249    #[inline(always)]
250    pub fn is_2cycles(&self) -> bool {
251        *self == LFTIMEOUT_A::_2CYCLES
252    }
253    #[doc = "Checks if the value of the field is `_4CYCLES`"]
254    #[inline(always)]
255    pub fn is_4cycles(&self) -> bool {
256        *self == LFTIMEOUT_A::_4CYCLES
257    }
258    #[doc = "Checks if the value of the field is `_16CYCLES`"]
259    #[inline(always)]
260    pub fn is_16cycles(&self) -> bool {
261        *self == LFTIMEOUT_A::_16CYCLES
262    }
263    #[doc = "Checks if the value of the field is `_32CYCLES`"]
264    #[inline(always)]
265    pub fn is_32cycles(&self) -> bool {
266        *self == LFTIMEOUT_A::_32CYCLES
267    }
268    #[doc = "Checks if the value of the field is `_64CYCLES`"]
269    #[inline(always)]
270    pub fn is_64cycles(&self) -> bool {
271        *self == LFTIMEOUT_A::_64CYCLES
272    }
273    #[doc = "Checks if the value of the field is `_1KCYCLES`"]
274    #[inline(always)]
275    pub fn is_1kcycles(&self) -> bool {
276        *self == LFTIMEOUT_A::_1KCYCLES
277    }
278    #[doc = "Checks if the value of the field is `_4KCYCLES`"]
279    #[inline(always)]
280    pub fn is_4kcycles(&self) -> bool {
281        *self == LFTIMEOUT_A::_4KCYCLES
282    }
283}
284#[doc = "Field `LFTIMEOUT` writer - HFXO Low Frequency Timeout"]
285pub type LFTIMEOUT_W<'a> = crate::FieldWriterSafe<'a, u32, HFXOCTRL_SPEC, u8, LFTIMEOUT_A, 3, 24>;
286impl<'a> LFTIMEOUT_W<'a> {
287    #[doc = "Timeout period of 0 cycles (disabled)"]
288    #[inline(always)]
289    pub fn _0cycles(self) -> &'a mut W {
290        self.variant(LFTIMEOUT_A::_0CYCLES)
291    }
292    #[doc = "Timeout period of 2 cycles"]
293    #[inline(always)]
294    pub fn _2cycles(self) -> &'a mut W {
295        self.variant(LFTIMEOUT_A::_2CYCLES)
296    }
297    #[doc = "Timeout period of 4 cycles"]
298    #[inline(always)]
299    pub fn _4cycles(self) -> &'a mut W {
300        self.variant(LFTIMEOUT_A::_4CYCLES)
301    }
302    #[doc = "Timeout period of 16 cycles"]
303    #[inline(always)]
304    pub fn _16cycles(self) -> &'a mut W {
305        self.variant(LFTIMEOUT_A::_16CYCLES)
306    }
307    #[doc = "Timeout period of 32 cycles"]
308    #[inline(always)]
309    pub fn _32cycles(self) -> &'a mut W {
310        self.variant(LFTIMEOUT_A::_32CYCLES)
311    }
312    #[doc = "Timeout period of 64 cycles"]
313    #[inline(always)]
314    pub fn _64cycles(self) -> &'a mut W {
315        self.variant(LFTIMEOUT_A::_64CYCLES)
316    }
317    #[doc = "Timeout period of 1024 cycles"]
318    #[inline(always)]
319    pub fn _1kcycles(self) -> &'a mut W {
320        self.variant(LFTIMEOUT_A::_1KCYCLES)
321    }
322    #[doc = "Timeout period of 4096 cycles"]
323    #[inline(always)]
324    pub fn _4kcycles(self) -> &'a mut W {
325        self.variant(LFTIMEOUT_A::_4KCYCLES)
326    }
327}
328#[doc = "Field `AUTOSTARTEM0EM1` reader - Automatically Start of HFXO Upon EM0/EM1 Entry From EM2/EM3"]
329pub type AUTOSTARTEM0EM1_R = crate::BitReader<bool>;
330#[doc = "Field `AUTOSTARTEM0EM1` writer - Automatically Start of HFXO Upon EM0/EM1 Entry From EM2/EM3"]
331pub type AUTOSTARTEM0EM1_W<'a> = crate::BitWriter<'a, u32, HFXOCTRL_SPEC, bool, 28>;
332#[doc = "Field `AUTOSTARTSELEM0EM1` reader - Automatically Start and Select of HFXO Upon EM0/EM1 Entry From EM2/EM3"]
333pub type AUTOSTARTSELEM0EM1_R = crate::BitReader<bool>;
334#[doc = "Field `AUTOSTARTSELEM0EM1` writer - Automatically Start and Select of HFXO Upon EM0/EM1 Entry From EM2/EM3"]
335pub type AUTOSTARTSELEM0EM1_W<'a> = crate::BitWriter<'a, u32, HFXOCTRL_SPEC, bool, 29>;
336impl R {
337    #[doc = "Bits 0:1 - HFXO Mode"]
338    #[inline(always)]
339    pub fn mode(&self) -> MODE_R {
340        MODE_R::new((self.bits & 3) as u8)
341    }
342    #[doc = "Bit 3 - Enable Double Frequency on HFXOX2 Clock (compared to HFXO Clock)"]
343    #[inline(always)]
344    pub fn hfxox2en(&self) -> HFXOX2EN_R {
345        HFXOX2EN_R::new(((self.bits >> 3) & 1) != 0)
346    }
347    #[doc = "Bits 4:5 - HFXO Automatic Peak Detection Mode"]
348    #[inline(always)]
349    pub fn peakdetmode(&self) -> PEAKDETMODE_R {
350        PEAKDETMODE_R::new(((self.bits >> 4) & 3) as u8)
351    }
352    #[doc = "Bits 24:26 - HFXO Low Frequency Timeout"]
353    #[inline(always)]
354    pub fn lftimeout(&self) -> LFTIMEOUT_R {
355        LFTIMEOUT_R::new(((self.bits >> 24) & 7) as u8)
356    }
357    #[doc = "Bit 28 - Automatically Start of HFXO Upon EM0/EM1 Entry From EM2/EM3"]
358    #[inline(always)]
359    pub fn autostartem0em1(&self) -> AUTOSTARTEM0EM1_R {
360        AUTOSTARTEM0EM1_R::new(((self.bits >> 28) & 1) != 0)
361    }
362    #[doc = "Bit 29 - Automatically Start and Select of HFXO Upon EM0/EM1 Entry From EM2/EM3"]
363    #[inline(always)]
364    pub fn autostartselem0em1(&self) -> AUTOSTARTSELEM0EM1_R {
365        AUTOSTARTSELEM0EM1_R::new(((self.bits >> 29) & 1) != 0)
366    }
367}
368impl W {
369    #[doc = "Bits 0:1 - HFXO Mode"]
370    #[inline(always)]
371    pub fn mode(&mut self) -> MODE_W {
372        MODE_W::new(self)
373    }
374    #[doc = "Bit 3 - Enable Double Frequency on HFXOX2 Clock (compared to HFXO Clock)"]
375    #[inline(always)]
376    pub fn hfxox2en(&mut self) -> HFXOX2EN_W {
377        HFXOX2EN_W::new(self)
378    }
379    #[doc = "Bits 4:5 - HFXO Automatic Peak Detection Mode"]
380    #[inline(always)]
381    pub fn peakdetmode(&mut self) -> PEAKDETMODE_W {
382        PEAKDETMODE_W::new(self)
383    }
384    #[doc = "Bits 24:26 - HFXO Low Frequency Timeout"]
385    #[inline(always)]
386    pub fn lftimeout(&mut self) -> LFTIMEOUT_W {
387        LFTIMEOUT_W::new(self)
388    }
389    #[doc = "Bit 28 - Automatically Start of HFXO Upon EM0/EM1 Entry From EM2/EM3"]
390    #[inline(always)]
391    pub fn autostartem0em1(&mut self) -> AUTOSTARTEM0EM1_W {
392        AUTOSTARTEM0EM1_W::new(self)
393    }
394    #[doc = "Bit 29 - Automatically Start and Select of HFXO Upon EM0/EM1 Entry From EM2/EM3"]
395    #[inline(always)]
396    pub fn autostartselem0em1(&mut self) -> AUTOSTARTSELEM0EM1_W {
397        AUTOSTARTSELEM0EM1_W::new(self)
398    }
399    #[doc = "Writes raw bits to the register."]
400    #[inline(always)]
401    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
402        self.0.bits(bits);
403        self
404    }
405}
406#[doc = "HFXO Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfxoctrl](index.html) module"]
407pub struct HFXOCTRL_SPEC;
408impl crate::RegisterSpec for HFXOCTRL_SPEC {
409    type Ux = u32;
410}
411#[doc = "`read()` method returns [hfxoctrl::R](R) reader structure"]
412impl crate::Readable for HFXOCTRL_SPEC {
413    type Reader = R;
414}
415#[doc = "`write(|w| ..)` method takes [hfxoctrl::W](W) writer structure"]
416impl crate::Writable for HFXOCTRL_SPEC {
417    type Writer = W;
418}
419#[doc = "`reset()` method sets HFXOCTRL to value 0x08"]
420impl crate::Resettable for HFXOCTRL_SPEC {
421    #[inline(always)]
422    fn reset_value() -> Self::Ux {
423        0x08
424    }
425}
efm32gg11b320_pac/cmu/hfxoctrl.rs

efm32gg11b320_pac/cmu/
hfxoctrl.rs
