efm32gg11b320_pac/adc1/
scanctrl.rs

1#[doc = "Register `SCANCTRL` reader"]
2pub struct R(crate::R<SCANCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SCANCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SCANCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SCANCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SCANCTRL` writer"]
17pub struct W(crate::W<SCANCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SCANCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SCANCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SCANCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `REP` reader - Scan Sequence Repetitive Mode"]
38pub type REP_R = crate::BitReader<bool>;
39#[doc = "Field `REP` writer - Scan Sequence Repetitive Mode"]
40pub type REP_W<'a> = crate::BitWriter<'a, u32, SCANCTRL_SPEC, bool, 0>;
41#[doc = "Field `DIFF` reader - Scan Sequence Differential Mode"]
42pub type DIFF_R = crate::BitReader<bool>;
43#[doc = "Field `DIFF` writer - Scan Sequence Differential Mode"]
44pub type DIFF_W<'a> = crate::BitWriter<'a, u32, SCANCTRL_SPEC, bool, 1>;
45#[doc = "Field `ADJ` reader - Scan Sequence Result Adjustment"]
46pub type ADJ_R = crate::BitReader<bool>;
47#[doc = "Field `ADJ` writer - Scan Sequence Result Adjustment"]
48pub type ADJ_W<'a> = crate::BitWriter<'a, u32, SCANCTRL_SPEC, bool, 2>;
49#[doc = "Scan Sequence Resolution Select\n\nValue on reset: 0"]
50#[derive(Clone, Copy, Debug, PartialEq)]
51#[repr(u8)]
52pub enum RES_A {
53    #[doc = "0: 12-bit resolution"]
54    _12BIT = 0,
55    #[doc = "1: 8-bit resolution"]
56    _8BIT = 1,
57    #[doc = "2: 6-bit resolution"]
58    _6BIT = 2,
59    #[doc = "3: Oversampling enabled. Oversampling rate is set in OVSRSEL"]
60    OVS = 3,
61}
62impl From<RES_A> for u8 {
63    #[inline(always)]
64    fn from(variant: RES_A) -> Self {
65        variant as _
66    }
67}
68#[doc = "Field `RES` reader - Scan Sequence Resolution Select"]
69pub type RES_R = crate::FieldReader<u8, RES_A>;
70impl RES_R {
71    #[doc = "Get enumerated values variant"]
72    #[inline(always)]
73    pub fn variant(&self) -> RES_A {
74        match self.bits {
75            0 => RES_A::_12BIT,
76            1 => RES_A::_8BIT,
77            2 => RES_A::_6BIT,
78            3 => RES_A::OVS,
79            _ => unreachable!(),
80        }
81    }
82    #[doc = "Checks if the value of the field is `_12BIT`"]
83    #[inline(always)]
84    pub fn is_12bit(&self) -> bool {
85        *self == RES_A::_12BIT
86    }
87    #[doc = "Checks if the value of the field is `_8BIT`"]
88    #[inline(always)]
89    pub fn is_8bit(&self) -> bool {
90        *self == RES_A::_8BIT
91    }
92    #[doc = "Checks if the value of the field is `_6BIT`"]
93    #[inline(always)]
94    pub fn is_6bit(&self) -> bool {
95        *self == RES_A::_6BIT
96    }
97    #[doc = "Checks if the value of the field is `OVS`"]
98    #[inline(always)]
99    pub fn is_ovs(&self) -> bool {
100        *self == RES_A::OVS
101    }
102}
103#[doc = "Field `RES` writer - Scan Sequence Resolution Select"]
104pub type RES_W<'a> = crate::FieldWriterSafe<'a, u32, SCANCTRL_SPEC, u8, RES_A, 2, 3>;
105impl<'a> RES_W<'a> {
106    #[doc = "12-bit resolution"]
107    #[inline(always)]
108    pub fn _12bit(self) -> &'a mut W {
109        self.variant(RES_A::_12BIT)
110    }
111    #[doc = "8-bit resolution"]
112    #[inline(always)]
113    pub fn _8bit(self) -> &'a mut W {
114        self.variant(RES_A::_8BIT)
115    }
116    #[doc = "6-bit resolution"]
117    #[inline(always)]
118    pub fn _6bit(self) -> &'a mut W {
119        self.variant(RES_A::_6BIT)
120    }
121    #[doc = "Oversampling enabled. Oversampling rate is set in OVSRSEL"]
122    #[inline(always)]
123    pub fn ovs(self) -> &'a mut W {
124        self.variant(RES_A::OVS)
125    }
126}
127#[doc = "Scan Sequence Reference Selection\n\nValue on reset: 0"]
128#[derive(Clone, Copy, Debug, PartialEq)]
129#[repr(u8)]
130pub enum REF_A {
131    #[doc = "0: VFS = 1.25V with internal VBGR reference"]
132    _1V25 = 0,
133    #[doc = "1: VFS = 2.5V with internal VBGR reference"]
134    _2V5 = 1,
135    #[doc = "2: VFS = AVDD with AVDD as reference source"]
136    VDD = 2,
137    #[doc = "3: VFS = 5V with internal VBGR reference"]
138    _5V = 3,
139    #[doc = "4: Single ended external reference"]
140    EXTSINGLE = 4,
141    #[doc = "5: Differential external reference, 2x"]
142    _2XEXTDIFF = 5,
143    #[doc = "6: VFS=2xAVDD with AVDD as the reference source"]
144    _2XVDD = 6,
145    #[doc = "7: Use SCANCTRLX to configure reference"]
146    CONF = 7,
147}
148impl From<REF_A> for u8 {
149    #[inline(always)]
150    fn from(variant: REF_A) -> Self {
151        variant as _
152    }
153}
154#[doc = "Field `REF` reader - Scan Sequence Reference Selection"]
155pub type REF_R = crate::FieldReader<u8, REF_A>;
156impl REF_R {
157    #[doc = "Get enumerated values variant"]
158    #[inline(always)]
159    pub fn variant(&self) -> REF_A {
160        match self.bits {
161            0 => REF_A::_1V25,
162            1 => REF_A::_2V5,
163            2 => REF_A::VDD,
164            3 => REF_A::_5V,
165            4 => REF_A::EXTSINGLE,
166            5 => REF_A::_2XEXTDIFF,
167            6 => REF_A::_2XVDD,
168            7 => REF_A::CONF,
169            _ => unreachable!(),
170        }
171    }
172    #[doc = "Checks if the value of the field is `_1V25`"]
173    #[inline(always)]
174    pub fn is_1v25(&self) -> bool {
175        *self == REF_A::_1V25
176    }
177    #[doc = "Checks if the value of the field is `_2V5`"]
178    #[inline(always)]
179    pub fn is_2v5(&self) -> bool {
180        *self == REF_A::_2V5
181    }
182    #[doc = "Checks if the value of the field is `VDD`"]
183    #[inline(always)]
184    pub fn is_vdd(&self) -> bool {
185        *self == REF_A::VDD
186    }
187    #[doc = "Checks if the value of the field is `_5V`"]
188    #[inline(always)]
189    pub fn is_5v(&self) -> bool {
190        *self == REF_A::_5V
191    }
192    #[doc = "Checks if the value of the field is `EXTSINGLE`"]
193    #[inline(always)]
194    pub fn is_extsingle(&self) -> bool {
195        *self == REF_A::EXTSINGLE
196    }
197    #[doc = "Checks if the value of the field is `_2XEXTDIFF`"]
198    #[inline(always)]
199    pub fn is_2xextdiff(&self) -> bool {
200        *self == REF_A::_2XEXTDIFF
201    }
202    #[doc = "Checks if the value of the field is `_2XVDD`"]
203    #[inline(always)]
204    pub fn is_2xvdd(&self) -> bool {
205        *self == REF_A::_2XVDD
206    }
207    #[doc = "Checks if the value of the field is `CONF`"]
208    #[inline(always)]
209    pub fn is_conf(&self) -> bool {
210        *self == REF_A::CONF
211    }
212}
213#[doc = "Field `REF` writer - Scan Sequence Reference Selection"]
214pub type REF_W<'a> = crate::FieldWriterSafe<'a, u32, SCANCTRL_SPEC, u8, REF_A, 3, 5>;
215impl<'a> REF_W<'a> {
216    #[doc = "VFS = 1.25V with internal VBGR reference"]
217    #[inline(always)]
218    pub fn _1v25(self) -> &'a mut W {
219        self.variant(REF_A::_1V25)
220    }
221    #[doc = "VFS = 2.5V with internal VBGR reference"]
222    #[inline(always)]
223    pub fn _2v5(self) -> &'a mut W {
224        self.variant(REF_A::_2V5)
225    }
226    #[doc = "VFS = AVDD with AVDD as reference source"]
227    #[inline(always)]
228    pub fn vdd(self) -> &'a mut W {
229        self.variant(REF_A::VDD)
230    }
231    #[doc = "VFS = 5V with internal VBGR reference"]
232    #[inline(always)]
233    pub fn _5v(self) -> &'a mut W {
234        self.variant(REF_A::_5V)
235    }
236    #[doc = "Single ended external reference"]
237    #[inline(always)]
238    pub fn extsingle(self) -> &'a mut W {
239        self.variant(REF_A::EXTSINGLE)
240    }
241    #[doc = "Differential external reference, 2x"]
242    #[inline(always)]
243    pub fn _2xextdiff(self) -> &'a mut W {
244        self.variant(REF_A::_2XEXTDIFF)
245    }
246    #[doc = "VFS=2xAVDD with AVDD as the reference source"]
247    #[inline(always)]
248    pub fn _2xvdd(self) -> &'a mut W {
249        self.variant(REF_A::_2XVDD)
250    }
251    #[doc = "Use SCANCTRLX to configure reference"]
252    #[inline(always)]
253    pub fn conf(self) -> &'a mut W {
254        self.variant(REF_A::CONF)
255    }
256}
257#[doc = "Scan Acquisition Time\n\nValue on reset: 0"]
258#[derive(Clone, Copy, Debug, PartialEq)]
259#[repr(u8)]
260pub enum AT_A {
261    #[doc = "0: 1 conversion clock cycle acquisition time for scan"]
262    _1CYCLE = 0,
263    #[doc = "1: 2 conversion clock cycles acquisition time for scan"]
264    _2CYCLES = 1,
265    #[doc = "2: 3 conversion clock cycles acquisition time for scan"]
266    _3CYCLES = 2,
267    #[doc = "3: 4 conversion clock cycles acquisition time for scan"]
268    _4CYCLES = 3,
269    #[doc = "4: 8 conversion clock cycles acquisition time for scan"]
270    _8CYCLES = 4,
271    #[doc = "5: 16 conversion clock cycles acquisition time for scan"]
272    _16CYCLES = 5,
273    #[doc = "6: 32 conversion clock cycles acquisition time for scan"]
274    _32CYCLES = 6,
275    #[doc = "7: 64 conversion clock cycles acquisition time for scan"]
276    _64CYCLES = 7,
277    #[doc = "8: 128 conversion clock cycles acquisition time for scan"]
278    _128CYCLES = 8,
279    #[doc = "9: 256 conversion clock cycles acquisition time for scan"]
280    _256CYCLES = 9,
281}
282impl From<AT_A> for u8 {
283    #[inline(always)]
284    fn from(variant: AT_A) -> Self {
285        variant as _
286    }
287}
288#[doc = "Field `AT` reader - Scan Acquisition Time"]
289pub type AT_R = crate::FieldReader<u8, AT_A>;
290impl AT_R {
291    #[doc = "Get enumerated values variant"]
292    #[inline(always)]
293    pub fn variant(&self) -> Option<AT_A> {
294        match self.bits {
295            0 => Some(AT_A::_1CYCLE),
296            1 => Some(AT_A::_2CYCLES),
297            2 => Some(AT_A::_3CYCLES),
298            3 => Some(AT_A::_4CYCLES),
299            4 => Some(AT_A::_8CYCLES),
300            5 => Some(AT_A::_16CYCLES),
301            6 => Some(AT_A::_32CYCLES),
302            7 => Some(AT_A::_64CYCLES),
303            8 => Some(AT_A::_128CYCLES),
304            9 => Some(AT_A::_256CYCLES),
305            _ => None,
306        }
307    }
308    #[doc = "Checks if the value of the field is `_1CYCLE`"]
309    #[inline(always)]
310    pub fn is_1cycle(&self) -> bool {
311        *self == AT_A::_1CYCLE
312    }
313    #[doc = "Checks if the value of the field is `_2CYCLES`"]
314    #[inline(always)]
315    pub fn is_2cycles(&self) -> bool {
316        *self == AT_A::_2CYCLES
317    }
318    #[doc = "Checks if the value of the field is `_3CYCLES`"]
319    #[inline(always)]
320    pub fn is_3cycles(&self) -> bool {
321        *self == AT_A::_3CYCLES
322    }
323    #[doc = "Checks if the value of the field is `_4CYCLES`"]
324    #[inline(always)]
325    pub fn is_4cycles(&self) -> bool {
326        *self == AT_A::_4CYCLES
327    }
328    #[doc = "Checks if the value of the field is `_8CYCLES`"]
329    #[inline(always)]
330    pub fn is_8cycles(&self) -> bool {
331        *self == AT_A::_8CYCLES
332    }
333    #[doc = "Checks if the value of the field is `_16CYCLES`"]
334    #[inline(always)]
335    pub fn is_16cycles(&self) -> bool {
336        *self == AT_A::_16CYCLES
337    }
338    #[doc = "Checks if the value of the field is `_32CYCLES`"]
339    #[inline(always)]
340    pub fn is_32cycles(&self) -> bool {
341        *self == AT_A::_32CYCLES
342    }
343    #[doc = "Checks if the value of the field is `_64CYCLES`"]
344    #[inline(always)]
345    pub fn is_64cycles(&self) -> bool {
346        *self == AT_A::_64CYCLES
347    }
348    #[doc = "Checks if the value of the field is `_128CYCLES`"]
349    #[inline(always)]
350    pub fn is_128cycles(&self) -> bool {
351        *self == AT_A::_128CYCLES
352    }
353    #[doc = "Checks if the value of the field is `_256CYCLES`"]
354    #[inline(always)]
355    pub fn is_256cycles(&self) -> bool {
356        *self == AT_A::_256CYCLES
357    }
358}
359#[doc = "Field `AT` writer - Scan Acquisition Time"]
360pub type AT_W<'a> = crate::FieldWriter<'a, u32, SCANCTRL_SPEC, u8, AT_A, 4, 24>;
361impl<'a> AT_W<'a> {
362    #[doc = "1 conversion clock cycle acquisition time for scan"]
363    #[inline(always)]
364    pub fn _1cycle(self) -> &'a mut W {
365        self.variant(AT_A::_1CYCLE)
366    }
367    #[doc = "2 conversion clock cycles acquisition time for scan"]
368    #[inline(always)]
369    pub fn _2cycles(self) -> &'a mut W {
370        self.variant(AT_A::_2CYCLES)
371    }
372    #[doc = "3 conversion clock cycles acquisition time for scan"]
373    #[inline(always)]
374    pub fn _3cycles(self) -> &'a mut W {
375        self.variant(AT_A::_3CYCLES)
376    }
377    #[doc = "4 conversion clock cycles acquisition time for scan"]
378    #[inline(always)]
379    pub fn _4cycles(self) -> &'a mut W {
380        self.variant(AT_A::_4CYCLES)
381    }
382    #[doc = "8 conversion clock cycles acquisition time for scan"]
383    #[inline(always)]
384    pub fn _8cycles(self) -> &'a mut W {
385        self.variant(AT_A::_8CYCLES)
386    }
387    #[doc = "16 conversion clock cycles acquisition time for scan"]
388    #[inline(always)]
389    pub fn _16cycles(self) -> &'a mut W {
390        self.variant(AT_A::_16CYCLES)
391    }
392    #[doc = "32 conversion clock cycles acquisition time for scan"]
393    #[inline(always)]
394    pub fn _32cycles(self) -> &'a mut W {
395        self.variant(AT_A::_32CYCLES)
396    }
397    #[doc = "64 conversion clock cycles acquisition time for scan"]
398    #[inline(always)]
399    pub fn _64cycles(self) -> &'a mut W {
400        self.variant(AT_A::_64CYCLES)
401    }
402    #[doc = "128 conversion clock cycles acquisition time for scan"]
403    #[inline(always)]
404    pub fn _128cycles(self) -> &'a mut W {
405        self.variant(AT_A::_128CYCLES)
406    }
407    #[doc = "256 conversion clock cycles acquisition time for scan"]
408    #[inline(always)]
409    pub fn _256cycles(self) -> &'a mut W {
410        self.variant(AT_A::_256CYCLES)
411    }
412}
413#[doc = "Field `PRSEN` reader - Scan Sequence PRS Trigger Enable"]
414pub type PRSEN_R = crate::BitReader<bool>;
415#[doc = "Field `PRSEN` writer - Scan Sequence PRS Trigger Enable"]
416pub type PRSEN_W<'a> = crate::BitWriter<'a, u32, SCANCTRL_SPEC, bool, 29>;
417#[doc = "Field `CMPEN` reader - Compare Logic Enable for Scan"]
418pub type CMPEN_R = crate::BitReader<bool>;
419#[doc = "Field `CMPEN` writer - Compare Logic Enable for Scan"]
420pub type CMPEN_W<'a> = crate::BitWriter<'a, u32, SCANCTRL_SPEC, bool, 31>;
421impl R {
422    #[doc = "Bit 0 - Scan Sequence Repetitive Mode"]
423    #[inline(always)]
424    pub fn rep(&self) -> REP_R {
425        REP_R::new((self.bits & 1) != 0)
426    }
427    #[doc = "Bit 1 - Scan Sequence Differential Mode"]
428    #[inline(always)]
429    pub fn diff(&self) -> DIFF_R {
430        DIFF_R::new(((self.bits >> 1) & 1) != 0)
431    }
432    #[doc = "Bit 2 - Scan Sequence Result Adjustment"]
433    #[inline(always)]
434    pub fn adj(&self) -> ADJ_R {
435        ADJ_R::new(((self.bits >> 2) & 1) != 0)
436    }
437    #[doc = "Bits 3:4 - Scan Sequence Resolution Select"]
438    #[inline(always)]
439    pub fn res(&self) -> RES_R {
440        RES_R::new(((self.bits >> 3) & 3) as u8)
441    }
442    #[doc = "Bits 5:7 - Scan Sequence Reference Selection"]
443    #[inline(always)]
444    pub fn ref_(&self) -> REF_R {
445        REF_R::new(((self.bits >> 5) & 7) as u8)
446    }
447    #[doc = "Bits 24:27 - Scan Acquisition Time"]
448    #[inline(always)]
449    pub fn at(&self) -> AT_R {
450        AT_R::new(((self.bits >> 24) & 0x0f) as u8)
451    }
452    #[doc = "Bit 29 - Scan Sequence PRS Trigger Enable"]
453    #[inline(always)]
454    pub fn prsen(&self) -> PRSEN_R {
455        PRSEN_R::new(((self.bits >> 29) & 1) != 0)
456    }
457    #[doc = "Bit 31 - Compare Logic Enable for Scan"]
458    #[inline(always)]
459    pub fn cmpen(&self) -> CMPEN_R {
460        CMPEN_R::new(((self.bits >> 31) & 1) != 0)
461    }
462}
463impl W {
464    #[doc = "Bit 0 - Scan Sequence Repetitive Mode"]
465    #[inline(always)]
466    pub fn rep(&mut self) -> REP_W {
467        REP_W::new(self)
468    }
469    #[doc = "Bit 1 - Scan Sequence Differential Mode"]
470    #[inline(always)]
471    pub fn diff(&mut self) -> DIFF_W {
472        DIFF_W::new(self)
473    }
474    #[doc = "Bit 2 - Scan Sequence Result Adjustment"]
475    #[inline(always)]
476    pub fn adj(&mut self) -> ADJ_W {
477        ADJ_W::new(self)
478    }
479    #[doc = "Bits 3:4 - Scan Sequence Resolution Select"]
480    #[inline(always)]
481    pub fn res(&mut self) -> RES_W {
482        RES_W::new(self)
483    }
484    #[doc = "Bits 5:7 - Scan Sequence Reference Selection"]
485    #[inline(always)]
486    pub fn ref_(&mut self) -> REF_W {
487        REF_W::new(self)
488    }
489    #[doc = "Bits 24:27 - Scan Acquisition Time"]
490    #[inline(always)]
491    pub fn at(&mut self) -> AT_W {
492        AT_W::new(self)
493    }
494    #[doc = "Bit 29 - Scan Sequence PRS Trigger Enable"]
495    #[inline(always)]
496    pub fn prsen(&mut self) -> PRSEN_W {
497        PRSEN_W::new(self)
498    }
499    #[doc = "Bit 31 - Compare Logic Enable for Scan"]
500    #[inline(always)]
501    pub fn cmpen(&mut self) -> CMPEN_W {
502        CMPEN_W::new(self)
503    }
504    #[doc = "Writes raw bits to the register."]
505    #[inline(always)]
506    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
507        self.0.bits(bits);
508        self
509    }
510}
511#[doc = "Scan Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scanctrl](index.html) module"]
512pub struct SCANCTRL_SPEC;
513impl crate::RegisterSpec for SCANCTRL_SPEC {
514    type Ux = u32;
515}
516#[doc = "`read()` method returns [scanctrl::R](R) reader structure"]
517impl crate::Readable for SCANCTRL_SPEC {
518    type Reader = R;
519}
520#[doc = "`write(|w| ..)` method takes [scanctrl::W](W) writer structure"]
521impl crate::Writable for SCANCTRL_SPEC {
522    type Writer = W;
523}
524#[doc = "`reset()` method sets SCANCTRL to value 0"]
525impl crate::Resettable for SCANCTRL_SPEC {
526    #[inline(always)]
527    fn reset_value() -> Self::Ux {
528        0
529    }
530}
efm32gg11b320_pac/adc1/scanctrl.rs

efm32gg11b320_pac/adc1/
scanctrl.rs
