efm32gg11b310_pac/msc/
if_.rs

1#[doc = "Register `IF` reader"]
2pub struct R(crate::R<IF_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<IF_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<IF_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<IF_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `ERASE` reader - Erase Done Interrupt Read Flag"]
17pub type ERASE_R = crate::BitReader<bool>;
18#[doc = "Field `WRITE` reader - Write Done Interrupt Read Flag"]
19pub type WRITE_R = crate::BitReader<bool>;
20#[doc = "Field `CHOF` reader - Cache Hits Overflow Interrupt Flag"]
21pub type CHOF_R = crate::BitReader<bool>;
22#[doc = "Field `CMOF` reader - Cache Misses Overflow Interrupt Flag"]
23pub type CMOF_R = crate::BitReader<bool>;
24#[doc = "Field `PWRUPF` reader - Flash Power Up Sequence Complete Flag"]
25pub type PWRUPF_R = crate::BitReader<bool>;
26#[doc = "Field `ICACHERR` reader - ICache RAM Parity Error Flag"]
27pub type ICACHERR_R = crate::BitReader<bool>;
28#[doc = "Field `WDATAOV` reader - Flash Controller Write Buffer Overflow"]
29pub type WDATAOV_R = crate::BitReader<bool>;
30#[doc = "Field `LVEWRITE` reader - Flash LVE Write Error Flag"]
31pub type LVEWRITE_R = crate::BitReader<bool>;
32#[doc = "Field `RAMERR1B` reader - RAM 1-bit ECC Error Interrupt Flag"]
33pub type RAMERR1B_R = crate::BitReader<bool>;
34#[doc = "Field `RAMERR2B` reader - RAM 2-bit ECC Error Interrupt Flag"]
35pub type RAMERR2B_R = crate::BitReader<bool>;
36#[doc = "Field `RAM1ERR1B` reader - RAM1 1-bit ECC Error Interrupt Flag"]
37pub type RAM1ERR1B_R = crate::BitReader<bool>;
38#[doc = "Field `RAM1ERR2B` reader - RAM1 2-bit ECC Error Interrupt Flag"]
39pub type RAM1ERR2B_R = crate::BitReader<bool>;
40impl R {
41    #[doc = "Bit 0 - Erase Done Interrupt Read Flag"]
42    #[inline(always)]
43    pub fn erase(&self) -> ERASE_R {
44        ERASE_R::new((self.bits & 1) != 0)
45    }
46    #[doc = "Bit 1 - Write Done Interrupt Read Flag"]
47    #[inline(always)]
48    pub fn write(&self) -> WRITE_R {
49        WRITE_R::new(((self.bits >> 1) & 1) != 0)
50    }
51    #[doc = "Bit 2 - Cache Hits Overflow Interrupt Flag"]
52    #[inline(always)]
53    pub fn chof(&self) -> CHOF_R {
54        CHOF_R::new(((self.bits >> 2) & 1) != 0)
55    }
56    #[doc = "Bit 3 - Cache Misses Overflow Interrupt Flag"]
57    #[inline(always)]
58    pub fn cmof(&self) -> CMOF_R {
59        CMOF_R::new(((self.bits >> 3) & 1) != 0)
60    }
61    #[doc = "Bit 4 - Flash Power Up Sequence Complete Flag"]
62    #[inline(always)]
63    pub fn pwrupf(&self) -> PWRUPF_R {
64        PWRUPF_R::new(((self.bits >> 4) & 1) != 0)
65    }
66    #[doc = "Bit 5 - ICache RAM Parity Error Flag"]
67    #[inline(always)]
68    pub fn icacherr(&self) -> ICACHERR_R {
69        ICACHERR_R::new(((self.bits >> 5) & 1) != 0)
70    }
71    #[doc = "Bit 6 - Flash Controller Write Buffer Overflow"]
72    #[inline(always)]
73    pub fn wdataov(&self) -> WDATAOV_R {
74        WDATAOV_R::new(((self.bits >> 6) & 1) != 0)
75    }
76    #[doc = "Bit 8 - Flash LVE Write Error Flag"]
77    #[inline(always)]
78    pub fn lvewrite(&self) -> LVEWRITE_R {
79        LVEWRITE_R::new(((self.bits >> 8) & 1) != 0)
80    }
81    #[doc = "Bit 16 - RAM 1-bit ECC Error Interrupt Flag"]
82    #[inline(always)]
83    pub fn ramerr1b(&self) -> RAMERR1B_R {
84        RAMERR1B_R::new(((self.bits >> 16) & 1) != 0)
85    }
86    #[doc = "Bit 17 - RAM 2-bit ECC Error Interrupt Flag"]
87    #[inline(always)]
88    pub fn ramerr2b(&self) -> RAMERR2B_R {
89        RAMERR2B_R::new(((self.bits >> 17) & 1) != 0)
90    }
91    #[doc = "Bit 18 - RAM1 1-bit ECC Error Interrupt Flag"]
92    #[inline(always)]
93    pub fn ram1err1b(&self) -> RAM1ERR1B_R {
94        RAM1ERR1B_R::new(((self.bits >> 18) & 1) != 0)
95    }
96    #[doc = "Bit 19 - RAM1 2-bit ECC Error Interrupt Flag"]
97    #[inline(always)]
98    pub fn ram1err2b(&self) -> RAM1ERR2B_R {
99        RAM1ERR2B_R::new(((self.bits >> 19) & 1) != 0)
100    }
101}
102#[doc = "Interrupt Flag Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [if_](index.html) module"]
103pub struct IF_SPEC;
104impl crate::RegisterSpec for IF_SPEC {
105    type Ux = u32;
106}
107#[doc = "`read()` method returns [if_::R](R) reader structure"]
108impl crate::Readable for IF_SPEC {
109    type Reader = R;
110}
111#[doc = "`reset()` method sets IF to value 0"]
112impl crate::Resettable for IF_SPEC {
113    #[inline(always)]
114    fn reset_value() -> Self::Ux {
115        0
116    }
117}
efm32gg11b310_pac/msc/if_.rs

efm32gg11b310_pac/msc/
if_.rs
