efm32gg11b310_pac/ldma/
ch2_ctrl.rs

1#[doc = "Register `CH2_CTRL` reader"]
2pub struct R(crate::R<CH2_CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CH2_CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CH2_CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CH2_CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CH2_CTRL` writer"]
17pub struct W(crate::W<CH2_CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CH2_CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CH2_CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CH2_CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "DMA Structure Type\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum STRUCTTYPE_A {
41    #[doc = "0: DMA transfer structure type selected."]
42    TRANSFER = 0,
43    #[doc = "1: Synchronization structure type selected."]
44    SYNCHRONIZE = 1,
45    #[doc = "2: Write immediate value structure type selected."]
46    WRITE = 2,
47}
48impl From<STRUCTTYPE_A> for u8 {
49    #[inline(always)]
50    fn from(variant: STRUCTTYPE_A) -> Self {
51        variant as _
52    }
53}
54#[doc = "Field `STRUCTTYPE` reader - DMA Structure Type"]
55pub type STRUCTTYPE_R = crate::FieldReader<u8, STRUCTTYPE_A>;
56impl STRUCTTYPE_R {
57    #[doc = "Get enumerated values variant"]
58    #[inline(always)]
59    pub fn variant(&self) -> Option<STRUCTTYPE_A> {
60        match self.bits {
61            0 => Some(STRUCTTYPE_A::TRANSFER),
62            1 => Some(STRUCTTYPE_A::SYNCHRONIZE),
63            2 => Some(STRUCTTYPE_A::WRITE),
64            _ => None,
65        }
66    }
67    #[doc = "Checks if the value of the field is `TRANSFER`"]
68    #[inline(always)]
69    pub fn is_transfer(&self) -> bool {
70        *self == STRUCTTYPE_A::TRANSFER
71    }
72    #[doc = "Checks if the value of the field is `SYNCHRONIZE`"]
73    #[inline(always)]
74    pub fn is_synchronize(&self) -> bool {
75        *self == STRUCTTYPE_A::SYNCHRONIZE
76    }
77    #[doc = "Checks if the value of the field is `WRITE`"]
78    #[inline(always)]
79    pub fn is_write(&self) -> bool {
80        *self == STRUCTTYPE_A::WRITE
81    }
82}
83#[doc = "Field `STRUCTREQ` writer - Structure DMA Transfer Request"]
84pub type STRUCTREQ_W<'a> = crate::BitWriter<'a, u32, CH2_CTRL_SPEC, bool, 3>;
85#[doc = "Field `XFERCNT` reader - DMA Unit Data Transfer Count"]
86pub type XFERCNT_R = crate::FieldReader<u16, u16>;
87#[doc = "Field `XFERCNT` writer - DMA Unit Data Transfer Count"]
88pub type XFERCNT_W<'a> = crate::FieldWriter<'a, u32, CH2_CTRL_SPEC, u16, u16, 11, 4>;
89#[doc = "Field `BYTESWAP` reader - Endian Byte Swap"]
90pub type BYTESWAP_R = crate::BitReader<bool>;
91#[doc = "Field `BYTESWAP` writer - Endian Byte Swap"]
92pub type BYTESWAP_W<'a> = crate::BitWriter<'a, u32, CH2_CTRL_SPEC, bool, 15>;
93#[doc = "Block Transfer Size\n\nValue on reset: 0"]
94#[derive(Clone, Copy, Debug, PartialEq)]
95#[repr(u8)]
96pub enum BLOCKSIZE_A {
97    #[doc = "0: One unit transfer per arbitration"]
98    UNIT1 = 0,
99    #[doc = "1: Two unit transfers per arbitration"]
100    UNIT2 = 1,
101    #[doc = "2: Three unit transfers per arbitration"]
102    UNIT3 = 2,
103    #[doc = "3: Four unit transfers per arbitration"]
104    UNIT4 = 3,
105    #[doc = "4: Six unit transfers per arbitration"]
106    UNIT6 = 4,
107    #[doc = "5: Eight unit transfers per arbitration"]
108    UNIT8 = 5,
109    #[doc = "7: Sixteen unit transfers per arbitration"]
110    UNIT16 = 7,
111    #[doc = "9: 32 unit transfers per arbitration"]
112    UNIT32 = 9,
113    #[doc = "10: 64 unit transfers per arbitration"]
114    UNIT64 = 10,
115    #[doc = "11: 128 unit transfers per arbitration"]
116    UNIT128 = 11,
117    #[doc = "12: 256 unit transfers per arbitration"]
118    UNIT256 = 12,
119    #[doc = "13: 512 unit transfers per arbitration"]
120    UNIT512 = 13,
121    #[doc = "14: 1024 unit transfers per arbitration"]
122    UNIT1024 = 14,
123    #[doc = "15: Transfer all units as specified by the XFRCNT field"]
124    ALL = 15,
125}
126impl From<BLOCKSIZE_A> for u8 {
127    #[inline(always)]
128    fn from(variant: BLOCKSIZE_A) -> Self {
129        variant as _
130    }
131}
132#[doc = "Field `BLOCKSIZE` reader - Block Transfer Size"]
133pub type BLOCKSIZE_R = crate::FieldReader<u8, BLOCKSIZE_A>;
134impl BLOCKSIZE_R {
135    #[doc = "Get enumerated values variant"]
136    #[inline(always)]
137    pub fn variant(&self) -> Option<BLOCKSIZE_A> {
138        match self.bits {
139            0 => Some(BLOCKSIZE_A::UNIT1),
140            1 => Some(BLOCKSIZE_A::UNIT2),
141            2 => Some(BLOCKSIZE_A::UNIT3),
142            3 => Some(BLOCKSIZE_A::UNIT4),
143            4 => Some(BLOCKSIZE_A::UNIT6),
144            5 => Some(BLOCKSIZE_A::UNIT8),
145            7 => Some(BLOCKSIZE_A::UNIT16),
146            9 => Some(BLOCKSIZE_A::UNIT32),
147            10 => Some(BLOCKSIZE_A::UNIT64),
148            11 => Some(BLOCKSIZE_A::UNIT128),
149            12 => Some(BLOCKSIZE_A::UNIT256),
150            13 => Some(BLOCKSIZE_A::UNIT512),
151            14 => Some(BLOCKSIZE_A::UNIT1024),
152            15 => Some(BLOCKSIZE_A::ALL),
153            _ => None,
154        }
155    }
156    #[doc = "Checks if the value of the field is `UNIT1`"]
157    #[inline(always)]
158    pub fn is_unit1(&self) -> bool {
159        *self == BLOCKSIZE_A::UNIT1
160    }
161    #[doc = "Checks if the value of the field is `UNIT2`"]
162    #[inline(always)]
163    pub fn is_unit2(&self) -> bool {
164        *self == BLOCKSIZE_A::UNIT2
165    }
166    #[doc = "Checks if the value of the field is `UNIT3`"]
167    #[inline(always)]
168    pub fn is_unit3(&self) -> bool {
169        *self == BLOCKSIZE_A::UNIT3
170    }
171    #[doc = "Checks if the value of the field is `UNIT4`"]
172    #[inline(always)]
173    pub fn is_unit4(&self) -> bool {
174        *self == BLOCKSIZE_A::UNIT4
175    }
176    #[doc = "Checks if the value of the field is `UNIT6`"]
177    #[inline(always)]
178    pub fn is_unit6(&self) -> bool {
179        *self == BLOCKSIZE_A::UNIT6
180    }
181    #[doc = "Checks if the value of the field is `UNIT8`"]
182    #[inline(always)]
183    pub fn is_unit8(&self) -> bool {
184        *self == BLOCKSIZE_A::UNIT8
185    }
186    #[doc = "Checks if the value of the field is `UNIT16`"]
187    #[inline(always)]
188    pub fn is_unit16(&self) -> bool {
189        *self == BLOCKSIZE_A::UNIT16
190    }
191    #[doc = "Checks if the value of the field is `UNIT32`"]
192    #[inline(always)]
193    pub fn is_unit32(&self) -> bool {
194        *self == BLOCKSIZE_A::UNIT32
195    }
196    #[doc = "Checks if the value of the field is `UNIT64`"]
197    #[inline(always)]
198    pub fn is_unit64(&self) -> bool {
199        *self == BLOCKSIZE_A::UNIT64
200    }
201    #[doc = "Checks if the value of the field is `UNIT128`"]
202    #[inline(always)]
203    pub fn is_unit128(&self) -> bool {
204        *self == BLOCKSIZE_A::UNIT128
205    }
206    #[doc = "Checks if the value of the field is `UNIT256`"]
207    #[inline(always)]
208    pub fn is_unit256(&self) -> bool {
209        *self == BLOCKSIZE_A::UNIT256
210    }
211    #[doc = "Checks if the value of the field is `UNIT512`"]
212    #[inline(always)]
213    pub fn is_unit512(&self) -> bool {
214        *self == BLOCKSIZE_A::UNIT512
215    }
216    #[doc = "Checks if the value of the field is `UNIT1024`"]
217    #[inline(always)]
218    pub fn is_unit1024(&self) -> bool {
219        *self == BLOCKSIZE_A::UNIT1024
220    }
221    #[doc = "Checks if the value of the field is `ALL`"]
222    #[inline(always)]
223    pub fn is_all(&self) -> bool {
224        *self == BLOCKSIZE_A::ALL
225    }
226}
227#[doc = "Field `BLOCKSIZE` writer - Block Transfer Size"]
228pub type BLOCKSIZE_W<'a> = crate::FieldWriter<'a, u32, CH2_CTRL_SPEC, u8, BLOCKSIZE_A, 4, 16>;
229impl<'a> BLOCKSIZE_W<'a> {
230    #[doc = "One unit transfer per arbitration"]
231    #[inline(always)]
232    pub fn unit1(self) -> &'a mut W {
233        self.variant(BLOCKSIZE_A::UNIT1)
234    }
235    #[doc = "Two unit transfers per arbitration"]
236    #[inline(always)]
237    pub fn unit2(self) -> &'a mut W {
238        self.variant(BLOCKSIZE_A::UNIT2)
239    }
240    #[doc = "Three unit transfers per arbitration"]
241    #[inline(always)]
242    pub fn unit3(self) -> &'a mut W {
243        self.variant(BLOCKSIZE_A::UNIT3)
244    }
245    #[doc = "Four unit transfers per arbitration"]
246    #[inline(always)]
247    pub fn unit4(self) -> &'a mut W {
248        self.variant(BLOCKSIZE_A::UNIT4)
249    }
250    #[doc = "Six unit transfers per arbitration"]
251    #[inline(always)]
252    pub fn unit6(self) -> &'a mut W {
253        self.variant(BLOCKSIZE_A::UNIT6)
254    }
255    #[doc = "Eight unit transfers per arbitration"]
256    #[inline(always)]
257    pub fn unit8(self) -> &'a mut W {
258        self.variant(BLOCKSIZE_A::UNIT8)
259    }
260    #[doc = "Sixteen unit transfers per arbitration"]
261    #[inline(always)]
262    pub fn unit16(self) -> &'a mut W {
263        self.variant(BLOCKSIZE_A::UNIT16)
264    }
265    #[doc = "32 unit transfers per arbitration"]
266    #[inline(always)]
267    pub fn unit32(self) -> &'a mut W {
268        self.variant(BLOCKSIZE_A::UNIT32)
269    }
270    #[doc = "64 unit transfers per arbitration"]
271    #[inline(always)]
272    pub fn unit64(self) -> &'a mut W {
273        self.variant(BLOCKSIZE_A::UNIT64)
274    }
275    #[doc = "128 unit transfers per arbitration"]
276    #[inline(always)]
277    pub fn unit128(self) -> &'a mut W {
278        self.variant(BLOCKSIZE_A::UNIT128)
279    }
280    #[doc = "256 unit transfers per arbitration"]
281    #[inline(always)]
282    pub fn unit256(self) -> &'a mut W {
283        self.variant(BLOCKSIZE_A::UNIT256)
284    }
285    #[doc = "512 unit transfers per arbitration"]
286    #[inline(always)]
287    pub fn unit512(self) -> &'a mut W {
288        self.variant(BLOCKSIZE_A::UNIT512)
289    }
290    #[doc = "1024 unit transfers per arbitration"]
291    #[inline(always)]
292    pub fn unit1024(self) -> &'a mut W {
293        self.variant(BLOCKSIZE_A::UNIT1024)
294    }
295    #[doc = "Transfer all units as specified by the XFRCNT field"]
296    #[inline(always)]
297    pub fn all(self) -> &'a mut W {
298        self.variant(BLOCKSIZE_A::ALL)
299    }
300}
301#[doc = "Field `DONEIFSEN` reader - DMA Operation Done Interrupt Flag Set Enable"]
302pub type DONEIFSEN_R = crate::BitReader<bool>;
303#[doc = "Field `DONEIFSEN` writer - DMA Operation Done Interrupt Flag Set Enable"]
304pub type DONEIFSEN_W<'a> = crate::BitWriter<'a, u32, CH2_CTRL_SPEC, bool, 20>;
305#[doc = "Field `REQMODE` reader - DMA Request Transfer Mode Select"]
306pub type REQMODE_R = crate::BitReader<bool>;
307#[doc = "Field `REQMODE` writer - DMA Request Transfer Mode Select"]
308pub type REQMODE_W<'a> = crate::BitWriter<'a, u32, CH2_CTRL_SPEC, bool, 21>;
309#[doc = "Field `DECLOOPCNT` reader - Decrement Loop Count"]
310pub type DECLOOPCNT_R = crate::BitReader<bool>;
311#[doc = "Field `DECLOOPCNT` writer - Decrement Loop Count"]
312pub type DECLOOPCNT_W<'a> = crate::BitWriter<'a, u32, CH2_CTRL_SPEC, bool, 22>;
313#[doc = "Field `IGNORESREQ` reader - Ignore Sreq"]
314pub type IGNORESREQ_R = crate::BitReader<bool>;
315#[doc = "Field `IGNORESREQ` writer - Ignore Sreq"]
316pub type IGNORESREQ_W<'a> = crate::BitWriter<'a, u32, CH2_CTRL_SPEC, bool, 23>;
317#[doc = "Source Address Increment Size\n\nValue on reset: 0"]
318#[derive(Clone, Copy, Debug, PartialEq)]
319#[repr(u8)]
320pub enum SRCINC_A {
321    #[doc = "0: Increment source address by one unit data size after each read"]
322    ONE = 0,
323    #[doc = "1: Increment source address by two unit data sizes after each read"]
324    TWO = 1,
325    #[doc = "2: Increment source address by four unit data sizes after each read"]
326    FOUR = 2,
327    #[doc = "3: Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."]
328    NONE = 3,
329}
330impl From<SRCINC_A> for u8 {
331    #[inline(always)]
332    fn from(variant: SRCINC_A) -> Self {
333        variant as _
334    }
335}
336#[doc = "Field `SRCINC` reader - Source Address Increment Size"]
337pub type SRCINC_R = crate::FieldReader<u8, SRCINC_A>;
338impl SRCINC_R {
339    #[doc = "Get enumerated values variant"]
340    #[inline(always)]
341    pub fn variant(&self) -> SRCINC_A {
342        match self.bits {
343            0 => SRCINC_A::ONE,
344            1 => SRCINC_A::TWO,
345            2 => SRCINC_A::FOUR,
346            3 => SRCINC_A::NONE,
347            _ => unreachable!(),
348        }
349    }
350    #[doc = "Checks if the value of the field is `ONE`"]
351    #[inline(always)]
352    pub fn is_one(&self) -> bool {
353        *self == SRCINC_A::ONE
354    }
355    #[doc = "Checks if the value of the field is `TWO`"]
356    #[inline(always)]
357    pub fn is_two(&self) -> bool {
358        *self == SRCINC_A::TWO
359    }
360    #[doc = "Checks if the value of the field is `FOUR`"]
361    #[inline(always)]
362    pub fn is_four(&self) -> bool {
363        *self == SRCINC_A::FOUR
364    }
365    #[doc = "Checks if the value of the field is `NONE`"]
366    #[inline(always)]
367    pub fn is_none(&self) -> bool {
368        *self == SRCINC_A::NONE
369    }
370}
371#[doc = "Field `SRCINC` writer - Source Address Increment Size"]
372pub type SRCINC_W<'a> = crate::FieldWriterSafe<'a, u32, CH2_CTRL_SPEC, u8, SRCINC_A, 2, 24>;
373impl<'a> SRCINC_W<'a> {
374    #[doc = "Increment source address by one unit data size after each read"]
375    #[inline(always)]
376    pub fn one(self) -> &'a mut W {
377        self.variant(SRCINC_A::ONE)
378    }
379    #[doc = "Increment source address by two unit data sizes after each read"]
380    #[inline(always)]
381    pub fn two(self) -> &'a mut W {
382        self.variant(SRCINC_A::TWO)
383    }
384    #[doc = "Increment source address by four unit data sizes after each read"]
385    #[inline(always)]
386    pub fn four(self) -> &'a mut W {
387        self.variant(SRCINC_A::FOUR)
388    }
389    #[doc = "Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO."]
390    #[inline(always)]
391    pub fn none(self) -> &'a mut W {
392        self.variant(SRCINC_A::NONE)
393    }
394}
395#[doc = "Unit Data Transfer Size\n\nValue on reset: 0"]
396#[derive(Clone, Copy, Debug, PartialEq)]
397#[repr(u8)]
398pub enum SIZE_A {
399    #[doc = "0: Each unit transfer is a byte"]
400    BYTE = 0,
401    #[doc = "1: Each unit transfer is a half-word"]
402    HALFWORD = 1,
403    #[doc = "2: Each unit transfer is a word"]
404    WORD = 2,
405}
406impl From<SIZE_A> for u8 {
407    #[inline(always)]
408    fn from(variant: SIZE_A) -> Self {
409        variant as _
410    }
411}
412#[doc = "Field `SIZE` reader - Unit Data Transfer Size"]
413pub type SIZE_R = crate::FieldReader<u8, SIZE_A>;
414impl SIZE_R {
415    #[doc = "Get enumerated values variant"]
416    #[inline(always)]
417    pub fn variant(&self) -> Option<SIZE_A> {
418        match self.bits {
419            0 => Some(SIZE_A::BYTE),
420            1 => Some(SIZE_A::HALFWORD),
421            2 => Some(SIZE_A::WORD),
422            _ => None,
423        }
424    }
425    #[doc = "Checks if the value of the field is `BYTE`"]
426    #[inline(always)]
427    pub fn is_byte(&self) -> bool {
428        *self == SIZE_A::BYTE
429    }
430    #[doc = "Checks if the value of the field is `HALFWORD`"]
431    #[inline(always)]
432    pub fn is_halfword(&self) -> bool {
433        *self == SIZE_A::HALFWORD
434    }
435    #[doc = "Checks if the value of the field is `WORD`"]
436    #[inline(always)]
437    pub fn is_word(&self) -> bool {
438        *self == SIZE_A::WORD
439    }
440}
441#[doc = "Field `SIZE` writer - Unit Data Transfer Size"]
442pub type SIZE_W<'a> = crate::FieldWriter<'a, u32, CH2_CTRL_SPEC, u8, SIZE_A, 2, 26>;
443impl<'a> SIZE_W<'a> {
444    #[doc = "Each unit transfer is a byte"]
445    #[inline(always)]
446    pub fn byte(self) -> &'a mut W {
447        self.variant(SIZE_A::BYTE)
448    }
449    #[doc = "Each unit transfer is a half-word"]
450    #[inline(always)]
451    pub fn halfword(self) -> &'a mut W {
452        self.variant(SIZE_A::HALFWORD)
453    }
454    #[doc = "Each unit transfer is a word"]
455    #[inline(always)]
456    pub fn word(self) -> &'a mut W {
457        self.variant(SIZE_A::WORD)
458    }
459}
460#[doc = "Destination Address Increment Size\n\nValue on reset: 0"]
461#[derive(Clone, Copy, Debug, PartialEq)]
462#[repr(u8)]
463pub enum DSTINC_A {
464    #[doc = "0: Increment destination address by one unit data size after each write"]
465    ONE = 0,
466    #[doc = "1: Increment destination address by two unit data sizes after each write"]
467    TWO = 1,
468    #[doc = "2: Increment destination address by four unit data sizes after each write"]
469    FOUR = 2,
470    #[doc = "3: Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."]
471    NONE = 3,
472}
473impl From<DSTINC_A> for u8 {
474    #[inline(always)]
475    fn from(variant: DSTINC_A) -> Self {
476        variant as _
477    }
478}
479#[doc = "Field `DSTINC` reader - Destination Address Increment Size"]
480pub type DSTINC_R = crate::FieldReader<u8, DSTINC_A>;
481impl DSTINC_R {
482    #[doc = "Get enumerated values variant"]
483    #[inline(always)]
484    pub fn variant(&self) -> DSTINC_A {
485        match self.bits {
486            0 => DSTINC_A::ONE,
487            1 => DSTINC_A::TWO,
488            2 => DSTINC_A::FOUR,
489            3 => DSTINC_A::NONE,
490            _ => unreachable!(),
491        }
492    }
493    #[doc = "Checks if the value of the field is `ONE`"]
494    #[inline(always)]
495    pub fn is_one(&self) -> bool {
496        *self == DSTINC_A::ONE
497    }
498    #[doc = "Checks if the value of the field is `TWO`"]
499    #[inline(always)]
500    pub fn is_two(&self) -> bool {
501        *self == DSTINC_A::TWO
502    }
503    #[doc = "Checks if the value of the field is `FOUR`"]
504    #[inline(always)]
505    pub fn is_four(&self) -> bool {
506        *self == DSTINC_A::FOUR
507    }
508    #[doc = "Checks if the value of the field is `NONE`"]
509    #[inline(always)]
510    pub fn is_none(&self) -> bool {
511        *self == DSTINC_A::NONE
512    }
513}
514#[doc = "Field `DSTINC` writer - Destination Address Increment Size"]
515pub type DSTINC_W<'a> = crate::FieldWriterSafe<'a, u32, CH2_CTRL_SPEC, u8, DSTINC_A, 2, 28>;
516impl<'a> DSTINC_W<'a> {
517    #[doc = "Increment destination address by one unit data size after each write"]
518    #[inline(always)]
519    pub fn one(self) -> &'a mut W {
520        self.variant(DSTINC_A::ONE)
521    }
522    #[doc = "Increment destination address by two unit data sizes after each write"]
523    #[inline(always)]
524    pub fn two(self) -> &'a mut W {
525        self.variant(DSTINC_A::TWO)
526    }
527    #[doc = "Increment destination address by four unit data sizes after each write"]
528    #[inline(always)]
529    pub fn four(self) -> &'a mut W {
530        self.variant(DSTINC_A::FOUR)
531    }
532    #[doc = "Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO."]
533    #[inline(always)]
534    pub fn none(self) -> &'a mut W {
535        self.variant(DSTINC_A::NONE)
536    }
537}
538#[doc = "Field `SRCMODE` reader - Source Addressing Mode"]
539pub type SRCMODE_R = crate::BitReader<bool>;
540#[doc = "Field `DSTMODE` reader - Destination Addressing Mode"]
541pub type DSTMODE_R = crate::BitReader<bool>;
542impl R {
543    #[doc = "Bits 0:1 - DMA Structure Type"]
544    #[inline(always)]
545    pub fn structtype(&self) -> STRUCTTYPE_R {
546        STRUCTTYPE_R::new((self.bits & 3) as u8)
547    }
548    #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"]
549    #[inline(always)]
550    pub fn xfercnt(&self) -> XFERCNT_R {
551        XFERCNT_R::new(((self.bits >> 4) & 0x07ff) as u16)
552    }
553    #[doc = "Bit 15 - Endian Byte Swap"]
554    #[inline(always)]
555    pub fn byteswap(&self) -> BYTESWAP_R {
556        BYTESWAP_R::new(((self.bits >> 15) & 1) != 0)
557    }
558    #[doc = "Bits 16:19 - Block Transfer Size"]
559    #[inline(always)]
560    pub fn blocksize(&self) -> BLOCKSIZE_R {
561        BLOCKSIZE_R::new(((self.bits >> 16) & 0x0f) as u8)
562    }
563    #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set Enable"]
564    #[inline(always)]
565    pub fn doneifsen(&self) -> DONEIFSEN_R {
566        DONEIFSEN_R::new(((self.bits >> 20) & 1) != 0)
567    }
568    #[doc = "Bit 21 - DMA Request Transfer Mode Select"]
569    #[inline(always)]
570    pub fn reqmode(&self) -> REQMODE_R {
571        REQMODE_R::new(((self.bits >> 21) & 1) != 0)
572    }
573    #[doc = "Bit 22 - Decrement Loop Count"]
574    #[inline(always)]
575    pub fn decloopcnt(&self) -> DECLOOPCNT_R {
576        DECLOOPCNT_R::new(((self.bits >> 22) & 1) != 0)
577    }
578    #[doc = "Bit 23 - Ignore Sreq"]
579    #[inline(always)]
580    pub fn ignoresreq(&self) -> IGNORESREQ_R {
581        IGNORESREQ_R::new(((self.bits >> 23) & 1) != 0)
582    }
583    #[doc = "Bits 24:25 - Source Address Increment Size"]
584    #[inline(always)]
585    pub fn srcinc(&self) -> SRCINC_R {
586        SRCINC_R::new(((self.bits >> 24) & 3) as u8)
587    }
588    #[doc = "Bits 26:27 - Unit Data Transfer Size"]
589    #[inline(always)]
590    pub fn size(&self) -> SIZE_R {
591        SIZE_R::new(((self.bits >> 26) & 3) as u8)
592    }
593    #[doc = "Bits 28:29 - Destination Address Increment Size"]
594    #[inline(always)]
595    pub fn dstinc(&self) -> DSTINC_R {
596        DSTINC_R::new(((self.bits >> 28) & 3) as u8)
597    }
598    #[doc = "Bit 30 - Source Addressing Mode"]
599    #[inline(always)]
600    pub fn srcmode(&self) -> SRCMODE_R {
601        SRCMODE_R::new(((self.bits >> 30) & 1) != 0)
602    }
603    #[doc = "Bit 31 - Destination Addressing Mode"]
604    #[inline(always)]
605    pub fn dstmode(&self) -> DSTMODE_R {
606        DSTMODE_R::new(((self.bits >> 31) & 1) != 0)
607    }
608}
609impl W {
610    #[doc = "Bit 3 - Structure DMA Transfer Request"]
611    #[inline(always)]
612    pub fn structreq(&mut self) -> STRUCTREQ_W {
613        STRUCTREQ_W::new(self)
614    }
615    #[doc = "Bits 4:14 - DMA Unit Data Transfer Count"]
616    #[inline(always)]
617    pub fn xfercnt(&mut self) -> XFERCNT_W {
618        XFERCNT_W::new(self)
619    }
620    #[doc = "Bit 15 - Endian Byte Swap"]
621    #[inline(always)]
622    pub fn byteswap(&mut self) -> BYTESWAP_W {
623        BYTESWAP_W::new(self)
624    }
625    #[doc = "Bits 16:19 - Block Transfer Size"]
626    #[inline(always)]
627    pub fn blocksize(&mut self) -> BLOCKSIZE_W {
628        BLOCKSIZE_W::new(self)
629    }
630    #[doc = "Bit 20 - DMA Operation Done Interrupt Flag Set Enable"]
631    #[inline(always)]
632    pub fn doneifsen(&mut self) -> DONEIFSEN_W {
633        DONEIFSEN_W::new(self)
634    }
635    #[doc = "Bit 21 - DMA Request Transfer Mode Select"]
636    #[inline(always)]
637    pub fn reqmode(&mut self) -> REQMODE_W {
638        REQMODE_W::new(self)
639    }
640    #[doc = "Bit 22 - Decrement Loop Count"]
641    #[inline(always)]
642    pub fn decloopcnt(&mut self) -> DECLOOPCNT_W {
643        DECLOOPCNT_W::new(self)
644    }
645    #[doc = "Bit 23 - Ignore Sreq"]
646    #[inline(always)]
647    pub fn ignoresreq(&mut self) -> IGNORESREQ_W {
648        IGNORESREQ_W::new(self)
649    }
650    #[doc = "Bits 24:25 - Source Address Increment Size"]
651    #[inline(always)]
652    pub fn srcinc(&mut self) -> SRCINC_W {
653        SRCINC_W::new(self)
654    }
655    #[doc = "Bits 26:27 - Unit Data Transfer Size"]
656    #[inline(always)]
657    pub fn size(&mut self) -> SIZE_W {
658        SIZE_W::new(self)
659    }
660    #[doc = "Bits 28:29 - Destination Address Increment Size"]
661    #[inline(always)]
662    pub fn dstinc(&mut self) -> DSTINC_W {
663        DSTINC_W::new(self)
664    }
665    #[doc = "Writes raw bits to the register."]
666    #[inline(always)]
667    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
668        self.0.bits(bits);
669        self
670    }
671}
672#[doc = "Channel Descriptor Control Word Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch2_ctrl](index.html) module"]
673pub struct CH2_CTRL_SPEC;
674impl crate::RegisterSpec for CH2_CTRL_SPEC {
675    type Ux = u32;
676}
677#[doc = "`read()` method returns [ch2_ctrl::R](R) reader structure"]
678impl crate::Readable for CH2_CTRL_SPEC {
679    type Reader = R;
680}
681#[doc = "`write(|w| ..)` method takes [ch2_ctrl::W](W) writer structure"]
682impl crate::Writable for CH2_CTRL_SPEC {
683    type Writer = W;
684}
685#[doc = "`reset()` method sets CH2_CTRL to value 0"]
686impl crate::Resettable for CH2_CTRL_SPEC {
687    #[inline(always)]
688    fn reset_value() -> Self::Ux {
689        0
690    }
691}
efm32gg11b310_pac/ldma/ch2_ctrl.rs

efm32gg11b310_pac/ldma/
ch2_ctrl.rs
