efm32gg11b/acmp0/
routepen.rs

1#[doc = "Reader of register ROUTEPEN"]
2pub type R = crate::R<u32, super::ROUTEPEN>;
3#[doc = "Writer for register ROUTEPEN"]
4pub type W = crate::W<u32, super::ROUTEPEN>;
5#[doc = "Register ROUTEPEN `reset()`'s with value 0"]
6impl crate::ResetValue for super::ROUTEPEN {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type { 0 }
10}
11#[doc = "Reader of field `OUTPEN`"]
12pub type OUTPEN_R = crate::R<bool, bool>;
13#[doc = "Write proxy for field `OUTPEN`"]
14pub struct OUTPEN_W<'a> {
15    w: &'a mut W,
16}
17impl<'a> OUTPEN_W<'a> {
18    #[doc = r"Sets the field bit"]
19    #[inline(always)]
20    pub fn set_bit(self) -> &'a mut W { self.bit(true) }
21    #[doc = r"Clears the field bit"]
22    #[inline(always)]
23    pub fn clear_bit(self) -> &'a mut W { self.bit(false) }
24    #[doc = r"Writes raw bits to the field"]
25    #[inline(always)]
26    pub fn bit(self, value: bool) -> &'a mut W {
27        self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
28        self.w
29    }
30}
31impl R {
32    #[doc = "Bit 0 - ACMP Output Pin Enable"]
33    #[inline(always)]
34    pub fn outpen(&self) -> OUTPEN_R { OUTPEN_R::new((self.bits & 0x01) != 0) }
35}
36impl W {
37    #[doc = "Bit 0 - ACMP Output Pin Enable"]
38    #[inline(always)]
39    pub fn outpen(&mut self) -> OUTPEN_W { OUTPEN_W { w: self } }
40}
efm32gg11b/acmp0/routepen.rs

efm32gg11b/acmp0/
routepen.rs
