efm32gg11b/cmu/
hfrcoss.rs

1#[doc = "Reader of register HFRCOSS"]
2pub type R = crate::R<u32, super::HFRCOSS>;
3#[doc = "Writer for register HFRCOSS"]
4pub type W = crate::W<u32, super::HFRCOSS>;
5#[doc = "Register HFRCOSS `reset()`'s with value 0"]
6impl crate::ResetValue for super::HFRCOSS {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type { 0 }
10}
11#[doc = "Reader of field `SSAMP`"]
12pub type SSAMP_R = crate::R<u8, u8>;
13#[doc = "Write proxy for field `SSAMP`"]
14pub struct SSAMP_W<'a> {
15    w: &'a mut W,
16}
17impl<'a> SSAMP_W<'a> {
18    #[doc = r"Writes raw bits to the field"]
19    #[inline(always)]
20    pub unsafe fn bits(self, value: u8) -> &'a mut W {
21        self.w.bits = (self.w.bits & !0x07) | ((value as u32) & 0x07);
22        self.w
23    }
24}
25#[doc = "Reader of field `SSINV`"]
26pub type SSINV_R = crate::R<u8, u8>;
27#[doc = "Write proxy for field `SSINV`"]
28pub struct SSINV_W<'a> {
29    w: &'a mut W,
30}
31impl<'a> SSINV_W<'a> {
32    #[doc = r"Writes raw bits to the field"]
33    #[inline(always)]
34    pub unsafe fn bits(self, value: u8) -> &'a mut W {
35        self.w.bits = (self.w.bits & !(0x1f << 8)) | (((value as u32) & 0x1f) << 8);
36        self.w
37    }
38}
39impl R {
40    #[doc = "Bits 0:2 - Spread Spectrum Amplitude"]
41    #[inline(always)]
42    pub fn ssamp(&self) -> SSAMP_R { SSAMP_R::new((self.bits & 0x07) as u8) }
43    #[doc = "Bits 8:12 - Spread Spectrum Update Interval"]
44    #[inline(always)]
45    pub fn ssinv(&self) -> SSINV_R { SSINV_R::new(((self.bits >> 8) & 0x1f) as u8) }
46}
47impl W {
48    #[doc = "Bits 0:2 - Spread Spectrum Amplitude"]
49    #[inline(always)]
50    pub fn ssamp(&mut self) -> SSAMP_W { SSAMP_W { w: self } }
51    #[doc = "Bits 8:12 - Spread Spectrum Update Interval"]
52    #[inline(always)]
53    pub fn ssinv(&mut self) -> SSINV_W { SSINV_W { w: self } }
54}
efm32gg11b/cmu/hfrcoss.rs

efm32gg11b/cmu/
hfrcoss.rs
