Type Definition efm32gg11b::vdac0::status::R[][src]

type R = R<u32, STATUS>;
Expand description

Reader of register STATUS

Implementations

Bit 0 - Channel 0 Enabled Status

Bit 1 - Channel 1 Enabled Status

Bit 2 - Channel 0 Buffer Level

Bit 3 - Channel 1 Buffer Level

Bit 4 - Channel 0 Warm

Bit 5 - Channel 1 Warm

Bit 16 - OPA0 Bus Conflict Output

Bit 17 - OPA1 Bus Conflict Output

Bit 18 - OPA2 Bus Conflict Output

Bit 19 - OPA3 Bus Conflict Output

Bit 20 - OPA0 Enabled Status

Bit 21 - OPA1 Enabled Status

Bit 22 - OPA2 Enabled Status

Bit 23 - OPA3 Enabled Status

Bit 24 - OPA0 Warm Status

Bit 25 - OPA1 Warm Status

Bit 26 - OPA2 Warm Status

Bit 27 - OPA3 Warm Status

Bit 28 - OPA0 Output Valid Status

Bit 29 - OPA1 Output Valid Status

Bit 30 - OPA2 Output Valid Status

Bit 31 - OPA3 Output Valid Status