Type Definition efm32gg11b::qspi0::config::R

type R = R<u32, CONFIG>;

Reader of register CONFIG

Implementations

impl R

pub fn enbspi(&self) -> ENBSPI_R

Bit 0 - QSPI Enable

pub fn selclkpol(&self) -> SELCLKPOL_R

Bit 1 - Clock Polarity, CPOL

pub fn selclkphase(&self) -> SELCLKPHASE_R

Bit 2 - Clock Phase, CPHA

pub fn phymodeenable(&self) -> PHYMODEENABLE_R

Bit 3 - PHY Mode Enable

pub fn enbdiraccctlr(&self) -> ENBDIRACCCTLR_R

Bit 7 - Enable Direct Access Controller

pub fn enblegacyipmode(&self) -> ENBLEGACYIPMODE_R

Bit 8 - Legacy IP Mode Enable

pub fn periphseldec(&self) -> PERIPHSELDEC_R

Bit 9 - Peripheral Select Decode

pub fn periphcslines(&self) -> PERIPHCSLINES_R

Bits 10:11 - Peripheral Chip Select Lines

pub fn wrprotflash(&self) -> WRPROTFLASH_R

Bit 14 - Write Protect Flash Pin

pub fn enbahbaddrremap(&self) -> ENBAHBADDRREMAP_R

Bit 16 - Enable Address Remapping

pub fn enterxipmode(&self) -> ENTERXIPMODE_R

Bit 17 - Enter XIP Mode on Next READ

pub fn enterxipmodeimm(&self) -> ENTERXIPMODEIMM_R

Bit 18 - Enter XIP Mode Immediately

pub fn mstrbauddiv(&self) -> MSTRBAUDDIV_R

Bits 19:22 - Master Mode Baud Rate Divisor

pub fn enableahbdecoder(&self) -> ENABLEAHBDECODER_R

Bit 23 - Enable Address Decoder

pub fn enabledtrprotocol(&self) -> ENABLEDTRPROTOCOL_R

Bit 24 - Enable DTR Protocol

pub fn pipelinephy(&self) -> PIPELINEPHY_R

Bit 25 - Pipeline PHY Mode Enable

pub fn crcenable(&self) -> CRCENABLE_R

Bit 29 - CRC Enable Bit

pub fn dualbyteopcodeen(&self) -> DUALBYTEOPCODEEN_R

Bit 30 - Dual-byte Opcode Mode Enable Bit

pub fn idle(&self) -> IDLE_R

Bit 31 - Serial Interface and Low Level SPI Pipeline is IDLE